ES486009A1 - Aparato que incluye una pluralidad de registros de almacena-miento para almacenar y retardar una pluralidad de senales analogicas muestreadas - Google Patents

Aparato que incluye una pluralidad de registros de almacena-miento para almacenar y retardar una pluralidad de senales analogicas muestreadas

Info

Publication number
ES486009A1
ES486009A1 ES486009A ES486009A ES486009A1 ES 486009 A1 ES486009 A1 ES 486009A1 ES 486009 A ES486009 A ES 486009A ES 486009 A ES486009 A ES 486009A ES 486009 A1 ES486009 A1 ES 486009A1
Authority
ES
Spain
Prior art keywords
charge transfer
channels
transfer device
transfer apparatus
time delays
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES486009A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of ES486009A1 publication Critical patent/ES486009A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/04—Shift registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287—Organisation of a multiplicity of shift registers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/1057—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

Aparato que incluye una pluralidad de registros de almacenamiento para almacenar y retardar una pluralidad de señales analógicas muestreadas, caracterizado porque dichos registros de desplazamiento (20, 25) están formados en paralelo sobre un substrato semiconductor y están numerados consecutivamente de 1 a N, incluyendo cada registro de desplazamiento "n" etapas idénticas, incluyendo cada etapa una pluralidad de electrodo, estando dichas "n" etapas idénticas de cada registro de des- plazamiento divididas en una primera parte y en una segunda par- te, incluyendo el primer registro de desplazamiento "n" etapas en la primera parte y cero etapa en la segunda parte, variando el número de etapas incluido en las segundas partes de dichos registros de desplazamiento entre dicho primer registro de desplazamiento y el registro de desplazamiento número N linealmente con el número del registro de desplazamiento desde dicho primer registro de desplazamiento hasta dicho registro de desplaza miento número N, teniendo cada uno de los registros de desplazamientos numerados sucesivamente "p" etapas más que los registros de desplazamiento que llevan el número precedente, incluyendo el registro de desplazamiento número N "m", etapas en 1a segunda parte y (n-m) etapas en la primera parte, siendo "m" inferior en "p" etapas con relación a (n-m), y porque un primer grupo de conductores (57a, 58a) interconectan los electrodos respectivos de las etapas de las primeras partes de dichos registros de desplazamiento y porque un segundo grupo de conductores (57b, 58b) interconectan los electrodos respectivos de las etapas de las segundas partes de dichos registros de desplazamiento.
ES486009A 1978-11-16 1979-11-15 Aparato que incluye una pluralidad de registros de almacena-miento para almacenar y retardar una pluralidad de senales analogicas muestreadas Expired ES486009A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/961,260 US4280066A (en) 1978-11-16 1978-11-16 Charge transfer apparatus

Publications (1)

Publication Number Publication Date
ES486009A1 true ES486009A1 (es) 1980-06-16

Family

ID=25504253

Family Applications (1)

Application Number Title Priority Date Filing Date
ES486009A Expired ES486009A1 (es) 1978-11-16 1979-11-15 Aparato que incluye una pluralidad de registros de almacena-miento para almacenar y retardar una pluralidad de senales analogicas muestreadas

Country Status (5)

Country Link
US (1) US4280066A (es)
EP (1) EP0011261A1 (es)
JP (1) JPS5589994A (es)
AU (1) AU5221579A (es)
ES (1) ES486009A1 (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60187185A (ja) * 1984-03-06 1985-09-24 Victor Co Of Japan Ltd 映像信号遅延回路
US4648072A (en) * 1985-05-06 1987-03-03 Tektronix, Inc. High speed data acquisition utilizing multiplex charge transfer devices
US4725748A (en) * 1985-05-06 1988-02-16 Tektronix, Inc. High speed data acquisition utilizing multiple charge transfer delay lines
JPS6316670A (ja) * 1986-07-09 1988-01-23 Fuji Photo Film Co Ltd 電荷結合素子を用いた遅延素子
JP6439298B2 (ja) * 2013-07-10 2018-12-19 コニカミノルタ株式会社 整相加算器、及び、超音波探触子

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4152678A (en) * 1976-07-01 1979-05-01 Board of Trustees of the Leland Stanford Jr. Unv. Cascade charge coupled delay line device for compound delays
US4058003A (en) * 1976-07-21 1977-11-15 The Board Of Trustees Of The Leland Stanford Junior University Ultrasonic electronic lens with reduced delay range

Also Published As

Publication number Publication date
AU5221579A (en) 1980-05-22
JPS5589994A (en) 1980-07-08
US4280066A (en) 1981-07-21
EP0011261A1 (en) 1980-05-28

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19980202