ES422031A1 - Un sistema de proceso de datos controlado por programa al- macenado. - Google Patents

Un sistema de proceso de datos controlado por programa al- macenado.

Info

Publication number
ES422031A1
ES422031A1 ES422031A ES422031A ES422031A1 ES 422031 A1 ES422031 A1 ES 422031A1 ES 422031 A ES422031 A ES 422031A ES 422031 A ES422031 A ES 422031A ES 422031 A1 ES422031 A1 ES 422031A1
Authority
ES
Spain
Prior art keywords
processors
data processing
manage
distributed
response
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES422031A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES422031A1 publication Critical patent/ES422031A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2005—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication controllers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2025—Failover techniques using centralised failover control functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/203—Failover techniques using migration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Debugging And Monitoring (AREA)
ES422031A 1973-01-04 1974-01-04 Un sistema de proceso de datos controlado por programa al- macenado. Expired ES422031A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB56073A GB1411182A (en) 1973-01-04 1973-01-04 Data processing

Publications (1)

Publication Number Publication Date
ES422031A1 true ES422031A1 (es) 1976-08-01

Family

ID=9706525

Family Applications (1)

Application Number Title Priority Date Filing Date
ES422031A Expired ES422031A1 (es) 1973-01-04 1974-01-04 Un sistema de proceso de datos controlado por programa al- macenado.

Country Status (8)

Country Link
JP (1) JPS5025147A (xx)
BE (1) BE809382R (xx)
DE (1) DE2364082A1 (xx)
ES (1) ES422031A1 (xx)
FR (1) FR2213540B1 (xx)
GB (1) GB1411182A (xx)
IT (1) IT1006706B (xx)
NL (1) NL7316994A (xx)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528711A (en) * 1975-07-09 1977-01-22 Nippon Telegr & Teleph Corp <Ntt> Dispersion-control electronic exchange system
US4074072A (en) * 1976-05-24 1978-02-14 Bell Telephone Laboratories, Incorporated Multiprocessor control of a partitioned switching network by control communication through the network
JPS53129907A (en) * 1977-04-19 1978-11-13 Nec Corp Exchange control system
JPS5486204A (en) * 1977-12-21 1979-07-09 Nec Corp Inter-module interface system
IT1111606B (it) * 1978-03-03 1986-01-13 Cselt Centro Studi Lab Telecom Sistema elaborativo modulare multiconfigurabile integrato con un sistema di preelaborazione
DE2813721C2 (de) * 1978-03-30 1980-05-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung für eine indirekt gesteuerte Vermittlungsanlage, insbesondere Fernsprechvermittlungsanlage
GB2023314B (en) 1978-06-15 1982-10-06 Ibm Digital data processing systems
US4209839A (en) * 1978-06-16 1980-06-24 International Business Machines Corporation Shared synchronous memory multiprocessing arrangement
DE2941956A1 (de) * 1979-10-17 1981-04-30 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Verfahren zur steuerung von prozessen mit einer zentralen steuereinrichtung
FR2477809B1 (fr) * 1980-03-10 1987-08-21 Jeumont Schneider Systeme de transmission rapide de messages entre calculateurs
US4823256A (en) * 1984-06-22 1989-04-18 American Telephone And Telegraph Company, At&T Bell Laboratories Reconfigurable dual processor system
US4754394A (en) * 1984-10-24 1988-06-28 International Business Machines Corporation Multiprocessing system having dynamically allocated local/global storage and including interleaving transformation circuit for transforming real addresses to corresponding absolute address of the storage
EP0216359A3 (de) * 1985-09-26 1987-09-30 Siemens Aktiengesellschaft Verfahren zur Verhinderung einer Überlastung der Zentralsteuerung eines rechnergesteuerten Vermittlungssystems
DE3707998A1 (de) * 1987-03-12 1988-09-22 Gerhard G Thomas Rechnersystem, insbesondere zur simulation biologischer prozesse
GB2262169B (en) * 1991-11-21 1995-06-21 Scott John Charles Morgan Storage and retrieval of information in electronic memory
JP3408850B2 (ja) * 1992-12-09 2003-05-19 三菱電機株式会社 クライアント・サーバシステムおよびその制御方法、並びにクライアント機装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE313849B (xx) * 1966-03-25 1969-08-25 Ericsson Telefon Ab L M
GB1332797A (en) * 1970-09-02 1973-10-03 Plessey Co Ltd Programme interrupt facilities in data processing systems

Also Published As

Publication number Publication date
IT1006706B (it) 1976-10-20
FR2213540A1 (xx) 1974-08-02
GB1411182A (en) 1975-10-22
DE2364082A1 (de) 1974-07-18
AU6389673A (en) 1975-06-26
JPS5025147A (xx) 1975-03-17
BE809382R (fr) 1974-07-04
NL7316994A (xx) 1974-07-08
FR2213540B1 (xx) 1978-08-11

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