ES394671A1 - Improvements in digital data switching centers. (Machine-translation by Google Translate, not legally binding) - Google Patents

Improvements in digital data switching centers. (Machine-translation by Google Translate, not legally binding)

Info

Publication number
ES394671A1
ES394671A1 ES394671A ES394671A ES394671A1 ES 394671 A1 ES394671 A1 ES 394671A1 ES 394671 A ES394671 A ES 394671A ES 394671 A ES394671 A ES 394671A ES 394671 A1 ES394671 A1 ES 394671A1
Authority
ES
Spain
Prior art keywords
memory devices
digital data
channels
translation
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES394671A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES394671A1 publication Critical patent/ES394671A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1623—Plesiochronous digital hierarchy [PDH]
    • H04J3/1647—Subrate or multislot multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Improvements in digital data switching centers for a digital data network containing several mixed multiple channels, each working at a given transmission rate, chosen from a given number of possible transmission rates, with several channels operating at each one of the above speeds. The center has several memory devices, one for each channel, all the memory devices that are associated with the channels working at the same transmission speed being grouped. The center also includes elements to sample the received data characters on a multiplex group of incoming channels; elements to associate the sampling time of each character with the corresponding channel address of the memory devices and elements to transfer the characters to the memory devices, identified by the channel addresses. (Machine-translation by Google Translate, not legally binding)
ES394671A 1970-09-02 1971-08-31 Improvements in digital data switching centers. (Machine-translation by Google Translate, not legally binding) Expired ES394671A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4198870 1970-09-02

Publications (1)

Publication Number Publication Date
ES394671A1 true ES394671A1 (en) 1974-09-16

Family

ID=10422309

Family Applications (1)

Application Number Title Priority Date Filing Date
ES394671A Expired ES394671A1 (en) 1970-09-02 1971-08-31 Improvements in digital data switching centers. (Machine-translation by Google Translate, not legally binding)

Country Status (9)

Country Link
AU (1) AU462199B2 (en)
BE (1) BE772073A (en)
CH (1) CH547584A (en)
DE (1) DE2143442C3 (en)
ES (1) ES394671A1 (en)
FR (1) FR2107164A5 (en)
GB (1) GB1303270A (en)
NL (1) NL7111997A (en)
SE (1) SE369451B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3814860A (en) * 1972-10-16 1974-06-04 Honeywell Inf Systems Scanning technique for multiplexer apparatus
DE2419566C3 (en) * 1974-04-23 1986-10-02 Siemens AG, 1000 Berlin und 8000 München Method for the transmission of binary data via a clock-controlled time division multiplex exchange
DE2527481C3 (en) * 1975-06-20 1984-11-08 Allgemeine Elektrizitäts-Gesellschaft AEG-Telefunken, 1000 Berlin und 6000 Frankfurt Frame structure for a non-hierarchical multiplexer
DE2828602C2 (en) * 1978-06-29 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Method for transmitting data in a synchronous data network
DE2829576C2 (en) * 1978-07-05 1980-07-17 Siemens Ag, 1000 Berlin Und 8000 Muenchen Circuit arrangement for establishing and switching connections between data lines and a time division multiplex transmission link

Also Published As

Publication number Publication date
AU3303571A (en) 1973-03-08
AU462199B2 (en) 1975-06-19
BE772073A (en) 1972-03-02
SE369451B (en) 1974-08-26
DE2143442B2 (en) 1980-05-08
DE2143442A1 (en) 1972-03-09
GB1303270A (en) 1973-01-17
FR2107164A5 (en) 1972-05-05
CH547584A (en) 1974-03-29
NL7111997A (en) 1972-03-06
DE2143442C3 (en) 1981-01-08

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