ES361861A1 - Un metodo y su correspondiente dispositivo para alinear al menos dos senales electricas. - Google Patents

Un metodo y su correspondiente dispositivo para alinear al menos dos senales electricas.

Info

Publication number
ES361861A1
ES361861A1 ES361861A ES361861A ES361861A1 ES 361861 A1 ES361861 A1 ES 361861A1 ES 361861 A ES361861 A ES 361861A ES 361861 A ES361861 A ES 361861A ES 361861 A1 ES361861 A1 ES 361861A1
Authority
ES
Spain
Prior art keywords
pulse
duration
correcting
receiver
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES361861A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Publication of ES361861A1 publication Critical patent/ES361861A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/36Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device for synchronising or phasing transmitter and receiver
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P5/00Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors
    • H02P5/46Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors for speed regulation of two or more dynamo-electric motors in relation to one another
    • H02P5/52Arrangements specially adapted for regulating or controlling the speed or torque of two or more electric motors for speed regulation of two or more dynamo-electric motors in relation to one another additionally providing control of relative angular displacement

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Communication Control (AREA)
  • Control Of Stepping Motors (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Facsimile Scanning Arrangements (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Pulse Circuits (AREA)
ES361861A 1968-05-24 1968-12-26 Un metodo y su correspondiente dispositivo para alinear al menos dos senales electricas. Expired ES361861A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US73185768A 1968-05-24 1968-05-24

Publications (1)

Publication Number Publication Date
ES361861A1 true ES361861A1 (es) 1970-12-01

Family

ID=24941230

Family Applications (1)

Application Number Title Priority Date Filing Date
ES361861A Expired ES361861A1 (es) 1968-05-24 1968-12-26 Un metodo y su correspondiente dispositivo para alinear al menos dos senales electricas.

Country Status (12)

Country Link
US (1) US3582798A (US08088918-20120103-C00476.png)
AT (1) AT313379B (US08088918-20120103-C00476.png)
BE (1) BE726034A (US08088918-20120103-C00476.png)
CH (1) CH493177A (US08088918-20120103-C00476.png)
CS (1) CS178054B2 (US08088918-20120103-C00476.png)
DE (1) DE1816689B2 (US08088918-20120103-C00476.png)
ES (1) ES361861A1 (US08088918-20120103-C00476.png)
FR (1) FR1601516A (US08088918-20120103-C00476.png)
GB (1) GB1247717A (US08088918-20120103-C00476.png)
LU (1) LU58677A1 (US08088918-20120103-C00476.png)
NO (1) NO130090B (US08088918-20120103-C00476.png)
SE (1) SE366626B (US08088918-20120103-C00476.png)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4232342A (en) * 1973-04-13 1980-11-04 Skala Stephen F Multiplexing for facsimile systems
US4054745A (en) * 1976-12-06 1977-10-18 Gte Automatic Electric (Canada) Limited Motor control device for data terminals
FR2423101A1 (fr) * 1978-04-11 1979-11-09 Electroniques Et Const Synchronisation des cylindres entre telecopieurs emetteur et recepteur
US4704721A (en) * 1984-12-21 1987-11-03 Aetna Telecommunications Laboratories Real time network system
US6864648B1 (en) 2002-02-08 2005-03-08 Powersci, Inc Vector flux machine

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2794123A (en) * 1954-02-10 1957-05-28 Bell Telephone Labor Inc Electrical delay circuits
US3048708A (en) * 1958-06-25 1962-08-07 Itt Pulse timing control circuit
US3094667A (en) * 1958-10-29 1963-06-18 Itt Noise reducing circuit employing the information on both leading and trailing edges of received pulses
NL278226A (US08088918-20120103-C00476.png) * 1961-05-10
US3328688A (en) * 1964-08-24 1967-06-27 Robert R Brooks Phase comparator using bistable and logic elements
US3426149A (en) * 1965-10-23 1969-02-04 Electrohome Ltd Phase detector
US3440548A (en) * 1966-10-06 1969-04-22 Bell Telephone Labor Inc Timing recovery circuit using time derivative of data signals

Also Published As

Publication number Publication date
CH493177A (de) 1970-06-30
NO130090B (US08088918-20120103-C00476.png) 1974-07-01
DE1816689A1 (de) 1969-12-04
SE366626B (US08088918-20120103-C00476.png) 1974-04-29
LU58677A1 (US08088918-20120103-C00476.png) 1970-01-13
CS178054B2 (US08088918-20120103-C00476.png) 1977-08-31
BE726034A (US08088918-20120103-C00476.png) 1969-06-24
US3582798A (en) 1971-06-01
FR1601516A (US08088918-20120103-C00476.png) 1970-08-24
AT313379B (de) 1974-02-11
GB1247717A (en) 1971-09-29
DE1816689B2 (de) 1971-12-23

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