ES352146A1 - Una disposicion de circuito monolitico de transistores. - Google Patents
Una disposicion de circuito monolitico de transistores.Info
- Publication number
- ES352146A1 ES352146A1 ES352146A ES352146A ES352146A1 ES 352146 A1 ES352146 A1 ES 352146A1 ES 352146 A ES352146 A ES 352146A ES 352146 A ES352146 A ES 352146A ES 352146 A1 ES352146 A1 ES 352146A1
- Authority
- ES
- Spain
- Prior art keywords
- region
- base
- capacitor
- emitter
- diffused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000295 complement effect Effects 0.000 title abstract 3
- 239000003990 capacitor Substances 0.000 abstract 6
- 238000009792 diffusion process Methods 0.000 abstract 5
- 238000002955 isolation Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 abstract 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 230000000873 masking effect Effects 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/035—Diffusion through a layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US65030367A | 1967-06-30 | 1967-06-30 | |
US65049667A | 1967-06-30 | 1967-06-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES352146A1 true ES352146A1 (es) | 1969-10-01 |
Family
ID=27095824
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES352146A Expired ES352146A1 (es) | 1967-06-30 | 1968-03-29 | Una disposicion de circuito monolitico de transistores. |
ES366504A Expired ES366504A1 (es) | 1967-06-30 | 1969-04-26 | Un procedimiento para fabricar un circuito monolitico de transistores. |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES366504A Expired ES366504A1 (es) | 1967-06-30 | 1969-04-26 | Un procedimiento para fabricar un circuito monolitico de transistores. |
Country Status (6)
Country | Link |
---|---|
US (2) | US3465215A (en:Method) |
BE (1) | BE712947A (en:Method) |
ES (2) | ES352146A1 (en:Method) |
FR (1) | FR1560062A (en:Method) |
GB (1) | GB1213321A (en:Method) |
NL (1) | NL6804357A (en:Method) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3576475A (en) * | 1968-08-29 | 1971-04-27 | Texas Instruments Inc | Field effect transistors for integrated circuits and methods of manufacture |
US3734787A (en) * | 1970-01-09 | 1973-05-22 | Ibm | Fabrication of diffused junction capacitor by simultaneous outdiffusion |
US3619735A (en) * | 1970-01-26 | 1971-11-09 | Ibm | Integrated circuit with buried decoupling capacitor |
US3731372A (en) * | 1970-04-10 | 1973-05-08 | Itt | Method of forming a low-ohmic contact to a semiconductor device |
US3770519A (en) * | 1970-08-05 | 1973-11-06 | Ibm | Isolation diffusion method for making reduced beta transistor or diodes |
JPS5122610B1 (en:Method) * | 1970-08-12 | 1976-07-10 | ||
US4054899A (en) * | 1970-09-03 | 1977-10-18 | Texas Instruments Incorporated | Process for fabricating monolithic circuits having matched complementary transistors and product |
IT946150B (it) * | 1971-12-15 | 1973-05-21 | Ates Componenti Elettron | Perfezionamento al processo plana re epistssiale per la produzione di circuiti integrati lineari di potenza |
US3969750A (en) * | 1974-02-12 | 1976-07-13 | International Business Machines Corporation | Diffused junction capacitor and process for producing the same |
JPS5753667B2 (en:Method) * | 1974-07-04 | 1982-11-13 | ||
JPS5676560A (en) * | 1979-11-28 | 1981-06-24 | Hitachi Ltd | Semiconductor device |
JPS56124257A (en) * | 1981-02-23 | 1981-09-29 | Hitachi Ltd | Manufacturing of semiconductor integrated circuit device |
DE3361832D1 (en) * | 1982-04-19 | 1986-02-27 | Matsushita Electric Ind Co Ltd | Semiconductor ic and method of making the same |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3258723A (en) * | 1962-01-30 | 1966-06-28 | Osafune ia | |
US3327182A (en) * | 1965-06-14 | 1967-06-20 | Westinghouse Electric Corp | Semiconductor integrated circuit structure and method of making the same |
US3370995A (en) * | 1965-08-02 | 1968-02-27 | Texas Instruments Inc | Method for fabricating electrically isolated semiconductor devices in integrated circuits |
-
1967
- 1967-06-30 US US650303A patent/US3465215A/en not_active Expired - Lifetime
- 1967-06-30 US US650496A patent/US3474309A/en not_active Expired - Lifetime
-
1968
- 1968-03-21 GB GB03723/68A patent/GB1213321A/en not_active Expired
- 1968-03-28 NL NL6804357A patent/NL6804357A/xx unknown
- 1968-03-29 ES ES352146A patent/ES352146A1/es not_active Expired
- 1968-03-29 BE BE712947D patent/BE712947A/xx unknown
- 1968-03-29 FR FR1560062D patent/FR1560062A/fr not_active Expired
-
1969
- 1969-04-26 ES ES366504A patent/ES366504A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3474309A (en) | 1969-10-21 |
NL6804357A (en:Method) | 1968-12-31 |
GB1213321A (en) | 1970-11-25 |
US3465215A (en) | 1969-09-02 |
ES366504A1 (es) | 1971-02-16 |
BE712947A (en:Method) | 1968-07-31 |
FR1560062A (en:Method) | 1969-03-14 |
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