ES346421A1 - Metodo para formar un contacto metalico para un dispositivosemiconductor. - Google Patents
Metodo para formar un contacto metalico para un dispositivosemiconductor.Info
- Publication number
- ES346421A1 ES346421A1 ES346421A ES346421A ES346421A1 ES 346421 A1 ES346421 A1 ES 346421A1 ES 346421 A ES346421 A ES 346421A ES 346421 A ES346421 A ES 346421A ES 346421 A1 ES346421 A1 ES 346421A1
- Authority
- ES
- Spain
- Prior art keywords
- layer
- metal
- protective coating
- depositing
- semi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000001465 metallisation Methods 0.000 title 1
- 229910052751 metal Inorganic materials 0.000 abstract 5
- 239000002184 metal Substances 0.000 abstract 5
- 238000000151 deposition Methods 0.000 abstract 4
- 239000011253 protective coating Substances 0.000 abstract 4
- 239000004065 semiconductor Substances 0.000 abstract 4
- 229910052750 molybdenum Inorganic materials 0.000 abstract 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052763 palladium Inorganic materials 0.000 abstract 2
- 229910017315 Mo—Cu Inorganic materials 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 238000009713 electroplating Methods 0.000 abstract 1
- 229910052697 platinum Inorganic materials 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
- H01L29/66295—Silicon vertical transistors with main current going through the whole silicon substrate, e.g. power bipolar transistor
- H01L29/66303—Silicon vertical transistors with main current going through the whole silicon substrate, e.g. power bipolar transistor with multi-emitter, e.g. interdigitated, multi-cellular or distributed emitter
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemically Coating (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58993166A | 1966-10-27 | 1966-10-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES346421A1 true ES346421A1 (es) | 1968-12-16 |
Family
ID=24360161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES346421A Expired ES346421A1 (es) | 1966-10-27 | 1967-10-25 | Metodo para formar un contacto metalico para un dispositivosemiconductor. |
Country Status (8)
Country | Link |
---|---|
US (1) | US3558352A (es) |
BE (1) | BE703102A (es) |
CH (1) | CH485326A (es) |
ES (1) | ES346421A1 (es) |
FR (1) | FR1538798A (es) |
GB (1) | GB1174832A (es) |
NL (1) | NL159232B (es) |
SE (1) | SE334423B (es) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL6914593A (es) * | 1969-09-26 | 1971-03-30 | ||
US3604986A (en) * | 1970-03-17 | 1971-09-14 | Bell Telephone Labor Inc | High frequency transistors with shallow emitters |
US3837905A (en) * | 1971-09-22 | 1974-09-24 | Gen Motors Corp | Thermal oxidation of silicon |
CA1053994A (en) * | 1974-07-03 | 1979-05-08 | Amp Incorporated | Sensitization of polyimide polymer for electroless metal deposition |
US4510347A (en) * | 1982-12-06 | 1985-04-09 | Fine Particles Technology Corporation | Formation of narrow conductive paths on a substrate |
-
1966
- 1966-10-27 US US589931A patent/US3558352A/en not_active Expired - Lifetime
-
1967
- 1967-08-25 BE BE703102D patent/BE703102A/xx unknown
- 1967-09-06 FR FR8695A patent/FR1538798A/fr not_active Expired
- 1967-10-02 GB GB44711/67D patent/GB1174832A/en not_active Expired
- 1967-10-19 NL NL6714180.A patent/NL159232B/xx not_active IP Right Cessation
- 1967-10-25 ES ES346421A patent/ES346421A1/es not_active Expired
- 1967-10-27 SE SE14724/67A patent/SE334423B/xx unknown
- 1967-10-27 CH CH1512867A patent/CH485326A/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CH485326A (de) | 1970-01-31 |
FR1538798A (fr) | 1968-09-06 |
SE334423B (es) | 1971-04-26 |
DE1589975A1 (de) | 1970-04-30 |
NL6714180A (es) | 1968-04-29 |
NL159232B (nl) | 1979-01-15 |
GB1174832A (en) | 1969-12-17 |
US3558352A (en) | 1971-01-26 |
DE1589975B2 (de) | 1975-06-05 |
BE703102A (es) | 1968-01-15 |
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