ES2572555T3 - Ejecución de aplicaciones gráficas y no gráficas en una unidad de procesamiento de gráficos - Google Patents

Ejecución de aplicaciones gráficas y no gráficas en una unidad de procesamiento de gráficos Download PDF

Info

Publication number
ES2572555T3
ES2572555T3 ES13707979.4T ES13707979T ES2572555T3 ES 2572555 T3 ES2572555 T3 ES 2572555T3 ES 13707979 T ES13707979 T ES 13707979T ES 2572555 T3 ES2572555 T3 ES 2572555T3
Authority
ES
Spain
Prior art keywords
graphic
gpu
shader cores
shader
instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
ES13707979.4T
Other languages
English (en)
Spanish (es)
Inventor
Alexei V. Bourd
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Application granted granted Critical
Publication of ES2572555T3 publication Critical patent/ES2572555T3/es
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5094Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Generation (AREA)
  • Image Processing (AREA)
ES13707979.4T 2012-03-07 2013-02-18 Ejecución de aplicaciones gráficas y no gráficas en una unidad de procesamiento de gráficos Active ES2572555T3 (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201213414450 2012-03-07
US13/414,450 US9019289B2 (en) 2012-03-07 2012-03-07 Execution of graphics and non-graphics applications on a graphics processing unit
PCT/US2013/026596 WO2013133957A1 (en) 2012-03-07 2013-02-18 Execution of graphics and non-graphics applications on a graphics processing unit

Publications (1)

Publication Number Publication Date
ES2572555T3 true ES2572555T3 (es) 2016-06-01

Family

ID=47833377

Family Applications (1)

Application Number Title Priority Date Filing Date
ES13707979.4T Active ES2572555T3 (es) 2012-03-07 2013-02-18 Ejecución de aplicaciones gráficas y no gráficas en una unidad de procesamiento de gráficos

Country Status (8)

Country Link
US (1) US9019289B2 (enExample)
EP (1) EP2823459B1 (enExample)
JP (1) JP5792402B2 (enExample)
KR (1) KR101552079B1 (enExample)
CN (1) CN104160420B (enExample)
ES (1) ES2572555T3 (enExample)
HU (1) HUE027044T2 (enExample)
WO (1) WO2013133957A1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007054876A1 (de) * 2006-11-22 2008-06-19 Sms Demag Ag Verfahren und Vorrichtung zur Wärmebehandlung von Schweißnähten
US10817043B2 (en) * 2011-07-26 2020-10-27 Nvidia Corporation System and method for entering and exiting sleep mode in a graphics subsystem
US10198788B2 (en) * 2013-11-11 2019-02-05 Oxide Interactive Llc Method and system of temporally asynchronous shading decoupled from rasterization
CN105786449B (zh) * 2014-12-26 2018-07-24 龙芯中科技术有限公司 基于图形处理的指令调度方法及装置
US20160210231A1 (en) * 2015-01-21 2016-07-21 Mediatek Singapore Pte. Ltd. Heterogeneous system architecture for shared memory
US20160260246A1 (en) * 2015-03-02 2016-09-08 Advanced Micro Devices, Inc. Providing asynchronous display shader functionality on a shared shader core
US9799089B1 (en) * 2016-05-23 2017-10-24 Qualcomm Incorporated Per-shader preamble for graphics processing
US20180033114A1 (en) * 2016-07-26 2018-02-01 Mediatek Inc. Graphics Pipeline That Supports Multiple Concurrent Processes
US10417734B2 (en) 2017-04-24 2019-09-17 Intel Corporation Compute optimization mechanism for deep neural networks
US10417731B2 (en) 2017-04-24 2019-09-17 Intel Corporation Compute optimization mechanism for deep neural networks
US11037356B2 (en) 2018-09-24 2021-06-15 Zignal Labs, Inc. System and method for executing non-graphical algorithms on a GPU (graphics processing unit)
US12524062B2 (en) * 2018-12-07 2026-01-13 Advanced Micro Devices, Inc. Hint-based fine-grained dynamic voltage and frequency scaling in GPUs
US10861126B1 (en) * 2019-06-21 2020-12-08 Intel Corporation Asynchronous execution mechanism
US11436783B2 (en) 2019-10-16 2022-09-06 Oxide Interactive, Inc. Method and system of decoupled object space shading
US11282160B2 (en) * 2020-03-12 2022-03-22 Cisco Technology, Inc. Function-as-a-service (FaaS) model for specialized processing units
GB2600712B (en) 2020-11-04 2024-08-28 Advanced Risc Mach Ltd Data processing systems
JP2022187116A (ja) * 2021-06-07 2022-12-19 富士通株式会社 多重制御プログラム、情報処理装置および多重制御方法
US20220414222A1 (en) * 2021-06-24 2022-12-29 Advanced Micro Devices, Inc. Trusted processor for saving gpu context to system memory
US12067666B2 (en) * 2022-05-18 2024-08-20 Qualcomm Incorporated Run-time mechanism for optimal shader

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070204268A1 (en) 2006-02-27 2007-08-30 Red. Hat, Inc. Methods and systems for scheduling processes in a multi-core processor environment
WO2008021310A2 (en) 2006-08-14 2008-02-21 Wms Gaming Inc. Applying graphical characteristics to graphical objects in a wagering game machine
US20090305790A1 (en) * 2007-01-30 2009-12-10 Vitie Inc. Methods and Apparatuses of Game Appliance Execution and Rendering Service
US8922565B2 (en) 2007-11-30 2014-12-30 Qualcomm Incorporated System and method for using a secondary processor in a graphics system
US20100265250A1 (en) 2007-12-21 2010-10-21 David Koenig Method and system for fast rendering of a three dimensional scene
DE102008005124A1 (de) 2008-01-18 2009-07-23 Kuka Roboter Gmbh Computersystem, Steuerungsvorrichtung für eine Maschine, insbesondere für einen Industrieroboter, und Industrieroboter
WO2011023204A1 (en) 2009-08-24 2011-03-03 Abb Research Ltd. Simulation of distributed virtual control systems
US8310492B2 (en) * 2009-09-03 2012-11-13 Ati Technologies Ulc Hardware-based scheduling of GPU work
US9142057B2 (en) 2009-09-03 2015-09-22 Advanced Micro Devices, Inc. Processing unit with a plurality of shader engines
US20110063309A1 (en) * 2009-09-16 2011-03-17 Nvidia Corporation User interface for co-processing techniques on heterogeneous graphics processing units
US20110212761A1 (en) 2010-02-26 2011-09-01 Igt Gaming machine processor
EP2383648B1 (en) * 2010-04-28 2020-02-19 Telefonaktiebolaget LM Ericsson (publ) Technique for GPU command scheduling
US9311102B2 (en) * 2010-07-13 2016-04-12 Advanced Micro Devices, Inc. Dynamic control of SIMDs
US20120229481A1 (en) * 2010-12-13 2012-09-13 Ati Technologies Ulc Accessibility of graphics processing compute resources
US20130141447A1 (en) * 2011-12-06 2013-06-06 Advanced Micro Devices, Inc. Method and Apparatus for Accommodating Multiple, Concurrent Work Inputs

Also Published As

Publication number Publication date
EP2823459A1 (en) 2015-01-14
US9019289B2 (en) 2015-04-28
CN104160420B (zh) 2016-08-24
HUE027044T2 (en) 2016-08-29
EP2823459B1 (en) 2016-02-17
WO2013133957A1 (en) 2013-09-12
KR101552079B1 (ko) 2015-09-09
US20130235053A1 (en) 2013-09-12
JP2015515052A (ja) 2015-05-21
KR20140138842A (ko) 2014-12-04
JP5792402B2 (ja) 2015-10-14
CN104160420A (zh) 2014-11-19

Similar Documents

Publication Publication Date Title
ES2572555T3 (es) Ejecución de aplicaciones gráficas y no gráficas en una unidad de procesamiento de gráficos
US9779469B2 (en) Register spill management for general purpose registers (GPRs)
US9710874B2 (en) Mid-primitive graphics execution preemption
ES2873896T3 (es) Canalización de recursos de cálculo en unidad de procesamiento de gráficos de propósito general
TWI620128B (zh) 在中央處理單元與圖形處理單元間分享資源之裝置與系統
US9304813B2 (en) CPU independent graphics scheduler for performing scheduling operations for graphics hardware
US9606808B2 (en) Method and system for resolving thread divergences
ES2777827T3 (es) Predicados uniformes en sombreadores para unidades de procesamiento de gráficos
CN111080761B (zh) 一种渲染任务的调度方法、装置及计算机存储介质
US20140354660A1 (en) Command instruction management
US9122522B2 (en) Software mechanisms for managing task scheduling on an accelerated processing device (APD)
US20260037134A1 (en) Self-synchronizing remote memory operations in a multiprocessor system
US10235208B2 (en) Technique for saving and restoring thread group operating state
US10748239B1 (en) Methods and apparatus for GPU context register management
US10354623B1 (en) Adaptive buffer latching to reduce display janks caused by variable buffer allocation time
KR20160148638A (ko) 비특권 애플리케이션에 의한 그래픽 작업부하 실행의뢰
US20220004438A1 (en) Gpu program multi-versioning for hardware resource utilization
US20240403048A1 (en) Categorized memory operations for selective memory flushing
US12517730B2 (en) Self-synchronizing remote memory operations in a data center or multiprocessor system
CN118679492B (zh) 动态波配对
US10423424B2 (en) Replicated stateless copy engine
US20260086804A1 (en) Self-synchronizing remote memory operations in a data center or multiprocessor system
US20260003668A1 (en) Workload management on an acceleration processor
US9484115B1 (en) Power savings via selection of SRAM power source