ES2421724T3 - Procedimiento de ejecución de un protocolo criptográfico entre dos entidades electrónicas - Google Patents
Procedimiento de ejecución de un protocolo criptográfico entre dos entidades electrónicasInfo
- Publication number
- ES2421724T3 ES2421724T3 ES01400228T ES01400228T ES2421724T3 ES 2421724 T3 ES2421724 T3 ES 2421724T3 ES 01400228 T ES01400228 T ES 01400228T ES 01400228 T ES01400228 T ES 01400228T ES 2421724 T3 ES2421724 T3 ES 2421724T3
- Authority
- ES
- Spain
- Prior art keywords
- entity
- procedure
- chain
- message
- cryptographic protocol
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
- G06F2207/7219—Countermeasures against side channel or fault attacks
- G06F2207/7223—Randomisation as countermeasure against side channel attacks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/08—Randomization, e.g. dummy operations or using noise
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Storage Device Security (AREA)
- Computer And Data Communications (AREA)
- Communication Control (AREA)
Abstract
Procedimiento de elaboración de un protocolo criptográfico entre una primera entidad electrónica (A) y unasegunda entidad electrónica (B) susceptible de ataque, según el cual se elabora un mensaje cualquiera (M), a partirdel cual es efectuada una cadena de operaciones por dicha segunda entidad, desembocando en la elaboración deun mensaje resultante o respuesta (R), siendo comparada dicha respuesta con el resultado de otro tratamientosemejante aplicado al mensaje y efectuado por dicha primera entidad, caracterizado porque, al menos en ciertasetapas de dicha cadena de operaciones, dicha segunda entidad efectúa, ya sea una operación de un tipo elegido(O1, O2, O3...On), ya sea la misma operación complementada (O 1, O 2, O 3,... O n), dependiendo la elección de unadecisión aleatoria, y porque dicha respuesta está constituida por el resultado de la última operación (O n) de dichacadena, eventualmente complementada.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0001199A FR2804524B1 (fr) | 2000-01-31 | 2000-01-31 | Procede d'execution d'un protocole cryptographique entre deux entites electroniques |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2421724T3 true ES2421724T3 (es) | 2013-09-05 |
Family
ID=8846492
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES01400228T Expired - Lifetime ES2421724T3 (es) | 2000-01-31 | 2001-01-30 | Procedimiento de ejecución de un protocolo criptográfico entre dos entidades electrónicas |
Country Status (8)
Country | Link |
---|---|
US (1) | US8612761B2 (es) |
EP (1) | EP1122909B1 (es) |
JP (2) | JP2001251294A (es) |
CA (1) | CA2332529C (es) |
DK (1) | DK1122909T3 (es) |
ES (1) | ES2421724T3 (es) |
FR (1) | FR2804524B1 (es) |
HK (1) | HK1037938A1 (es) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4199937B2 (ja) * | 2001-03-06 | 2008-12-24 | 株式会社日立製作所 | 耐タンパー暗号処理方法 |
US20040218762A1 (en) | 2003-04-29 | 2004-11-04 | Eric Le Saint | Universal secure messaging for cryptographic modules |
US8209753B2 (en) * | 2001-06-15 | 2012-06-26 | Activcard, Inc. | Universal secure messaging for remote security tokens |
KR100456599B1 (ko) * | 2002-11-12 | 2004-11-09 | 삼성전자주식회사 | 병렬 디이에스 구조를 갖는 암호 장치 |
DE602005025593D1 (de) * | 2004-01-27 | 2011-02-10 | Nxp Bv | Schutz vor leistungsanalyse-angriffen |
DE102004008901A1 (de) * | 2004-02-24 | 2005-09-15 | Giesecke & Devrient Gmbh | Sichere Ergebniswertberechnung |
JP4634788B2 (ja) * | 2004-12-17 | 2011-02-16 | 株式会社東芝 | 暗号演算回路と、該暗号演算回路を有する情報処理装置及びicカード |
JP4804981B2 (ja) * | 2006-03-28 | 2011-11-02 | 三菱電機株式会社 | データ変換装置及びデータ変換プログラム |
FR2903508B1 (fr) * | 2006-07-10 | 2008-10-17 | Sagem Defense Securite | Protection d'un programme interprete par une machine virtuelle |
FR2935823B1 (fr) * | 2008-09-11 | 2010-10-01 | Oberthur Technologies | Procede et dispositif de protection d'un microcircuit contre les attaques. |
FR2935817B1 (fr) * | 2008-09-11 | 2011-12-09 | Oberthur Technologies | Procede de traitement de donnees et dispositif associe. |
JP4849140B2 (ja) * | 2009-02-20 | 2012-01-11 | ソニー株式会社 | データ変換装置、演算処理装置、および演算処理制御方法、並びにコンピュータ・プログラム |
JP5433498B2 (ja) * | 2010-05-27 | 2014-03-05 | 株式会社東芝 | 暗号処理装置 |
EP2466523B1 (en) * | 2010-12-16 | 2015-04-29 | BlackBerry Limited | Method and apparatus for securing a computing device |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2932665B2 (ja) | 1990-10-20 | 1999-08-09 | 富士通株式会社 | 暗号処理用鍵供給方式 |
EP0566811A1 (en) * | 1992-04-23 | 1993-10-27 | International Business Machines Corporation | Authentication method and system with a smartcard |
US5870468A (en) * | 1996-03-01 | 1999-02-09 | International Business Machines Corporation | Enhanced data privacy for portable computers |
US5933501A (en) * | 1996-08-01 | 1999-08-03 | Harris Corporation | `Virtual` encryption scheme combining different encryption operators into compound-encryption mechanism |
US6327661B1 (en) | 1998-06-03 | 2001-12-04 | Cryptography Research, Inc. | Using unpredictable information to minimize leakage from smartcards and other cryptosystems |
WO1999053419A2 (en) | 1998-04-09 | 1999-10-21 | Koninklijke Philips Electronics N.V. | Device for converting series of data elements |
CN100530025C (zh) * | 1998-05-29 | 2009-08-19 | 西门子公司 | 处理数据的方法和装置 |
US20030118190A1 (en) * | 1998-05-29 | 2003-06-26 | Siemens Aktiengesellschaft | Method and apparatus for processing data where a part of the current supplied is supplied to an auxiliary circuit |
ATE370490T1 (de) * | 1998-06-03 | 2007-09-15 | Cryptography Res Inc | Ausgewogene kryptographische rechenmethode und apparat zur schlupfminimierung in smartcards und anderen kryptosystemen |
IL139935A (en) * | 1998-06-03 | 2005-06-19 | Cryptography Res Inc | Des and other cryptographic processes with leak minimization for smartcards and other cryptosystems |
US6301362B1 (en) * | 1998-06-12 | 2001-10-09 | International Business Machines Corporation | Method and apparatus for cryptographically transforming an input block into an output block |
FR2782431B1 (fr) * | 1998-08-17 | 2000-09-29 | Gemplus Sca | Procede et dispositif d'authentification a algorithme symetrique |
DE19837808A1 (de) * | 1998-08-20 | 2000-02-24 | Orga Kartensysteme Gmbh | Verfahren zur Ausführung eines Verschlüsselungsprogramms zur Verschlüsselung von Daten in einem mikroprozessorgestützten, tragbaren Datenträger |
JP3600454B2 (ja) * | 1998-08-20 | 2004-12-15 | 株式会社東芝 | 暗号化・復号装置、暗号化・復号方法、およびそのプログラム記憶媒体 |
FR2784831B1 (fr) * | 1998-10-16 | 2000-12-15 | Gemplus Card Int | Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle secrete |
FR2784829B1 (fr) * | 1998-10-16 | 2000-12-29 | Gemplus Card Int | Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle secrete |
US6347143B1 (en) * | 1998-12-15 | 2002-02-12 | Philips Electronics No. America Corp. | Cryptographic device with encryption blocks connected parallel |
NL1011544C1 (nl) * | 1998-12-30 | 2000-07-03 | Koninkl Kpn Nv | Werkwijze en inrichting voor het cryptografisch bewerken van data. |
US7162031B1 (en) * | 1998-12-30 | 2007-01-09 | Nokia Corporation | Method and device for cryptographically processing data |
FR2789535B1 (fr) * | 1999-02-04 | 2001-09-28 | Bull Cp8 | Procede de securisation d'un ensemble electronique de cryptographie a cle secrete contre les attaques par analyse physique |
FR2792141B1 (fr) * | 1999-04-09 | 2001-06-15 | Bull Cp8 | Procede de securisation d'un ou plusieurs ensembles electroniques mettant en oeuvre un meme algorithme cryptographique avec cle secrete, une utilisation du procede et l'ensemble electronique |
US6594761B1 (en) * | 1999-06-09 | 2003-07-15 | Cloakware Corporation | Tamper resistant software encoding |
-
2000
- 2000-01-31 FR FR0001199A patent/FR2804524B1/fr not_active Expired - Lifetime
-
2001
- 2001-01-30 US US09/771,967 patent/US8612761B2/en not_active Expired - Fee Related
- 2001-01-30 DK DK01400228.1T patent/DK1122909T3/da active
- 2001-01-30 ES ES01400228T patent/ES2421724T3/es not_active Expired - Lifetime
- 2001-01-30 CA CA2332529A patent/CA2332529C/fr not_active Expired - Lifetime
- 2001-01-30 EP EP01400228.1A patent/EP1122909B1/fr not_active Expired - Lifetime
- 2001-01-31 JP JP2001024455A patent/JP2001251294A/ja active Pending
- 2001-11-30 HK HK01108463.0A patent/HK1037938A1/xx not_active IP Right Cessation
-
2007
- 2007-11-28 JP JP2007306865A patent/JP4822450B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US8612761B2 (en) | 2013-12-17 |
JP2001251294A (ja) | 2001-09-14 |
FR2804524B1 (fr) | 2002-04-19 |
JP2008067416A (ja) | 2008-03-21 |
US20010012360A1 (en) | 2001-08-09 |
CA2332529C (fr) | 2010-08-17 |
CA2332529A1 (fr) | 2001-07-31 |
FR2804524A1 (fr) | 2001-08-03 |
HK1037938A1 (en) | 2002-02-22 |
EP1122909A1 (fr) | 2001-08-08 |
DK1122909T3 (da) | 2013-07-08 |
EP1122909B1 (fr) | 2013-04-17 |
JP4822450B2 (ja) | 2011-11-24 |
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