ES2147653T3 - Sistema de ordenador. - Google Patents

Sistema de ordenador.

Info

Publication number
ES2147653T3
ES2147653T3 ES96927020T ES96927020T ES2147653T3 ES 2147653 T3 ES2147653 T3 ES 2147653T3 ES 96927020 T ES96927020 T ES 96927020T ES 96927020 T ES96927020 T ES 96927020T ES 2147653 T3 ES2147653 T3 ES 2147653T3
Authority
ES
Spain
Prior art keywords
computer system
recovery
cmy
precise
fast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96927020T
Other languages
English (en)
Inventor
Andreas Puhl
Wolfgang Bauer
Heinz-Werner Ramke
Karl Ruppert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Application granted granted Critical
Publication of ES2147653T3 publication Critical patent/ES2147653T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4405Initialisation of multiprocessor systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operations
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1441Resetting or repowering

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)

Abstract

LOS SISTEMAS INFORMATICOS DEBERIAN PONERSE EN MARCHA LO MAS RAPIDO POSIBLE. PARA ELLO, EL SISTEMA DE RECUPERACION QUE PROPONE LA INVENCION REUNE EN UNA MEMORIA COMUN (CMY), EN PARALELO Y ANTES DE TRANSMITIRLOS, LOS DATOS QUE ES PRECISO TRANSFERIR A LAS UNIDADES PERIFERICAS PARA SU RECUPERACION.
ES96927020T 1995-07-21 1996-07-16 Sistema de ordenador. Expired - Lifetime ES2147653T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP95111536 1995-07-21

Publications (1)

Publication Number Publication Date
ES2147653T3 true ES2147653T3 (es) 2000-09-16

Family

ID=8219457

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96927020T Expired - Lifetime ES2147653T3 (es) 1995-07-21 1996-07-16 Sistema de ordenador.

Country Status (6)

Country Link
US (1) US6047384A (es)
EP (1) EP0840912B1 (es)
CN (1) CN1093955C (es)
DE (1) DE59605364D1 (es)
ES (1) ES2147653T3 (es)
WO (1) WO1997004385A1 (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19827430C2 (de) * 1997-07-22 2001-07-12 Siemens Ag Überwachungsverfahren zur Erkennung von Endlosschleifen und blockierten Prozessen in einem Rechnersystem
US6336185B1 (en) * 1998-09-24 2002-01-01 Phoenix Technologies Ltd. Use of other processors during BIOS boot sequence to minimize boot time
JP2002259201A (ja) * 2001-03-02 2002-09-13 Hitachi Ltd 計算機システムの起動方法
US6766482B1 (en) 2001-10-31 2004-07-20 Extreme Networks Ethernet automatic protection switching
US20070027793A1 (en) * 2005-08-01 2007-02-01 Lutnick Howard W Systems and methods for maintaining the viability of a market order type in fluctuating markets
US20070083867A1 (en) * 2005-09-09 2007-04-12 International Business Machines Corporation Method and system to recover from control block hangs in a heterogenous multiprocessor environment
US7996585B2 (en) * 2005-09-09 2011-08-09 International Business Machines Corporation Method and system for state tracking and recovery in multiprocessing computing systems
US7502957B2 (en) * 2005-09-09 2009-03-10 International Business Machines Corporation Method and system to execute recovery in non-homogeneous multi processor environments
US7457985B2 (en) * 2005-09-09 2008-11-25 International Business Machines Corporation Method to detect errors in computer systems by using state tracking
CN101398681A (zh) * 2007-09-29 2009-04-01 刘小勇 基于总线的自动烹调设备控制系统以及烹调设备

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4296465A (en) * 1977-11-03 1981-10-20 Honeywell Information Systems Inc. Data mover
US4443850A (en) * 1981-12-01 1984-04-17 Burroughs Corporation Interface circuit for subsystem controller
US4578789A (en) * 1982-11-30 1986-03-25 Itt Corporation Simultaneous voice and data communication and data base access in a switching system using a tone bus or broadcast mode
US4914576A (en) * 1986-12-18 1990-04-03 Bull Hn Information Systems Inc. Apparatus and method of loading a control store memory of a central subsystem
JPH0690682B2 (ja) * 1987-02-28 1994-11-14 日本電気株式会社 マルチプロセツサシステムの障害処理方式
JP2753706B2 (ja) * 1987-12-09 1998-05-20 富士通株式会社 計算機におけるipl方法
EP0541534A1 (en) * 1990-08-03 1993-05-19 Du Pont Pixel Systems Limited Data-array processing systems
EP0483433A1 (en) * 1990-10-31 1992-05-06 International Business Machines Corporation Initialization method for the initialization of secondary stations in an information processing system
JP2864741B2 (ja) * 1990-12-19 1999-03-08 株式会社日立製作所 データインテグリティを保証する通信システム
CA2138263C (en) * 1993-09-27 2000-02-22 Yukihiko Okumura Multiprocessor
JPH0876166A (ja) * 1994-09-07 1996-03-22 Nikon Corp 不揮発メモリを有するシステム
US5761422A (en) * 1995-03-22 1998-06-02 Telefonaktiebolaget Lm Ericsson Transferring address of data in buffer memory between processors using read-only register with respect to second processor
JP2793517B2 (ja) * 1995-03-22 1998-09-03 甲府日本電気株式会社 データ転送制御装置

Also Published As

Publication number Publication date
EP0840912A1 (de) 1998-05-13
CN1093955C (zh) 2002-11-06
CN1191617A (zh) 1998-08-26
WO1997004385A1 (de) 1997-02-06
US6047384A (en) 2000-04-04
EP0840912B1 (de) 2000-05-31
DE59605364D1 (de) 2000-07-06

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