ES2116267T3 - DATABASE TREATMENT SYSTEM USING A MULTIPROCESSOR SYSTEM. - Google Patents

DATABASE TREATMENT SYSTEM USING A MULTIPROCESSOR SYSTEM.

Info

Publication number
ES2116267T3
ES2116267T3 ES90302972T ES90302972T ES2116267T3 ES 2116267 T3 ES2116267 T3 ES 2116267T3 ES 90302972 T ES90302972 T ES 90302972T ES 90302972 T ES90302972 T ES 90302972T ES 2116267 T3 ES2116267 T3 ES 2116267T3
Authority
ES
Spain
Prior art keywords
access
processor module
resource
shared
database
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90302972T
Other languages
Spanish (es)
Inventor
Katsumi Hayashi
Masaaki Mitani
Yutaka Sekine
Tomohiro Hayashi
Kazuhiko Saito
Yoshinori Shimogai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1068815A external-priority patent/JPH07120305B2/en
Priority claimed from JP1068814A external-priority patent/JP2825839B2/en
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of ES2116267T3 publication Critical patent/ES2116267T3/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/524Deadlock detection or avoidance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/912Applications of a database
    • Y10S707/922Communications
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99931Database or file accessing
    • Y10S707/99938Concurrency, e.g. lock management in shared database

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

UN SISTEMA DE PROCESAMIENTO DE BASE DE DATOS QUE USA UN SISTEMA MULTIPROCESADOR INCLUYE:-UNIDAD DE ALMACENAMIENTO (29), PROPORCIONADA EN UNA MEMORIA COMPARTIDA (10) DEL SISTEMA, PARA ALMACENAR INFORMACION DE GESTION DE BASE DE DATOS QUE REPRESENTE BIEN UN OBJETO DE UNA OPERACION DE PROCESAMIENTO COMPARTIDO O UN OBJETO DE UNA OPERACION DE PROCESAMIENTO LOCAL PARA CADA RECURSO; UNA UNIDAD DE GESTION DE ACCESO(23), PROPORCIONADA EN CADA UNO DE LOS DIVERSOS MODULOS DE PROCESADOR (11), PARA REALIZAR UN CONTROL DE ACCESO PARA UNA PETICION DE ACCESO A LA BASE DE DATOS BAJO LA OPERACION DE PROCESAMIENTO COMPARTIDA O LA OPERACION DE PROCESAMIENTO LOCAL DE ACUERDO CON LA INFORMACION DE LA GESTION DE LA BASE DE DATOS, REALIZANDO SIMETRICAMENTE LA OPERACION DE PROCESAMIENTO COMPARTIDA, Y REALIZANDO ASIMETRICAMENTE LA OPERACION DE PROCESAMIENTO LOCAL EN CADA MODULO DEL PROCESADOR; Y UNA UNIDAD DE CONTROL (24) PROPORCIONADA EN EL MODULO DE PROCESADOR PARA CONTROLAR LA CONVERSION COMPARTIDAÑLOCAL DE TAL FORMA QUE: SE GESTIONE UN ESTADO DE ACCESO DEL RECURSO PARA CADA RECURSO; CUANDO UNA FRECUENCIA DEL ACCESO SE DISTRIBUYA DESIGUALMENTE A UN MODULO DE PROCESADOR PARTICULAR, EL RECURSO DE ESE MODULO DE PROCESADOR SE DETERMINA COMO EL OBJETO DE LA OPERACION DE PROCESAMIENTO LOCAL EN ESE MODULO DE PROCESAMIENTO LOCAL; Y CUANDO LA FRECUENCIA DE ACCESO NO SE DISTRIBUYE DESIGUALMENTE A UN MODULO DE PROCESADOR PARTICULAR, EL RECURSO DE UN MODULO DE PROCESADOR PARTICULAR SE DETERMINA COMO EL OBJETO DE LA OPERACION DEL PROCESAMIENTO COMPARTIDO. EL SISTEMA DE PROCESAMIENTO DE BASE DE DATOS INCLUYE ADEMAS UN SISTEMA DE DETECCION DE PARALISIS.A DATABASE PROCESSING SYSTEM USING A MULTIPROCESSOR SYSTEM INCLUDES: -STORAGE UNIT (29), PROVIDED IN A SHARED MEMORY (10) OF THE SYSTEM, TO STORE A DATABASE MANAGEMENT INFORMATION THAT REPRESENTS A WELL OBJECT SHARED PROCESSING OPERATION OR A PURPOSE OF A LOCAL PROCESSING OPERATION FOR EACH RESOURCE; AN ACCESS MANAGEMENT UNIT (23), PROVIDED IN EACH OF THE VARIOUS PROCESSOR MODULES (11), TO PERFORM AN ACCESS CONTROL FOR A DATABASE ACCESS REQUEST UNDER THE SHARED PROCESSING OPERATION OR THE OPERATION OF LOCAL PROCESSING ACCORDING TO THE INFORMATION OF THE DATABASE MANAGEMENT, SIMILARLY PERFORMING THE SHARED PROCESSING OPERATION, AND ASYMMETRICALLY PERFORMING THE LOCAL PROCESSING OPERATION IN EACH PROCESSOR MODULE; AND A CONTROL UNIT (24) PROVIDED IN THE PROCESSOR MODULE TO CONTROL THE LOCAL SHARED CONVERSION SO THAT: A STATE OF ACCESS TO THE RESOURCE IS MANAGED FOR EACH RESOURCE; WHEN A FREQUENCY OF ACCESS IS UNEVENLY DISTRIBUTED TO A PARTICULAR PROCESSOR MODULE, THE RESOURCE OF THAT PROCESSOR MODULE IS DETERMINED AS THE OBJECT OF THE LOCAL PROCESSING OPERATION IN THAT LOCAL PROCESSING MODULE; AND WHEN THE FREQUENCY OF ACCESS IS NOT UNEVENLY DISTRIBUTED TO A PARTICULAR PROCESSOR MODULE, THE RESOURCE OF A PARTICULAR PROCESSOR MODULE IS DETERMINED AS THE OBJECT OF THE OPERATION OF SHARED PROCESSING. THE DATABASE PROCESSING SYSTEM FURTHER INCLUDES A PARALYSIS DETECTION SYSTEM.

ES90302972T 1989-03-20 1990-03-20 DATABASE TREATMENT SYSTEM USING A MULTIPROCESSOR SYSTEM. Expired - Lifetime ES2116267T3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1068815A JPH07120305B2 (en) 1989-03-20 1989-03-20 Database processing method by multiprocessor
JP1068814A JP2825839B2 (en) 1989-03-20 1989-03-20 Deadlock detection processing method

Publications (1)

Publication Number Publication Date
ES2116267T3 true ES2116267T3 (en) 1998-07-16

Family

ID=26410003

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90302972T Expired - Lifetime ES2116267T3 (en) 1989-03-20 1990-03-20 DATABASE TREATMENT SYSTEM USING A MULTIPROCESSOR SYSTEM.

Country Status (7)

Country Link
US (1) US5649184A (en)
EP (1) EP0389242B1 (en)
KR (1) KR930000853B1 (en)
AU (1) AU614225B2 (en)
CA (1) CA2011807C (en)
DE (1) DE69032337T2 (en)
ES (1) ES2116267T3 (en)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0962586A (en) * 1995-08-25 1997-03-07 Fujitsu Ltd Information processor and data processing method for this processor
JP3857409B2 (en) * 1998-03-17 2006-12-13 富士通株式会社 Distributed processing system, distributed processing method, and computer-readable recording medium recording distributed processing program
JP2000047994A (en) * 1998-07-27 2000-02-18 Fujitsu Ltd Information processor
US7346910B1 (en) * 2000-05-26 2008-03-18 International Business Machines Incorporation Administration of groups of computer programs, data processing systems, or system resources
EP1170665B1 (en) * 2000-07-06 2004-02-04 Texas Instruments France Multi-processor system verification circuitry
US7233998B2 (en) * 2001-03-22 2007-06-19 Sony Computer Entertainment Inc. Computer architecture and software cells for broadband networks
US7549145B2 (en) * 2003-09-25 2009-06-16 International Business Machines Corporation Processor dedicated code handling in a multi-processor environment
US20050071828A1 (en) * 2003-09-25 2005-03-31 International Business Machines Corporation System and method for compiling source code for multi-processor environments
US7389508B2 (en) * 2003-09-25 2008-06-17 International Business Machines Corporation System and method for grouping processors and assigning shared memory space to a group in heterogeneous computer environment
US7523157B2 (en) * 2003-09-25 2009-04-21 International Business Machines Corporation Managing a plurality of processors as devices
US7475257B2 (en) * 2003-09-25 2009-01-06 International Business Machines Corporation System and method for selecting and using a signal processor in a multiprocessor system to operate as a security for encryption/decryption of data
US7516456B2 (en) * 2003-09-25 2009-04-07 International Business Machines Corporation Asymmetric heterogeneous multi-threaded operating system
US7478390B2 (en) * 2003-09-25 2009-01-13 International Business Machines Corporation Task queue management of virtual devices using a plurality of processors
US7415703B2 (en) * 2003-09-25 2008-08-19 International Business Machines Corporation Loading software on a plurality of processors
US7496917B2 (en) * 2003-09-25 2009-02-24 International Business Machines Corporation Virtual devices using a pluarlity of processors
US7444632B2 (en) * 2003-09-25 2008-10-28 International Business Machines Corporation Balancing computational load across a plurality of processors
US20050289143A1 (en) * 2004-06-23 2005-12-29 Exanet Ltd. Method for managing lock resources in a distributed storage system
US7735089B2 (en) * 2005-03-08 2010-06-08 Oracle International Corporation Method and system for deadlock detection in a distributed environment
US7616218B1 (en) * 2005-12-05 2009-11-10 Nvidia Corporation Apparatus, system, and method for clipping graphics primitives
JP2007328461A (en) * 2006-06-06 2007-12-20 Matsushita Electric Ind Co Ltd Asymmetric multiprocessor
US8601223B1 (en) 2006-09-19 2013-12-03 Nvidia Corporation Techniques for servicing fetch requests utilizing coalesing page table entries
US8543792B1 (en) 2006-09-19 2013-09-24 Nvidia Corporation Memory access techniques including coalesing page table entries
US8347064B1 (en) 2006-09-19 2013-01-01 Nvidia Corporation Memory access techniques in an aperture mapped memory space
US8352709B1 (en) 2006-09-19 2013-01-08 Nvidia Corporation Direct memory access techniques that include caching segmentation data
US8707011B1 (en) 2006-10-24 2014-04-22 Nvidia Corporation Memory access techniques utilizing a set-associative translation lookaside buffer
US8700883B1 (en) 2006-10-24 2014-04-15 Nvidia Corporation Memory access techniques providing for override of a page table
US8504794B1 (en) 2006-11-01 2013-08-06 Nvidia Corporation Override system and method for memory access management
US8347065B1 (en) 2006-11-01 2013-01-01 Glasco David B System and method for concurrently managing memory access requests
US8607008B1 (en) 2006-11-01 2013-12-10 Nvidia Corporation System and method for independent invalidation on a per engine basis
US8533425B1 (en) 2006-11-01 2013-09-10 Nvidia Corporation Age based miss replay system and method
US8706975B1 (en) 2006-11-01 2014-04-22 Nvidia Corporation Memory access management block bind system and method
US8700865B1 (en) 2006-11-02 2014-04-15 Nvidia Corporation Compressed data access system and method
US8543773B2 (en) 2008-08-25 2013-09-24 International Business Machines Corporation Distributed shared memory
US9411661B2 (en) * 2009-04-08 2016-08-09 International Business Machines Corporation Deadlock avoidance
US10146545B2 (en) 2012-03-13 2018-12-04 Nvidia Corporation Translation address cache for a microprocessor
US9880846B2 (en) 2012-04-11 2018-01-30 Nvidia Corporation Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries
US10241810B2 (en) 2012-05-18 2019-03-26 Nvidia Corporation Instruction-optimizing processor with branch-count table in hardware
US9104502B2 (en) 2012-12-15 2015-08-11 International Business Machines Corporation Managing resource pools for deadlock avoidance
US20140189310A1 (en) 2012-12-27 2014-07-03 Nvidia Corporation Fault detection in instruction translations
US10108424B2 (en) 2013-03-14 2018-10-23 Nvidia Corporation Profiling code portions to generate translations
TWI513230B (en) * 2013-04-29 2015-12-11 Ind Tech Res Inst Remote management systems and apparatuses for cwmp and methods for improving the cwmp performance thereof
CN108809863A (en) * 2017-05-05 2018-11-13 中国航空无线电电子研究所 A kind of on-board data storage resource Distributed sharing network system based on AFDX

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1504112A (en) * 1976-03-17 1978-03-15 Ibm Interactive enquiry systems
US4320451A (en) * 1974-04-19 1982-03-16 Honeywell Information Systems Inc. Extended semaphore architecture
US4189771A (en) * 1977-10-11 1980-02-19 International Business Machines Corporation Method and means for the detection of deadlock among waiting tasks in a multiprocessing, multiprogramming CPU environment
US4245306A (en) * 1978-12-21 1981-01-13 Burroughs Corporation Selection of addressed processor in a multi-processor network
US4707781A (en) * 1979-01-09 1987-11-17 Chopp Computer Corp. Shared memory computer method and apparatus
US4484262A (en) * 1979-01-09 1984-11-20 Sullivan Herbert W Shared memory computer method and apparatus
US4574350A (en) * 1982-05-19 1986-03-04 At&T Bell Laboratories Shared resource locking apparatus
US4494193A (en) * 1982-09-30 1985-01-15 At&T Bell Laboratories Deadlock detection and resolution scheme
US4648035A (en) * 1982-12-06 1987-03-03 Digital Equipment Corporation Address conversion unit for multiprocessor system
US4591977A (en) * 1983-03-23 1986-05-27 The United States Of America As Represented By The Secretary Of The Air Force Plurality of processors where access to the common memory requires only a single clock interval
JPS6054052A (en) * 1983-09-02 1985-03-28 Nec Corp Processing continuing system
JPS6171750A (en) * 1984-09-17 1986-04-12 Kokusai Denshin Denwa Co Ltd <Kdd> Protocol verification system
US4843542A (en) * 1986-11-12 1989-06-27 Xerox Corporation Virtual memory cache for use in multi-processing systems
US5123101A (en) * 1986-11-12 1992-06-16 Xerox Corporation Multiple address space mapping technique for shared memory wherein a processor operates a fault handling routine upon a translator miss
US5142683A (en) * 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
JPS63263557A (en) * 1987-04-13 1988-10-31 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Adjustment of access by simultaneous transaction for hierarchical related resource
US5251308A (en) * 1987-12-22 1993-10-05 Kendall Square Research Corporation Shared memory multiprocessor with data hiding and post-store
US5058006A (en) * 1988-06-27 1991-10-15 Digital Equipment Corporation Method and apparatus for filtering invalidate requests

Also Published As

Publication number Publication date
CA2011807C (en) 1999-02-23
KR900015010A (en) 1990-10-25
US5649184A (en) 1997-07-15
EP0389242B1 (en) 1998-05-27
CA2011807A1 (en) 1990-09-20
DE69032337T2 (en) 1998-09-24
AU5200190A (en) 1990-09-27
EP0389242A2 (en) 1990-09-26
DE69032337D1 (en) 1998-07-02
KR930000853B1 (en) 1993-02-06
AU614225B2 (en) 1991-08-22
EP0389242A3 (en) 1993-06-30

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