ES2105143T3 - Procedimiento y dispositivo para la vigilancia temporal del funcionamiento de un procesador. - Google Patents

Procedimiento y dispositivo para la vigilancia temporal del funcionamiento de un procesador.

Info

Publication number
ES2105143T3
ES2105143T3 ES93400096T ES93400096T ES2105143T3 ES 2105143 T3 ES2105143 T3 ES 2105143T3 ES 93400096 T ES93400096 T ES 93400096T ES 93400096 T ES93400096 T ES 93400096T ES 2105143 T3 ES2105143 T3 ES 2105143T3
Authority
ES
Spain
Prior art keywords
real time
processor
surveillance
memorization
record
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93400096T
Other languages
English (en)
Inventor
Olivier Humez
Marc Fumey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales Avionics SAS
Original Assignee
Thales Avionics SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales Avionics SAS filed Critical Thales Avionics SAS
Application granted granted Critical
Publication of ES2105143T3 publication Critical patent/ES2105143T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

ESTE PROCESO CONSISTE EN HACER EJECUTAR EL PROGRAMA DE APLICACION A LO LARGO DE CICLOS DE TIEMPO REAL SECUENCIADOS POR UNA SEÑAL DE RELOJ DE TIEMPO REAL (HTR) CUYO PERIODO RECURRENTE (T) PRESENTA DOS ESTADOS SUCESIVOS (T1, T2), EN HACER DETECTAR POR EL PROCESADOR (1) LA TRANSICION DE ESTA SEÑAL QUE MARCA EL INICIO DE CADA PERIODO (T) Y LA MEMORIZACION DE LA HORA EN TIEMPO REAL A LA QUE SE HA PRODUCIDO ESTA TRANSICION EN UN REGISTRO DE COHERENCIA DE UN CIRCUITO DE VIGILANCIA (2), EN VERIFICAR QUE LA MEMORIZACION SE HA EFECTUADO A LO LARGO DEL ESTADO (T1), EN COMPARAR EL CONTENIDO DE ESTE REGISTRO CON LA HORA EN TIEMPO REAL DETERMINADA PARALELAMENTE POR EL CIRCUITO DE VIGILANCIA (2) Y EN TRANSMITIR UNA SEÑAL DE DEFECTO CUANDO DICHA VERIFICACION Y DICHA COMPARACION HAN REVELADO UNA ANOMALIA. LA INVENCION SE APLICA PARTICULARMENTE A LA VIGILANCIA DE LOS PROCESADORES A BORDO DE AERODINOS.
ES93400096T 1992-02-21 1993-01-15 Procedimiento y dispositivo para la vigilancia temporal del funcionamiento de un procesador. Expired - Lifetime ES2105143T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9202022A FR2687810B1 (fr) 1992-02-21 1992-02-21 Procede et dispositif pour la surveillance temporelle du fonctionnement d'un processeur.

Publications (1)

Publication Number Publication Date
ES2105143T3 true ES2105143T3 (es) 1997-10-16

Family

ID=9426894

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93400096T Expired - Lifetime ES2105143T3 (es) 1992-02-21 1993-01-15 Procedimiento y dispositivo para la vigilancia temporal del funcionamiento de un procesador.

Country Status (4)

Country Link
EP (1) EP0557142B1 (es)
DE (1) DE69312344T2 (es)
ES (1) ES2105143T3 (es)
FR (1) FR2687810B1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2383154A (en) * 2001-12-17 2003-06-18 Inventec Corp Electronic data interchange platform fault warning system and a file reception/sending record data structure
DE102004019392A1 (de) 2004-04-19 2005-12-08 Endress + Hauser Gmbh + Co. Kg Digitaler Messumformer mit Stromsignal
DE102004027496A1 (de) * 2004-06-04 2005-12-22 Conti Temic Microelectronic Gmbh Elektronisches Bauteil
DE102004043590A1 (de) * 2004-09-09 2006-03-30 Siemens Ag Verfahren zum Überwachen der Funktionen von Prozessoren in einem Mehrprozessorsystem

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4683532A (en) * 1984-12-03 1987-07-28 Honeywell Inc. Real-time software monitor and write protect controller
JPH0795291B2 (ja) * 1986-01-13 1995-10-11 沖電気工業株式会社 ウオツチドツグタイマ
DE3704318C2 (de) * 1987-02-12 1996-04-11 Vdo Schindling Anordnungen zur Überwachung der Funktion eines Mikroprozessors
US5012435A (en) * 1988-11-17 1991-04-30 International Business Machines Corporation Multiple event timer circuit

Also Published As

Publication number Publication date
FR2687810B1 (fr) 1996-08-14
EP0557142A1 (fr) 1993-08-25
FR2687810A1 (fr) 1993-08-27
DE69312344T2 (de) 1998-01-08
DE69312344D1 (de) 1997-09-04
EP0557142B1 (fr) 1997-07-23

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