ES199183U - Caja para dispositivo de semiconductores. - Google Patents

Caja para dispositivo de semiconductores.

Info

Publication number
ES199183U
ES199183U ES0199183U ES199183U ES199183U ES 199183 U ES199183 U ES 199183U ES 0199183 U ES0199183 U ES 0199183U ES 199183 U ES199183 U ES 199183U ES 199183 U ES199183 U ES 199183U
Authority
ES
Spain
Prior art keywords
box
translation
machine
semiconductor device
legally binding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES0199183U
Other languages
English (en)
Other versions
ES199183Y (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS ATES Componenti Elettronici SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS ATES Componenti Elettronici SpA filed Critical SGS ATES Componenti Elettronici SpA
Publication of ES199183U publication Critical patent/ES199183U/es
Application granted granted Critical
Publication of ES199183Y publication Critical patent/ES199183Y/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for individual devices of subclass H10D
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

Caja para dispositivo de semiconductores, particularmente integrados y de baja tensión de funcionamiento, del tipo en que el cuerpo de resina se moldea encima de un fondo metálico troquelado cuya superficie, por el lado exterior, sirve para la fijación mecánica y el contacto térmico, mientras que por el lado interior se prolonga más allá de una de las superficie mayores del cuerpo de resina para permitir la utilización de medios simples de fijación mecánica, dimensionada de modo que posea resistencia térmica unión-caja inferior a 3°C/watio, caracterizada porque algunas partes componentes de la caja tienen dimensiones iguales a las de una caja normalizada (conocida como JEDEC TO con terminales, mientras que otras partes difieren de las normalizadas para obtener esencialmente que sean cinco los terminales utilizables de dicho dispositivo.
ES1973199183U 1973-09-26 1973-12-31 Caja para dispositivo de semiconductores. Expired ES199183Y (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT29390/73A IT993429B (it) 1973-09-26 1973-09-26 Perfezionamento di una cassa per dispositivo a semiconduttori

Publications (2)

Publication Number Publication Date
ES199183U true ES199183U (es) 1975-07-16
ES199183Y ES199183Y (es) 1975-11-16

Family

ID=11226889

Family Applications (1)

Application Number Title Priority Date Filing Date
ES1973199183U Expired ES199183Y (es) 1973-09-26 1973-12-31 Caja para dispositivo de semiconductores.

Country Status (8)

Country Link
US (1) US4032706A (es)
JP (1) JPS5523463B2 (es)
DE (1) DE2364837A1 (es)
ES (1) ES199183Y (es)
FR (1) FR2245084B1 (es)
GB (1) GB1467054A (es)
IT (1) IT993429B (es)
NL (1) NL7400553A (es)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214120A (en) * 1978-10-27 1980-07-22 Western Electric Company, Inc. Electronic device package having solder leads and methods of assembling the package
US4439918A (en) * 1979-03-12 1984-04-03 Western Electric Co., Inc. Methods of packaging an electronic device
FR2462024A1 (fr) * 1979-07-17 1981-02-06 Thomson Csf Plate-forme support de grille de connexion, notamment pour boitier de circuits integres, et boitier comportant une telle plate-forme
JPS57188858A (en) * 1981-05-18 1982-11-19 Matsushita Electronics Corp Plastic molded type semiconductor device
USD316251S (en) 1988-12-19 1991-04-16 Mosaic Semiconductor, Inc. In-line semiconductor package
US4994897A (en) * 1989-10-26 1991-02-19 Motorola, Inc. Multi-level semiconductor package
JPH0422762A (ja) * 1990-05-16 1992-01-27 Mitsubishi Electric Corp イグナイタ
JP2000049184A (ja) * 1998-05-27 2000-02-18 Hitachi Ltd 半導体装置およびその製造方法
FR2782573B1 (fr) * 1998-08-24 2003-10-17 Possehl Electronic France Sa Support metallique, notamment pour composants electroniques de puissance
US7005728B1 (en) 2004-06-03 2006-02-28 National Semiconductor Corporation Lead configuration for inline packages
JP1646470S (es) * 2019-05-14 2019-11-25
JP7607430B2 (ja) * 2020-10-12 2024-12-27 株式会社マキタ 作業機

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3368114A (en) * 1965-07-06 1968-02-06 Radiation Inc Microelectronic circuit packages with improved connection structure
DE1614364C3 (de) * 1966-06-01 1979-04-05 Rca Corp., New York, N.Y. (V.St.A.) Verfahren zur Montage eines Halbleiter-Kristallelementes
US3416348A (en) * 1966-09-30 1968-12-17 Westinghouse Electric Corp Flat-pack lead bending device
US3606673A (en) * 1968-08-15 1971-09-21 Texas Instruments Inc Plastic encapsulated semiconductor devices
NL6903229A (es) * 1969-03-01 1970-09-03
US3839782A (en) * 1972-03-15 1974-10-08 M Lincoln Method for using a lead frame for the manufacture of electric devices having semiconductor chips placed in a face-to-face relation

Also Published As

Publication number Publication date
FR2245084B1 (es) 1976-10-08
NL7400553A (nl) 1975-04-01
FR2245084A1 (es) 1975-04-18
IT993429B (it) 1975-09-30
US4032706A (en) 1977-06-28
DE2364837A1 (de) 1975-04-24
GB1467054A (en) 1977-03-16
ES199183Y (es) 1975-11-16
JPS5523463B2 (es) 1980-06-23
JPS5061980A (es) 1975-05-27

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