Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MATUSHITA ELECTRONICS CORP
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics CorpfiledCriticalMatsushita Electronics Corp
Priority to ES1969181668UpriorityCriticalpatent/ES181668Y/en
Publication of ES181668UpublicationCriticalpatent/ES181668U/en
Application grantedgrantedCritical
Publication of ES181668YpublicationCriticalpatent/ES181668Y/en
Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices
(AREA)
Abstract
An arrangement of semiconductor structure, characterized in that at least three table semiconductor units are formed in a regularly spaced relation on a single substrate and a heat sink is in contact with the surface of each of the table units. (Machine-translation by Google Translate, not legally binding)
ES1969181668U1969-11-181969-11-18
A SEMICONDUCTIVE STRUCTURE ARRANGEMENT.
ExpiredES181668Y
(en)
Improvements introduced in the manufacture of articles that include a metal base and a crystalline polyolephine layer applied on the metal surface. (Machine-translation by Google Translate, not legally binding)