Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
  • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
  • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
  • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
  • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells

Definitions

• Electron Transport Layer- and/or Hole Transport Layer-Free Silicon HeteroJunction Solar Cells are Electron Transport Layer- and/or Hole Transport Layer-Free Silicon HeteroJunction Solar Cells
• the present invention is in the field of a semiconductor device sensitive to light, and specially adapted for the conversion of the energy of such radiation into electrical energy, in particular a silicon hetero-junction solar cell, or photovoltaic (PV) cell, a processor for the manufacture thereof, and details thereof.
• Said solar cells comprise at least one hetero junc tion and typically two hetero junctions.
• a solar cell, or photovoltaic (PV) cell is an electrical device that converts energy of light, typically sun light (hence “solar”), directly into electricity by the so-called photovoltaic effect.
• the solar cell may be considered a photoelectric cell, having electrical characteristics, such as current, voltage, resistance, and fill factor, which vary when exposed to light and which vary from type of cell to type.
• Solar cells are described as being photovoltaic irrespective of whether the source is sunlight or artificial light. They may also be used as photo detector.
• charge carriers of opposite types are separated.
• the separated charge carriers are “extracted” to an external circuit, typically providing a DC-cur rent.
• a DC-current may be transformed into an AC-current, e.g. by using a transformer.
• solar cells are grouped into an array of elements. Various elements may form a panel, and various panels may form a system.
• Wafer-based c-Si solar cells contribute to more than 90% of the total PV market. Ac cording to recent predictions, this trend will remain for the upcoming years and many years beyond. Due to their simplified process, conventional c-Si solar cells dominate a large part of the market. As an alternative to the industry to improve the power to cost ratio, the silicon heterojunction approach has become increasingly attractive for the PV industry, even though the relatively complicated process to deploy the proper front layers, such as a transparent conductive oxide (TCO) and an inherent low thermal budget of the cells limiting usage of existing production lines and thus result in a relatively small market share so far.
• TCO transparent conductive oxide
• a hetero junction is an interface that occurs between two layers or regions of dissimilar crystalline semiconductors. These semiconducting materials have unequal band gaps as opposed to a homojunction.
• a homojunction relates to a semiconductor interface formed by typically two layers of similar semiconductor material, wherein these semiconductor materials have equal band gaps and typically have a different doping (either in concentration, in type, or both).
• a common example is a homojunction at the interface between an n-type layer and a p-type layer, which is referred to as a p-n junction.
• advanced techniques are used to precisely control a deposition thickness of layers involved and to create a lattice-matched abrupt interface.
• Three types of heterojunctions can be distinguished, a straddling gap, a staggered gap, and a broken gap.
• a disadvantage of solar cells is that the conversion per se is not very efficient, typi cally, for Si-solar cells, limited to somewhat above 20%. Theoretically a single p-n junction crystalline silicon device has a maximum power efficiency of 32%. An infinite number of layers may reach a maximum power efficiency of 86%. The highest ratio achieved for a solar cell per se at present is about 44%. For commercial silicon solar cells, the record is about 26.7% (an interdigitated back-contacted silicon heterojunction solar cell). In view of effi ciency, the front contacts may be moved to a rear or back side, eliminating shaded areas. In addition, thin silicon films were applied to the wafer.
• Solar cells also suffer from various im perfections, such as recombination losses, reflectance losses, heating during use, thermody namic losses, shadow, internal resistance, such as shunt and series resistance, leakage, etc.
• a qualification of performance of a solar cell is the fill factor (FF).
• the fill factor may be de fined as a ratio of an actual maximum obtainable power to the product of the open-circuit voltage and short-circuit current. It is considered to be a key parameter in evaluating perfor mance.
• a typical advanced commercial solar cell has a fill factor > 0.75, whereas less ad vanced cells have a fill factor between 0.4 and 0.7. Cells with a high fill factor typically have a low equivalent series resistance and a high equivalent shunt resistance; in other words, less internal losses occur. Efficiency is nevertheless improving gradually, so every relatively small improvement is welcomed and of significant importance.
• a solar cell having a full area front passivating contact is not attractive, such as due to highly absorptive materials used to build such a structure. That is the case of heav ily doped poly-silicon and a-Si layers.
• the process requires a very thin polysilicon film for minimizing parasitic absorption loss, and in case of a-Si, the process re quires e.g. an extra transparent conductive oxide (TCO) layer for supporting the carrier lat eral transport.
• TCO transparent conductive oxide
• the electron transport layer and/or hole transport layer hinder the conver sion of light into electrical power.
• typically extra process steps in the manufacture of a solar cell are involved, such as a doping step, and the deposition of the transport layer, and possibly even (intermediate) cleaning steps, as well as extra or multi-chamber process tools, typically deposition tools.
• Ex tra tools or multi-chamber tools in addition add to the cost of production as more of the ex pensive clean-room surface is occupied thereby.
• HSLs hole-selective layers
• Lin et al. (doi:10.1002/solr.202000771) recite the fabrication of full dopant-free bifacial silicon solar cells and efficient devices utilizing a M0O3/ indium tin oxide (ITO)/Ag hole-selective contact and ZnO/LiF x /Al electron-selective contacts with up to 79% short-circuit current bifaciality are demonstrated.
• the ZnO/LiF x /Al rear electron contact features a full-area ZnO antireflective coating and a LiF x /Al finger contact, allowing sunlight absorption from the back side, thus producing more overall power.
• the dopant-free bifacial solar cell with 60 nm ZnO and 50% LiF x /Al metal contact fraction achieves a 3% estimated output power density improvement compared with its mon ofacial counterpart (21.0 mW cm -2 compared to 20.3 mW cm -2 ) using the full-area back con tact. Both the efficiency and bifaciality factor of this dopant-free device are still significantly lower than those of state-of-the-art devices relying on doped-silicon-based layers.
• Thomas et al. (DOT10.1038/S41560-019-0463-6) recite that global photovoltaic (PV) mar ket is dominated by crystalline silicon (c-Si) based technologies with heavily doped, directly metallized contacts. Recombination of photo-generated electrons and holes at the contact re gions is increasingly constraining the power conversion efficiencies of these devices as other performance-limiting energy losses are overcome.
• c-Si PV technologies must implement alternative contacting approaches. Passivating contacts, which incorporate thin films within the contact structure that simultaneously suppress recombination and pro mote charge-carrier selectivity, are a promising next step for the mainstream c-Si PV indus try.
• the present invention relates to an increased efficiency hetero junction solar cell and various aspects thereof and a simplified process for manufacturing the solar cell which over comes one or more of the above disadvantages, without jeopardizing functionality and ad vantages.
• the present invention relates in a first aspect to a hetero-junction silicon solar cell, typically a front and rear contacted solar cell, and in a second aspect to a method for making such a solar cell.
• the invention involves the removal of the electron transport layer (ETL) and/or hole transport layer (HTL). So either or both of the transport layers can be removed.
• ETL electron transport layer
• HTL hole transport layer
• These layers are typically used in conventional, prior art, silicon heterojunction (SHJ) crystalline silicon (c-Si) solar cells and other solar cells as well.
• An ETL (and likewise a HTL) is usually doped with impurity atoms to exhibit electron (hole) selective transport characteristics.
• both the ETL and HTL hinder the full exploitation, that is conversion of light into electrical power, of the incident light, and in addition typically require multi-chamber deposition tools, or likewise a number of tools, to prevent cross-contamination.
• the ETL and HTL induce parasitic absorption, which negatively affects conversion of light into electrical power.
• a simplified SHJ solar cell structure which is ETL- and/or HTL-free.
• Advantages of the removal of the ETL and/or HTL on an illuminated side of solar cells are a lower non-useful absorption (parasitic absorption), thus higher conversion effi ciency, a simplified device structure and process, thus higher throughput, and reduced manu facturing cost as no doping chamber is necessary, and simplified equipment can be used.
• the present invention relates to a properly optimized intrinsic passivating layer (stack), such as (i)a-Si:H or intrinsic hydrogenated nanocrystalline silicon ((i)nc-Si:H), or a combination of both materials and their alloys, together with a transparent conductive oxide (TCO) or simi lar functioning materials, and metal contacts, to form the either of electron/hole contact stack of layers.
• a properly optimized intrinsic passivating layer such as (i)a-Si:H or intrinsic hydrogenated nanocrystalline silicon ((i)nc-Si:H)
• TCO transparent conductive oxide
• simi lar functioning materials e.g. different work functions
• (i)a-Si:H/TCO can act as an effective electron contact stack for high-efficiency SHJ solar cells, and likewise as an effective hole contact stack.
• the present solar cells have as ad vantages e.g. an increased conversion efficiency, improved transparency, good carrier collec tion, low parasitic absorption, a not very complex structure, a high Voc, a high Jsc, a high fill factor, and good passivation especially of the contacts.
• the present solar cells are a powerful alternative to improve power to cost ratio. They are competitive to conventional and bifacial single hetero junction solar cells.
• the present stack of layers provides sufficient carrier mo bility for lateral carrier transport, good passivation and low parasitic absorption.
• a proof-of-concept SHJ solar cell was made with ETL-free with (i)a-Si:H/AZO (aluminum doped zinc oxide) for electron collections, the devices exhibit VOC of >700 mV, JSC of >40 mA/cm 2 , FF of >80%, and efficiency of >23%.
• the present invention clearly allows a simpler process, cost reductions, and potentially a higher conversion efficiency.
• Cost reductions come from both materials saving during the device manufacturing, and also simplification of fabrication tools, in particular the Plasma- Enhanced Chemical-Vapor-Deposition (PECVD).
• PECVD Plasma- Enhanced Chemical-Vapor-Deposition
• the higher efficiency may result from the omission of non-useful absorption from ETL and/or HTL.
• This invention is furthermore in dustrial relevant due to simplified processes and lower costs which are compatible with state-of-the-art industry production lines.
• the present solar cell comprises at least one hetero junction and typically two hetero junctions.
• the heterojunctions are typically of staggered type.
• the present solar cells comprise at least one stack of layers(l), the stack comprising a substrate (10), wherein the substrate comprises Si and dopants, directly on the substrate, at least one intrinsic layer (11), directly on the intrinsic layer a transparent conductive oxide (TCO)-layer (12), wherein the at least one intrinsic layer (11) and transparent conductive oxide (TCO)-layer (12) pro vide electron transport or hole transport, respectively, and a metal contact (13) in electrical contact with the TCO-layer.
• the substrate is typically a crystalline Si-substrate, such as a n- doped or p-doped crystalline Si layer 10, typically of 50 pm-300 pm thickness.
• the layers of the stack are typically provided directly on one and another, that is, without an intermediate layer, or in any case an intermediate layer of significance to the performance of the hetero junction solar cell.
• the present invention relates to a method of producing a front-side and back-side contacted silicon hetero-junction solar cell (100) according to the invention, comprising providing a substrate, such as a crystalline Si-substrate, such as a Si-wafer, op tionally texturing the substrate, such as double-side texturing the substrate, wherein the sub strate is dipped into an alkaline solution, such as Tetramethylammonium hydroxide, TMAH, or single-side texturing the substrate, wherein one side of the substrate is coated with a die lectric layer, such as hydrogenated amorphous silicon nitride, aSiNx:H, and dipping the sub strate into an alkaline solution for texturing the uncoated side, and removing the dielectric layer thereafter, such as with an acidic solution, e.g.
• a strong oxidizing solution such as nitric acid, HN03
• etching the oxidized substrate by dipping the oxidized substrate into an acidic solution, e.g. hydrogen Fluoride, HF, directly thereafter loading the etched substrate into a layer deposi tion tool, e.g.
• a plasma-enhanced chemical vapor deposition tool PECVD and depositing an intrinsic Si layer on at least one side of the etched substrate, thereafter depositing a transpar ent conductive oxide(TCO) layer on the at least one intrinsic Si-layer, such as by sputtering, and then depositing metal contacts on the TCO-layer, such as by evaporation, screen-print ing, or electrical plating.
• TCO transpar ent conductive oxide
• the present invention provides a simplified fabrication process wherein solar cell precursors can be finished within a couple of steps, and which is a low cost and high throughput process, using compatible industrial standard metalliza tion steps, solar cells featuring a high Voc, solar cells featuring a high Jsc & Voc, so lar cells featuring a relatively high fill factor (FF), and wherein the design is applica ble to both a front/rear contacted conventional solar cell architecture, a bifacial solar cell architecture, for interdigitated back-contacted (IBC) solar cells, and for both n- type and p-type bulk material.
• IBC interdigitated back-contacted
• the present invention provides a solution to one or more of the above men tioned problems.
• the present invention relates in a first aspect to a silicon hetero junction solar cell, and in a second aspect to a process for making such a solar cell.
• bottom and top are relative terms, which terms may be interchanged in so far as applica ble.
• the substrate (10) comprises crystalline Si.
• the substrate (10) is a single sided or double sided flat substrate (10) surface.
• the substrate (10) is a single sided or double sided textured substrate (10) surface (ISO 4287:1997), in par ticular textured with a surface roughness, each individually, R a of 1-20 pm, such as 2-10 pm.
• the textured surface each individually, has an aspect ratio (height: depth of a textured structure) of 2-10, preferably 5-8.
• a textured surface is found to increase the efficiency of the solar cell.
• the at least one intrinsic layer (11) is selected from intrinsic Si, such as (i)a-Si:H and (i)nc-Si:H, from intrinsic Si-dielectrics, such as (i)a-SiO x :H, (i)a-SiC x :H, and (i)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
• intrinsic Si such as (i)a-Si:H and (i)nc-Si:H
• intrinsic Si-dielectrics such as (i)a-SiO x :H, (i)a-SiC x :H, and (i)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
• the material of the transparent conductive oxide layer (12) is selected from Indium Tin Oxide (ITO),
• IOH, ZnO, or doped ZnO such as Aluminium doped ZnO, doped Tin oxide, such as fluorine doped tin oxide, doped indium oxide, such as Indium Fluor Oxide (IFO:H), and Indium Tungsten Oxide (IWO).
• doped Tin oxide such as fluorine doped tin oxide
• doped indium oxide such as Indium Fluor Oxide (IFO:H)
• IWO Indium Tungsten Oxide
• a thickness of the transparent conductive layer (12) is 10-200 nm, in particular 30-170 nm.
• the refrac tive index of the transparent conductive layer (12) is ⁇ 2.2.
• the TCO-layer is selected from Aluminium doped ZnO.
• the TCO-layer is selected from IWO.
• the work function of the TCO layer (12) is from 2 eV to 8 eV, in particular 3.4 eV to 6.4 eV.
• the work function of the TCO layer (12) is 3.4 eV to 4.7 eV in case of the TCO-layer mainly trans porting electrons.
• the work function of the TCO layer (12) is 4.7 eV to 6.4 eV in case of the TC04ayer mainly collect ing holes.
• the TCO layer (12) in at least one first stack the TCO layer (12) has a work function for transporting electrons and in at least one second stack the TCO layer (12) has a work function for collecting holes.
• the TCO layer each individually is textured, in particular with a same texturing as the intrinsic layer.
• the substrate (10) comprises 1*10 12 -0.5*10 19 n- or p-type dopants/cm 3 , in particular 2*10 14 -10 17 do pants/cm 3 , more in particular 5*10 14 -10 16 dopants/cm 3 , such as 8*10 14 -3*10 15 dopants/cm 3 .
• n-type c-Si wafer could have a dopant concentration of about 9.148 x 10 14 cm 3 .
• the substrate (10) has a resistivity of 0.1-1000 ohm*cm at 300K, more in particular 1-100 ohm*cm, such as 5-10 ohm*cm. It is noted that resistivities of Si-doped materials as a function of various dopant concentrations are well-known to the skilled person. It can be measured with any suitable instruments (e.g. of Freiberg Instruments, e.g. according to ATSM D257) or simply looked up in a table.
• a doping concentration is spatially constant, or wherein a doping concentration varies spatially, and/or wherein n-type dopants are selected from P, As, Bi, Sb and Li.
• hetero junction solar cell p-type do pants are selected from B, Ga, and In.
• a dopant concentration is 5*10 14 -0.5*10 19 n- or p-type dopants/cm 3 .
• the dopants are found to contrib ute to the advantages of the invention.
• the metal of the metal contacts (13) independently comprises at least one of Cu, Al, W, Ti, Ni, Cr, Ag.
• a thickness of said metal contacts (13) is 200 nm-50 pm, in particular 1-25 pm.
• the metal contact (13) is selected from a metal layer, a metal grid, a metal line, or a combination thereof.
• the metal contact (13f) at a front side covers ⁇ 20% of a surface area of the front side, preferably ⁇ 10% thereof, such as ⁇ 5% thereof.
• the solar cell is a back-contacted solar cell, such as an interdigitated back-contacted solar cell, or wherein the solar cell is a back and front contacted solar cell, wherein at least one stack (If) is provided on a front side of the solar cell, and wherein at least one stack (lb) is provided on a back side of the solar cell, and wherein the front side stack and back side stack are pro vided on the one and the same substrate (10).
• the thick ness of the intrinsic layer each individually is from 0.1 nm-50 nm, in particular 1-20 nm, such as 2-15 nm.
• the intrinsic layer each individually is textured, in particular with a same texturing as the substrate.
• the VOC is >700 mV, such as > 705 mV, and/or wherein a J sc is > 30 mA/cm 2 , such as > 40 mA/cm 2 , and/or a fill factor (FF) of >75%, in particular > 79%, such as > 80%, and/or having an effi ciency of > 23%, such as > 23.2%.
• FF fill factor
• the contact stack is trans parent, such as > 90% @ 490 nm, preferably > 95%.
• the present solar cell comprises a single sided or double sided textured substrate 10, typically a crystalline Si substrate, such as a mi croscale texture, a nanoscale texture, and combinations thereof. Therewith an im proved efficiency is obtained.
• the present solar cell comprises a 10 14 -10 17 do pants/cm 3 n- or p-type doped substrate, typically Si, preferably 10 15 -10 16 dopants/cm 3 .
• the present solar cell comprises at least one of a metal layer on a back side 13b, and metal contacts on a front side 13f and/or on a back side.
• the metal contacts are used to connect the solar cells, such as to a grid, to a stor age unit, such as a battery, to a DC/ AC converter, etc.
• the material of the thick ness of the transparent conductive layer ⁇ 100 nm, and/or wherein the refractive index ⁇ 2.2, preferably ⁇ 2, such as > 1.5.
• the refractive index is preferably close enough to air in terms of efficiency. This refractive index is preferred to be ⁇ 2.0, which equals to the square root of the product of the refractive indexes of air (1) and silicon ( ⁇ 4)(@587 nm). This will provide better anti-reflection effect. Either too low or too high is not preferred.
• the respective layers are each independently in full contact with one and another over an area of >50% of a surface of the largest of two contacting surfaces, preferably >90%, more preferably >95%, even more preferably >98%, such as >99%.
• the layers in the stack of layers are in contact with one and another and no further layers are provided in between.
• FIGURES Figure 1 shows an example of a prior-art solar cell.
• Figures 2-4 show a schematic representation of an example of the present solar cell.
• HTL hole transport layer
• the solar cell of fig. 1 relates to a prior art solar cell.
• the solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typically an intrinsic Si-layer, in the example an ETL layer 20 on the top intrinsic layer and an HTL 30 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
• the solar cell of fig. 2 relates to a solar cell according to the invention.
• the solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi cally an intrinsic Si-layer, in the example an HTL 30 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
• the solar cell of fig. 3 relates to a solar cell according to the invention.
• the solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi cally an intrinsic Si-layer, in the example an ETL 20 on the bottom intrinsic layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer.
• Figs. 2 and 3 in so far as the ETL or HTL are concerned, in that respect make use of prior art technology, whereas in so far as the ETL or HTL are absent, respec tively, make use of the present invention.
• the solar cell of fig. 4 relates to a solar cell according to the invention.
• the solar cell comprises a substrate 10, at either side of the substrate an intrinsic layer 11, typi cally an intrinsic Si-layer, a TCO layer 12 on either side, and metal contacts or a metal contact layer 13 on the TCO layer. No ETL or HTL is present.
• the phosphorus doping of n-type c-Si wafer in an example is 9.148 x 10 14 cm 3 , which corresponds to a wafer resistivity of 5 ohm*cm at 300K; the doping concentration can be higher or lower to achieve a lower wafer resistivity or a higher wafer resistivity, respec tively;
• the boron doping of p-type c-Si wafer in an example is 2.762 x 10 15 cm 3 , which cor responds to a wafer resistivity of 5 ohm*cm at 300K; the doping concentration can be higher or lower to achieve a lower wafer resistivity or a higher wafer resistivity, respectively;
• the WF of TCO can be around 3.4 eV to 6.4 eV; While for TCO that has WF in the range of around 3.4 eV to 4.7 eV, a lower WF TCO tends to be more favourable to act as electron collectors; while for TCO that has WF in the range of around 4.7 eV to 6.4 eV, a higher WF TCO tends to be more favourable to act as hole collectors.
• the (i)-layer can be (i)a-Si:H, (i)nc-Si:H, their alloys such as (i)a- SiOx:H, (i)a-SiCx:H, or dielectric passivation layer, and their possible combinations
• the ETL (electron transport layer) can be (n)a-Si:H, (n)nc-Si:H, their alloys such as (n)a-SiOx:H, (n)a-SiCx:H, or electron-selective transition metal oxide layers, and their possible combina tions
• the HTL (hole transport layer) can be (p)a-Si:H, (p)nc-Si:H, their alloys such as (p)a- SiOx:H, (p)a-SiCx:H, or hole-selective transition metal oxide layers, and their possible com binations
• the TCO is a transparent conductive oxide
• the junction position can be in verted

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