EP4268345A1 - Logique de commande pour mettre à jour la capacité d'une batterie - Google Patents

Logique de commande pour mettre à jour la capacité d'une batterie

Info

Publication number
EP4268345A1
EP4268345A1 EP21840257.6A EP21840257A EP4268345A1 EP 4268345 A1 EP4268345 A1 EP 4268345A1 EP 21840257 A EP21840257 A EP 21840257A EP 4268345 A1 EP4268345 A1 EP 4268345A1
Authority
EP
European Patent Office
Prior art keywords
battery
batteries
capacity
charge
perform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21840257.6A
Other languages
German (de)
English (en)
Inventor
Bo Zhang
Joel B. Artmann
Gang Ji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Medtronic Inc
Original Assignee
Medtronic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/528,411 external-priority patent/US20220200302A1/en
Application filed by Medtronic Inc filed Critical Medtronic Inc
Publication of EP4268345A1 publication Critical patent/EP4268345A1/fr
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • H02J7/0048Detection of remaining charge capacity or state of charge [SOC]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/385Arrangements for measuring battery or accumulator variables
    • G01R31/387Determining ampere-hour charge capacity or SoC
    • G01R31/388Determining ampere-hour charge capacity or SoC involving voltage measurements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/44Methods for charging or discharging
    • H01M10/441Methods for charging or discharging for several batteries or cells simultaneously or sequentially
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/382Arrangements for monitoring battery or accumulator variables, e.g. SoC
    • G01R31/3835Arrangements for monitoring battery or accumulator variables, e.g. SoC involving only voltage measurements

Definitions

  • the present technology is generally related to techniques for battery management. More specifically, the present technology relates to techniques for accurately determining the true charge state and total capacity of a battery throughout the battery lifetime.
  • Rechargeable batteries provide power in a wide variety of systems.
  • the full charge capacity of a battery is a measurement of the maximum chemical capacity of a rechargeable battery. As battery cells age, the full charge capacity of the battery generally decreases, and the true charge state of the battery can be difficult to determine with great accuracy. Because measuring and updating the full charge capacity is fundamental to basic battery management, there is a general need to perform this task more accurately through the full life cycle of a battery.
  • the techniques of this disclosure generally relate to methods, systems, and apparatuses for determining total capacity of a battery.
  • the present disclosure provides a method including determining whether to perform a capacity update of a battery. This can include determining whether a delta in capacity of the battery is above a threshold, and this delta can be based upon chemistry properties of the battery, age of the battery, or other factors.
  • the method can further include responsive to determining to perform the capacity update, determining existing depth-of-discharge (DoD) of the battery. Determining existing DoD can include estimating DoD based on a state of charge of the battery under an open-circuit condition.
  • the method can further include performing a discharge operation or a charge operation based on whether existing DoD is below a threshold.
  • the method can further include performing the capacity update after the discharge operation or the charge operation.
  • Performing the capacity can include detecting a state of charge (SoC) of the battery responsive to determining that battery voltage is stable subsequent the discharge operation or the charge operation. Whether the battery voltage is stable can be based on whether a voltage drop across the battery over a time duration is less than a threshold.
  • the method can also include providing a rest stage for the battery by disconnecting the battery from a load and controlling a bypass switch to power the load directly from a charger.
  • SoC state of charge
  • FIG. l is a block diagram of a device that includes a battery management system for managing a battery in accordance with embodiments.
  • FIG. 2 is a block diagram that illustrates a battery management system in accordance with embodiments.
  • FIG. 3 is a graph that illustrates a controlled cycle that includes two potential points for capacity update in accordance with embodiments.
  • FIG. 4 is a flow diagram of a method for battery management in accordance with embodiments.
  • FIG. 1 is a block diagram of a device 100 that includes a battery management system for managing a battery according to operations, processes, methods, and methodologies of embodiments.
  • This device 100 may include any combinations of the hardware or logical components referenced herein.
  • the device 100 can include components of, or be used to control operations of, a ventricular assist device.
  • the device 100 may include or couple with any other device, for example other devices needed for implementation of patient therapies.
  • the device 100 may include processing circuitry in the form of a processor 102, which may be a microprocessor, a multi-core processor, a multithreaded processor, an ultra-low voltage processor, an embedded processor, or other known processing elements.
  • the processor 102 may be a part of a system on a chip in which the processor 102 and other components described herein are formed into a single integrated circuit.
  • a battery 128 may power the device 100, although, in examples in which the device 100 is in a fixed location, the device 100 may have a power supply coupled to an electrical grid.
  • the battery 128 may be a lithium-ion battery although embodiments are not limited thereto.
  • a battery management system 130 may be included in the device 100 or the battery management system 130 may be part of an external device coupled to the device 100 to track the state of charge (SoC) of the battery 128.
  • SoC state of charge
  • a power block 132 or other power supply coupled to a grid, may be coupled with the battery management system 130 to charge the battery 128. In some examples, the power block 132 may be replaced with a wireless power receiver to obtain the power wirelessly. Further detail regarding the battery management system 130 is provided below with reference to FIG. 2.
  • FIG. 2 is a block diagram that illustrates the battery management system 130 in accordance with embodiments.
  • the battery management system 130 may be used to monitor other parameters of the battery 128 to provide failure predictions, such as the state of health (SoH) and the state of function (SoF) of the battery 128.
  • the battery management system 130 may include battery monitoring circuitry, for example fuel gauge 202.
  • the battery management system 130 may include control logic 204.
  • control logic 204 is executed on the processor 102 (FIG. 1) of the device 100, although embodiments are not limited thereto.
  • the battery management system 130 can include processing circuitry for execution of at least some operations included in control logic 204.
  • the control logic 204 can control a charging cycle of the battery 128 by controlling charger 206 when switch element 208 is closed in a controlled manner as described later herein.
  • the control logic 204 can also control a discharge cycle of the battery 128 by switching a load 210 to draw current from the battery 128 when switch element 212 is closed in a controlled fashion as described later herein.
  • the load 210 includes, or can model, ventricular assist device (not shown).
  • the fuel gauge 202 measures the amount of charge remaining in the battery 128 and provides indicators thereof to the control logic 204 as described later herein.
  • a bypass switch 218 and bypass path 220 are placed between charger 206 and the load 210.
  • the bypass path 220 is used to power the load 210 directly by the charger 206 to allow the battery 128 to rest by disconnecting from the load 210 and charger 206.
  • the bypass switch 218 is closed and both switch 208 and 212 are open.
  • the load switch 212 is closed and both bypass switch and charging switch 208 are open.
  • the load switch 212 is open and both bypass switch 218 and charging switch 208 are closed.
  • Battery 128 capacity corresponds to the quantity of electric charge that can be accumulated during battery 128 charging, stored in open circuit conditions, and released during battery 128 discharge.
  • discharge duration is expressed in hours
  • the typical unit for battery 128 capacity is the Ampere-hour (AH).
  • SoC of the battery 128 indicates voltage at the terminals 214, 216 of that battery 128 when the battery 128 is at rest, or in equilibrium.
  • the mathematical relationship between SoC and equilibrium voltage is a known relationship and is based on battery type.
  • the actual voltage at the terminals 214, 216 of the battery 128 is lower than the equilibrium voltage by an amount that can be calculated using Ohm’s Law knowing internal resistance of the battery 128.
  • Ohm’s Law is applied to operation of some fuel gauges such as the fuel gauge 202.
  • the fuel gauge 202 can use Ohm’s Law by measuring or the internal resistance of the battery 128 being monitored, multiplying this internal resistance by a measured current to determine an intermediate voltage value at 203, and then offsetting the measured terminal voltage by the intermediate voltage value to obtain an estimate of the equilibrium voltage of the battery 128. Available battery 128 capacity can then be calculated using this estimate of the equilibrium voltage.
  • Other elements and algorithms can be added to improve accuracy of the fuel gauge 202, including Coulomb counters and other apparatuses.
  • the fuel gauge 202 can provide capacity information, voltage information, temperature information, capacity update status, Coulomb count, depth of discharge, error messages, and other information to other systems (e.g., control logic 204).
  • control logic 204 provides a controlled charging cycle to achieve a successful capacity update.
  • Successful capacity updates rely on a minimum capacity change, because if capacity change is below a threshold, the capacity change can be difficult to detect as the capacity change becomes indistinguishable from noise. Capacity change needs to meet or exceed a threshold to become large enough to be measured.
  • Successful capacity updates can also depend on stability of open-circuitvoltage (OCV), temperature, depth of discharge (DoD) and other conditions. All these conditions, and other conditions, can be controlled by charge and discharge cycles that are controlled in accordance with embodiments.
  • OCV open-circuitvoltage
  • DoD depth of discharge
  • FIG. 3 is a graph 300 that illustrates a controlled cycle 302 that includes two potential points for capacity update in accordance with embodiments.
  • the control logic 204 controls the discharge the battery 128 to 40% DoD at point 306.
  • Other values for DoD can be used; however, a sufficiently deep discharge must be performed to accurately measure battery 128 capacity.
  • the DoD used can be chemistrydependent, such that discharging less than DoD 40% can lead to less total voltage drop from point 304 to point 308, and therefore the noise on the voltage measurement remains the same.
  • DoD can be estimated based on a SoC of the battery 128.
  • the control logic 204 will disconnect the battery 128 from the load 210 and power the load 210 directly from the charger 206 through the bypass switch 218 and bypass path 220.
  • the battery 128 will rest until the battery 128 voltage is stable at point 308.
  • the fuel gauge 202 may update battery 128 capacity by detecting SoC of the battery 128 and determining the amount of capacity remaining in the battery 128 by dividing the discharged capacity Q dsg by the change in SoC (SoC start — SoC encl ) according to Equation (2):
  • control logic 204 controls the switching element 208 and charger 206 to charge the battery 128 to 0% DoD and the battery 128 can rest at point 310.
  • the battery 128 has been at rest until the battery 128 voltage is stable, at which point the fuel gauge 202 may perform a second capacity update.
  • FIG. 4 is a flow diagram of a method 400 for battery management in accordance with embodiments.
  • the method 400 can be implemented by circuitry (e.g., control logic 204 (FIG. 2)) executing on a processor 102, fuel gauge 202 circuitry (FIG. 2), or battery management system 130 (FIG. 1).
  • circuitry e.g., control logic 204 (FIG. 2)
  • FIG. 2 fuel gauge 202 circuitry
  • FIG. 1 battery management system 130
  • control logic 204 determines whether to perform a capacity update of a battery (e.g., the battery 128 (FIG. 1 and FIG. 2).
  • Capacity updates can be required if a capacity fade is expected to be sufficiently large (e.g., a delta in capacity is above a threshold).
  • the delta can be based upon chemistry of the battery, battery age, time idle, time in use, and other factors.
  • capacity fade will be sufficiently large after an amount of time has elapsed that is likely to result in reduced capacity based on battery chemistry, historical data provided by the manufacturer, or other data.
  • the number of months can be about three months. If no capacity update is required, processor 102 periodically checks whether a capacity update is required and takes no further action until such an update is required.
  • the processor 102 shall check the DoD. If the DoD is lower than a certain percentage (in some examples, 50% DoD, although embodiments are not limited thereto), the processor 102 will control the battery 128 to discharge at point 306 until the capacity drop is higher than a threshold DoD (in some examples 37%, although embodiments are not limited thereto), while the control logic 204 performs periodic checking for such a level of DoD in operation 408. The control logic 204 will disconnect the battery 128 from the load 210 by opening switch 212 and letting the charger 206 directly power the load 210 by closing the bypass switch 218. The battery 128 will rest until the voltage is stable in operation 410.
  • a certain percentage in some examples, 50% DoD, although embodiments are not limited thereto
  • the processor 102 will control the battery 128 to discharge at point 306 until the capacity drop is higher than a threshold DoD (in some examples 37%, although embodiments are not limited thereto), while the control logic 204 performs periodic checking for such a level of DoD in operation 408.
  • the voltage may be considered stable.
  • the control logic 204 will control the switch 208 and charger 206 to charge the battery 128 to a fully charged state in operation 414.
  • the routine is completed with successful capacity update.
  • control logic 204 shall evaluate parameter such as temperature, voltage, coulomb count error, and other parameters using, for example, dedicated temperature gauges 201, voltage meter 203, embedded coulomb counters, and other circuitry not shown in FIG. 2. Upon detecting any error or anomaly in these or other parameters, the control logic 204 will generate an error message to the output device 122 or to an error handling routine in processor 102.
  • the control logic 204 will control the switch 208 and charger 206 to charge the battery to a fully charged state in operation 422. After this charging operation 422, if the capacity increase is determined to be higher than 37% of DoD by the control logic 204, in operation 424, the control logic 204 may disconnect the battery 128 from the charger 206 and the load 210 by opening switch 208 and switch 212. The battery 128 will rest until the voltage is stable in operation 426. If the capacity is updated at this point, as determined at operation 428, the method 400 may end with a successful capacity update at operation 416.
  • method 400 resumes at operation 404 described earlier herein to keep charging the battery 128.
  • the processor 102 may communicate with a system memory 104 over an interconnect 106 (e.g., a bus). Any number of memory devices may be used to provide for a given amount of system memory. As examples, the memory 104 may be random access memory (RAM). However, any other type of memory can be included. Persistent storage can also be provided by storage 108. Storage 108 may also couple to the processor 102 via the interconnect 106. Storage 108 may include disk drives, flash memory cards, Universal Serial Bus (USB) flash drives, etc.
  • USB Universal Serial Bus
  • the components may communicate over the interconnect 106.
  • the interconnect 106 may include any number of technologies, including industry standard architecture (ISA), extended ISA (EISA), peripheral component interconnect (PCI), peripheral component interconnect extended (PCIx), PCI express (PCIe), or any number of other technologies.
  • ISA industry standard architecture
  • EISA extended ISA
  • PCI peripheral component interconnect
  • PCIx peripheral component interconnect extended
  • PCIe PCI express
  • the interconnect 106 may be a proprietary bus.
  • the interconnect 106 may couple the processor 102 to a transceiver 110.
  • the transceiver 110 may use any number of frequencies and protocols, IEEE, or Bluetooth protocols, although embodiments are not limited to these protocols.
  • the transceiver 110 may be included to communicate with devices or services in the cloud 112 via local or wide area network protocols.
  • a network interface controller (NIC) 114 may be included to provide a wired communication to other devices or systems through the cloud 112.
  • the wired communication may provide an Ethernet connection or may be based on other types of networks.
  • the interconnect 106 may couple the processor 102 to a sensor interface 116 that is used to connect additional devices or subsystems. These additional devices may include sensors 118, such as optical light sensors, camera sensors, temperature sensors, and the like.
  • the interface 116 further may be used to connect the device 100 to actuators 120, such as power switches, valve actuators, an audible sound generator, a visual warning device, and the like.
  • various input/output (VO) devices may be present within or connected to, the device 100.
  • a display or other output device 122 may be included to show information, such as sensor readings, fuel gauge readings, fuel gauge diagnostic outputs, etc.
  • An input device 124 such as a button, touch screen or keypad may be included to accept input.
  • An output device 122 may include any number of forms of audio or visual display, including simple visual outputs such as binary status indicators (e.g., light-emitting diodes (LEDs)) and multi -character visual outputs, or more complex outputs such as display screens (e.g., liquid crystal display (LCD) screens), with the output of characters, graphics, multimedia objects, and the like being generated or produced from the operation of the device 100.
  • a display or console hardware in the context of the present system, may be used to provide output and receive input of a medical device, including an implantable medical device; to identify a state of a medical device or related/connected devices; or to conduct any other number of management or administration functions.
  • the storage 108 may include instructions 125 in the form of software, firmware, or hardware commands to implement the techniques described herein. Although such instructions 125 are shown as code blocks included in the memory 104 and the storage 108, it may be understood that any of the code blocks may be replaced with hardwired circuits, for example, built into an application specific integrated circuit (ASIC).
  • ASIC application specific integrated circuit
  • the instructions 125 provided via the memory 104, the storage 108, or the processor 102 may be embodied as a non-transitory, machine-readable medium 126 including code to direct the processor 102 to perform electronic operations in the device 100.
  • the processor 102 may access the non-transitory, machine-readable medium 126 over the interconnect 106.
  • the non-transitory, machine-readable medium 126 may be embodied by devices described for the storage 108 or may include specific storage units such as optical disks, flash drives, or any number of other hardware devices.
  • the non-transitory, machine-readable medium 126 may include instructions to direct the processor 102 to perform a specific sequence or flow of actions, for example, as described with respect to the flowchart(s) and block diagram(s) of operations and functionality depicted above.
  • machine-readable medium and “computer- readable medium” are interchangeable.
  • a machine-readable medium also includes any tangible medium that can store, encoding or carrying instructions for execution by a machine and that cause the machine to perform any one or more of the methodologies of the present disclosure or that can store, encoding or carrying data structures utilized by or associated with such instructions.
  • a “machine-readable medium” thus may include but is not limited to, solid-state memories, and optical and magnetic media.
  • machine- readable media include non-volatile memory, including but not limited to, by way of example, semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; magnetic disks such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks.
  • semiconductor memory devices e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)
  • flash memory devices e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)
  • flash memory devices e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)
  • flash memory devices e.g., electrically erasable programmable read-only memory (EEPROM)
  • a machine-readable medium may be provided by a storage device or other apparatus which is capable of hosting data in a non-transitory format.
  • information stored or otherwise provided on a machine-readable medium may be representative of instructions, such as instructions themselves or a format from which the instructions may be derived.
  • This format from which the instructions may be derived may include source code, encoded instructions (e.g., in compressed or encrypted form), packaged instructions (e.g., split into multiple packages), or the like.
  • the information representative of the instructions in the machine-readable medium may be processed by processing circuitry into the instructions to implement any of the operations discussed herein.
  • deriving the instructions from the information may include: compiling (e.g., from source code, object code, etc.), interpreting, loading, organizing (e.g., dynamically, or statically linking), encoding, decoding, encrypting, unencrypting, packaging, unpackaging, or otherwise manipulating the information into the instructions.
  • the described techniques may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit.
  • Computer-readable media may include non-transitory computer-readable media, which corresponds to a tangible medium such as data storage media (e.g., RAM, ROM, EEPROM, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer).
  • processors such as one or more digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry.
  • DSPs digital signal processors
  • ASICs application specific integrated circuits
  • FPGAs field programmable logic arrays
  • processors may refer to any of the foregoing structure or any other physical structure suitable for implementation of the described techniques. Also, the techniques could be fully implemented in one or more circuits or logic elements.

Abstract

L'invention concerne un procédé de gestion de batterie, le procédé consistant à déterminer s'il faut effectuer une mise à jour de capacité d'une batterie. Le procédé peut également comprendre, en réponse à la détermination du fait qu'il faut effectuer la mise à jour de capacité, la détermination de la profondeur de décharge existante (DoD) de la batterie. Le procédé peut également comprendre l'exécution d'une opération de décharge ou d'une opération de charge sur la base du fait que la DoD existante se situe au-dessous d'un seuil. Le procédé peut comprendre l'exécution de la mise à jour de capacité suite à l'opération de décharge ou de charge. L'invention concerne également des appareils et des systèmes de gestion de batterie.
EP21840257.6A 2020-12-23 2021-12-07 Logique de commande pour mettre à jour la capacité d'une batterie Pending EP4268345A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202063130346P 2020-12-23 2020-12-23
US17/528,411 US20220200302A1 (en) 2020-12-23 2021-11-17 Control logic to update battery capacity
PCT/US2021/062188 WO2022140053A1 (fr) 2020-12-23 2021-12-07 Logique de commande pour mettre à jour la capacité d'une batterie

Publications (1)

Publication Number Publication Date
EP4268345A1 true EP4268345A1 (fr) 2023-11-01

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Application Number Title Priority Date Filing Date
EP21840257.6A Pending EP4268345A1 (fr) 2020-12-23 2021-12-07 Logique de commande pour mettre à jour la capacité d'une batterie

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EP (1) EP4268345A1 (fr)
WO (1) WO2022140053A1 (fr)

Family Cites Families (7)

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Publication number Priority date Publication date Assignee Title
JP3549806B2 (ja) * 2000-03-01 2004-08-04 株式会社日立製作所 自動車用電源の制御装置
JP2002271992A (ja) * 2001-03-14 2002-09-20 Internatl Business Mach Corp <Ibm> 電力供給装置、電力供給方法、電気機器および電気機器における電力供給方法
JP2008072883A (ja) * 2006-09-15 2008-03-27 Fujitsu Ltd バッテリリフレッシュ装置およびバッテリリフレッシュ方法
CN101682093B (zh) * 2008-03-27 2013-08-14 Lsi公司 改进的电池状况学习周期的设备和方法
CN101702453B (zh) * 2009-10-27 2013-06-05 中兴通讯股份有限公司 一种蓄电池充电管理方法及装置
US10132867B1 (en) * 2017-05-15 2018-11-20 Semiconductor Components Industries, Llc Methods and apparatus for measuring battery characteristics
US11418048B2 (en) * 2018-08-21 2022-08-16 Renesas Electronics America Inc. System and method for providing reverse boost mode in battery charger application

Also Published As

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