EP4268266A1 - Verfahren zur herstellung einer iii-n-materialschicht - Google Patents

Verfahren zur herstellung einer iii-n-materialschicht

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Publication number
EP4268266A1
EP4268266A1 EP21840633.8A EP21840633A EP4268266A1 EP 4268266 A1 EP4268266 A1 EP 4268266A1 EP 21840633 A EP21840633 A EP 21840633A EP 4268266 A1 EP4268266 A1 EP 4268266A1
Authority
EP
European Patent Office
Prior art keywords
section
basal
basal section
pads
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21840633.8A
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English (en)
French (fr)
Inventor
Matthew Charles
Guy Feuillet
Carole Pernel
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Publication of EP4268266A1 publication Critical patent/EP4268266A1/de
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02428Structure
    • H01L21/0243Surface structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02592Microstructure amorphous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647Lateral overgrowth
    • H01L21/0265Pendeoepitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025Physical imperfections, e.g. particular concentration or distribution of impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Definitions

  • the invention relates to the production of a layer based on an III-N material, for example a nitride (N) obtained from at least one of gallium (Ga), indium (In) and aluminum (Al).
  • a nitride (N) obtained from at least one of gallium (Ga), indium (In) and aluminum (Al).
  • the invention finds, for example, an application in the field of optoelectronic devices comprising a plurality of light-emitting diodes (LEDs) of micrometric size, generally called micro-LEDs, or even the production of power components such as transistors or power diodes.
  • LEDs light-emitting diodes
  • III-N material typically nitrides of at least one of gallium, indium and aluminum.
  • Specific applications relate for example to the production of micro-LEDs (pLED).
  • Other specific applications may relate to the production of power electronic devices such as diodes or power transistors, for example HEMT transistors (acronym of their Anglo-Saxon name "High Electron Mobility Transistor” meaning field-effect transistor with high electron mobility) or even vertical transistors or diodes.
  • nitride for example gallium nitride GaN, which has: a high thickness (typically greater than 5 or even 8 pm 10' 6 meters), and a low density of dislocations ( typically less than 1 E 8 cm' 2 ).
  • a major challenge therefore consists in minimizing the density of defects in the nitride layer obtained by epitaxy. Indeed, the performance of microelectronic or optoelectronic devices made from these nitride layers are very sensitive to the density of structural defects such as dislocations.
  • dislocations originate from the difference in lattice parameters between the epitaxial layer and the substrate, as well as the coalescence of the small-sized grains which are formed at the start of the growth; these grains are slightly disoriented relative to each other and they join, forming at the level of the coalescence joint, dislocations which then cross the entire epitaxial structure.
  • Patent application WO2019122461 describes a solution which consists in growing a layer of nitride on studs, also referred to as pillars.
  • These pads include a creep section surmounted by a crystalline section. More specifically, these pads are formed by etching an SOI (silicon on insulator) type substrate.
  • SOI silicon on insulator
  • the thin silicon film (active layer) and the buried oxide layer (burned oxide - BOX) of the SOI substrate form, after etching, respectively the crystalline section and the creep section of each pad.
  • crystallites are then grown by epitaxy on the surface of the pads. The crystallites come together during the coalescence, the creep sections deforming to allow coalescence without the formation of defects, then form a layer of nitride which continues to grow while thickening.
  • a method for obtaining at least one layer of nitride based on an III-N material.
  • the process comprises the following successive steps:
  • each pad comprising at least:
  • a germination section, crystalline, carried by the basal section selectively modifying the basal section vis-à-vis the germination section so as to form a modified basal section having a lower rigidity than the basal section before modification.
  • the basal section and more generally the stud are made more easily deformable, in particular under the effect of a mechanical stress generated during the coalescence phase of the crystallites.
  • the proposed method provides for firstly having studs, then modifying the basal crystalline sections, for example based on Si, in order to make them more easily deformable during the growth step by epitaxy.
  • the portion of the stud which is formed by the modified basal section can then deform.
  • the mechanical stresses generated by this contact are transferred to the studs and therefore to the basal sections.
  • the latter deform, thereby absorbing some or all of the mechanical stresses. It is thus possible to considerably reduce, or even avoid, the appearance and propagation of dislocations at the level of the coalescence joints between the crystallites which form, for example, a vignette of III-N material.
  • the disorientation between crystallites results in the creation of a grain boundary to coalescence.
  • This grain boundary is highly energetic since it results from the superposition of the stress fields of the defects that compose it. If the crystallites grow on studs which can deform as the process described allows, the Adjacent crystallites then orient themselves in-plane or out-of-plane to minimize the total energy of the system without the formation of grain boundaries. On the contrary, if the crystallites grow on pads which cannot deform, there is formation of grain boundaries and therefore appearance of dislocations.
  • the studs are relatively undeformable
  • the studs are made more deformable.
  • This section is taken in a plane substantially parallel to an upper face from which the studs extend. More specifically, the proposed method allows the studs, before the modification step, to have a large section, and in particular a section which would not allow the basal crystalline sections to deform sufficiently during growth by epitaxy in order to avoid the formation of dislocations.
  • This section of initial pads since it is relatively large, can be obtained with a very wide choice of conventional manufacturing processes, such as ultraviolet photolithography which is inexpensive.
  • the modification step carried out on the crystalline sections for example by reducing their section and/or by modifying their material by oxidation by modification, makes it possible to increase the capacity of these studs to deform, this in order to reduce, or even avoid, the dislocations.
  • the proposed method therefore makes it possible, by relaxing the dimensional constraints on the definition of the pads, to reduce the duration and the cost of manufacturing the III-N nitride layers and the components made from these layers.
  • the pads etched in the SOI substrate must have a very small section, for example less than 200 nm. This small dimension implies the use of lithography techniques that are very costly and time-consuming to implement.
  • etching by electron beam (E-beam) This process is particularly long since it requires defining each of the plots individually and successively. It becomes excessively expensive when it becomes necessary to carry out numerous studs.
  • the proposed method is particularly advantageous when the studs are defined by less restrictive and expensive techniques such as ultraviolet photolithography, more complex techniques such as E-beam lithography or nanoimprinting can perfectly be used to implement the method. offers.
  • the proposed method makes it possible to use crystalline basal sections having a relatively large thickness (the thickness is taken in a direction perpendicular to the upper face of the support substrate). It is then possible to implement this process from bulk substrates.
  • This type of substrate is much less expensive than elaborate substrates comprising a thin crystalline layer. This is for example the case of SOI substrates, in which a thin crystalline layer (the active layer) rests on a dielectric layer which itself rests on a support substrate. SOI type substrates are expensive and increase the cost of manufacturing components based on III-N materials.
  • the proposed method makes it possible to obtain layers formed of III-N material, the coalescence of which is usually more complex to obtain. Such is the case of the AIN.
  • the preferred direction of growth is substantially perpendicular to the upper face of the base substrate.
  • This direction, designated direction c is not conducive to rapid coalescence of the crystallites carried by the adjacent pads.
  • the rapid coalescence requires having a significant growth in the plane perpendicular to the direction c (ie, in a plane parallel to that of the upper face of the support substrate).
  • the proposed method by providing very narrow studs, makes it possible to bring the adjacent studs very close together. The distance between adjacent pads being reduced, the crystallites must grow over a very short distance to come into contact with the adjacent crystallites.
  • the coalescence of the crystallites then takes place more rapidly.
  • the proposed method thus makes it possible to reduce the time and the cost of obtaining layers of III-N materials in which the growth of the c direction is highly preponderant.
  • the proposed method thus makes it possible to reduce the cost of obtaining AIN-based components, such as than UV LEDs. More specifically, coalescence from close plots allows faster coalescence.
  • the growth from deformable pads makes it possible to reduce the density of dislocations in AlN.
  • the crystalline quality of the buffer layers of AIN is a predominant factor for UV LEDs.
  • the proposed method provides the advantages of the method described in document WO2019122461, in terms of reduction, or even elimination, of dislocations at the coalescence joints between two crystallites.
  • the proposed process makes it possible to obtain in a layer, even a thick one, lower dislocation densities than those obtained with conventional solutions for growing GaN on silicon (Si) or on silicon carbide (SiC) or on sapphire.
  • the proposed method makes it possible to obtain layers of III-N materials, having a large thickness and a low dislocation density.
  • the proposed method is then particularly advantageous for the production of microelectronic components such as LEDs, power components, for example vertical transistors or HEMT transistors.
  • FIG. 1A illustrates an example of a stack from which an example of a method according to the invention can be implemented.
  • several layers of nitride, each forming a thumbnail, are formed on a base substrate.
  • Figure 1B illustrates the stack of Figure 1A on which a seed layer is formed.
  • Figure 1C illustrates the result of a step consisting in forming sets of pads from the stack of Figure 1 A or that of Figure 1 B.
  • FIG. 1D illustrates a step for modifying the crystalline sections.
  • this modification comprises a reduction in the section of the crystalline sections.
  • Figure 1E illustrates an epitaxial growth phase of crystallites, in particular on the top of the pads, this growth phase not having been completed.
  • FIG. 1F illustrates the result of the epitaxial growth of crystallites, after coalescence of the crystallites carried by studs of the same set, the crystallites carried by studs of the same set then forming a thumbnail.
  • Figure 1G illustrates an optional step for making a component, for example an LED with the formation of multiple quantum wells within each nitride vignette.
  • Figures 2 to 6 illustrate several embodiments for performing the step of modifying the basal sections so as to make them less rigid.
  • FIG. 2 illustrates an embodiment in which the modification step comprises a reduction by etching of the section of the crystalline basal sections.
  • FIG. 3 illustrates an embodiment in which the modification step comprises a transformation of the basal crystalline sections, for example by amorphization of their material, so as to make them more easily deformable during growth by epitaxy.
  • FIG. 4 illustrates an embodiment in which the modification step comprises a reduction by etching of the section of the basal crystalline sections and an amorphization of the basal crystalline sections.
  • Figure 5 illustrates an embodiment in which the modification step includes porosification of the basal crystalline sections.
  • Figure 6 illustrates an embodiment in which the modification step includes porosification and amorphization of the basal crystal sections.
  • Figures 7A to 7D illustrate, very schematically, a sectional view of the different steps of an example of a process for forming a layer of III-N material favoring the c direction during growth by epitaxy.
  • Figure 8 is a top view corresponding to that of Figure 7C.
  • providing the stack comprising a plurality of pads comprises: - provide a basic structure comprising at least:
  • a base substrate crystalline, preferably based on silicon, for example Si, SiGe or SiC,
  • the etching defines, in the seed layer, the seed section of each pad.
  • This etching also defines in the base substrate: the basal section of each stud and the support substrate from which extends the basal section of each stud.
  • the section of the basal sections is greater than 100 nm ( 10'9 meters), preferably greater than 200 nm.
  • the etching to define the plurality of pads in the base structure is carried out through an etching mask surmounting the seed layer, the etching mask being preferably produced by ultraviolet photolithography.
  • the modification is carried out so that the force F1 which should be applied to obtain a given deformation of the modified basal section is less than 0.8*F2, F2 being the force which should be applied to obtain a deformation identical to the given deformation of the unmodified basal section, preferably F1 ⁇ 0.6*F2 and preferably F1 ⁇ 0.4*F2.
  • selectively modifying the basal section comprises etching the basal section selectively to the germination section, so as to form a modified basal section having a section d 310 less than a section d 50 o of the germination section, preferably d 310 s 0.8* d 50 o and preferably d 310 s 0.5*d 50 o.
  • the etching is an isotropic etching.
  • selectively modifying the basal section comprises transforming the basal section so as to make the material of the basal section more easily deformable in particular at a temperature T eP axis to which the stack is subjected during growth by epitaxy.
  • T eP axis to which the stack is subjected during growth by epitaxy.
  • selectively modifying the basal section or transforming the material of the basal section comprises at least partial amorphization of the section basal, preferably selectively to the germination section, so as to form an amorphous modified basal section.
  • the amorphization is obtained by oxidation of the basal section, preferably selectively to the germination section.
  • the basal section is modified by oxidation.
  • the basal section is made of silicon and the modified basal section is made of SixOy, x and y being non-null integers, preferably the SixOy being SiO2.
  • the oxidation is a thermal oxidation.
  • the modified section then exhibits the behavior of a viscous material.
  • the section modified by oxidation has a glass transition temperature Glass transition-
  • the epitaxial growth is carried out at an epitaxial temperature, such that .
  • the oxidation is carried out so as to oxidize the basal section over a thickness e 320 corresponding to less than half of the section d 30 o of the basal section, the thicknesses e 32 o and d 30 o being taken in a plane parallel to an xy plane in which mainly extends an upper face of the support substrate.
  • the oxidation is carried out so as to oxidize the entire section d 3O o of the basal section, the section being taken in a plane parallel to a plane in which an upper face of the support substrate mainly extends.
  • e 320 d 30 o.
  • the transformation of the material of the basal section is obtained by nitriding the basal section.
  • selectively modifying the basal section comprises: said transformation, preferably by oxidation, and
  • the etching is carried out before amorphization by oxidation, because it is desirable to have higher times and temperatures to make a thicker thermal oxidation.
  • modifying the basal section includes porosifying the basal section, preferably selectively to the germination section.
  • the Si substrate has or is a heavily doped layer on the surface to limit the extension of the porosification.
  • selectively modifying the basal section comprises: said transformation and
  • selectively modifying the basal section comprises at least two and preferably the following three steps: said transformation, for example by amorphization of the basal section, and said porosification of the basal section. said etching of the basal section selectively to the germination section.
  • the amorphization is carried out after the porosification.
  • the transformation for example by amorphization, is carried out after the porosification and the porosification is carried out after the etching.
  • the studs are distributed over the support substrate so as to form a plurality of sets of studs and the step of growth by epitaxy is interrupted before the crystallites belonging to two distinct sets come into coalescence, so that the layer formed on each set forms a thumbnail, the thumbnails being spaced from each other.
  • the crystalline seed section is made of a second III-N material, possibly identical to the III-N material of said nitride layer based on an III-N nitride material.
  • the seed section is based on one of gallium (Ga), indium (In) and aluminum (Al).
  • the germination section, crystalline is made of a different material from the material of the basal section.
  • the basal section extends from an upper face of the support substrate.
  • the basal section and the support substrate are formed from the same material.
  • the basal stretch is made or is based on one of silicon (Si), germanium (Ge), silicon germanium (Si-Ge), silicon carbide (SiC).
  • the pads also include at least one buffer section, located between the basal section and the germination section.
  • the basal section is based on Si
  • the buffer section (400) is in AIN and the germination section is in GaN.
  • the buffer section is directly in contact with the basal section.
  • the buffer section is directly in contact with the germination section.
  • the basal section is based on Si
  • the seed section is AlN
  • the seed section preferably being directly in contact with the basal section.
  • the germination sections are separated by a distance D and the section d 5O o of the germination sections is such that D ⁇ d 5O o, preferably, D ⁇ O.7*d 5 oo and preferably D ⁇ O.5*d 5O o.
  • D ⁇ d 5O o preferably, D ⁇ O.7*d 5 oo and preferably D ⁇ O.5*d 5O o.
  • the III-N material increases mainly in direction c and slowly in a plane xy perpendicular to the main direction z in which the pads extend.
  • the section d 310 of the modified basal sections 310 is such that d 310 ⁇ 0.5* d 50 o.
  • each of these layers has a lower face and an upper face, substantially parallel to an upper face of the substrate.
  • Each layer forms a thumbnail. All the lower faces of the layers are substantially included in the same plane. It is the same for the upper faces.
  • the basal section modified for example by oxidation, is made of a viscous material. It exhibits a viscoplastic transition.
  • the epitaxial growth being carried out at an epitaxial temperature, such that . Tepitaxy — k1 X Glass transition, with k1 S 0.8.
  • the epitaxial growth is carried out at an epitaxial temperature, such as . Tepitaxy — k1 X Glass transition, with k1 S 0.8.
  • k1 0.92.
  • k1 0.95.
  • the method can have at least any one of the following characteristics and steps which can be combined or taken separately:
  • the distance D separating two adjacent studs of the same set is less than the distance W1 separating two adjacent studs belonging to two different sets.
  • k4 1.5
  • k4 2.
  • W1 can be equal to 1.5 microns.
  • W2 being the distance separating two adjacent thumbnails (see W2 in FIG. 1F), W2 must be non-zero so that the two adjacent thumbnails do not touch. Thus, W2 > 0.
  • W1 > k5 x W2, with:
  • - W2 is the distance separating two adjacent thumbnails, W2 being > 0.
  • each pad has a section whose maximum dimension d piot is between 10 and 500 nm ( 10'9 meters), the maximum dimension d piot being measured in a plane parallel to a plane (xy) in which mainly extends an upper face of the substrate, preferably 20 nm ⁇ d piot ⁇ 200 nm and preferably 50 nm ⁇ d piot ⁇ 100 nm.
  • d pin d p
  • each thumbnail has a section whose maximum dimension of the thumbnail is between 0.5 and 20 ⁇ m ( 10'6 meters), the maximum dimension of the thumbnail being measured in a plane parallel to a plane (xy) in which s' mainly extends an upper face of the substrate, preferably 0.8 ⁇ m ⁇ 3 ⁇ m poop and preferably 1 ⁇ m ⁇ 2 ⁇ m poop.
  • the maximum dimension dvignette thus corresponds to the maximum dimension of a projection of the vignette in a plane parallel to the xy plane in which the upper face of the substrate mainly extends.
  • the pads of the same set are distributed on the substrate in a non-periodic manner.
  • the stamps are distributed over the substrate periodically.
  • the studs comprise at least one buffer section surmounting the basal crystalline section.
  • This buffer section is made of a different material than the nitride stickers.
  • the nitride decals are made of gallium nitride (GaN) and the buffer layer is aluminum nitride (AIN). This makes it possible to avoid the appearance of the phenomenon of melt back etching (etching by reflow), generated by the very strong reactivity between the gallium and the silicon.
  • each pad has an upper face still designated apex and the growth by epitaxy of the crystallites takes place at least in part and preferably only from said upper face.
  • the basal section has a height h 310 such that h 310 s O. lxdpiot, dpiot being the diameter of the stud or more generally the edge-to-edge distance of the stud taken, at the level of the basal section and in a direction parallel to a plane (xy) in which mainly extends an upper face of the substrate.
  • h 310 s Ixdpiot.
  • the studs have a height H piot , and in which two adjacent studs are separated by a distance D, such that: H piot / D ⁇ 2 and preferably H p iot / D ⁇ 1.
  • the basal section, before modification, is based on silicon.
  • the basal section is made of silicon.
  • the basal crystalline section can also be based on materials other than Si and which allow the epitaxy of nitride materials.
  • the basal crystalline section can be based on SiC or on Al 2 O 3 .
  • the base substrate having served to form the basal crystalline section is a monocrystalline layer.
  • crystals are grown by epitaxy on all the pads.
  • the nitride of the vignettes is a nitride
  • the material forming the nitride (N) of the vignettes is any one of: gallium nitride (GaN), indium nitride (InN), aluminum nitride (AIN), aluminum gallium nitride (AIGaN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AIGalnN), aluminum indium nitride (AllnN), indium gallium aluminum nitride (AlInGaN).
  • k3 3. According to an example 100 > k3 > 3. Preferably, 50 > k3 > 3. Preferably, 5 > k3 > 3.
  • P piot The pitch according to which the plots of the same set are distributed is denoted P piot .
  • P pio t/d p iot 4 Preferably, P pio t/d pio t 5-
  • P pio t/d pio t 5.
  • micro-LED designates an LED of which at least one dimension taken in a plane parallel to the main plane in which extends the substrate supporting the micro-LED (ie, the xy plane of the orthogonal reference referenced in the figures) is micrometric, that is to say strictly less than 1 mm (10' 3 meters).
  • the micro-LEDs have, in projection in a main extension plane parallel to the main faces of the micro-LEDs, ie, parallel to an upper face of the substrate, maximum dimensions of micrometric dimension in the plan.
  • these maximum dimensions are less than a few hundred micrometers.
  • these maximum dimensions are less than 500 ⁇ m and preferably less than 100 ⁇ m.
  • HEMT type transistors (acronym for "High Electron Mobility Transistor”) field effect transistors with high mobility of electrons, sometimes also referred to by the term field effect transistor with heterostructure.
  • Such a transistor includes the superposition of two semiconductor layers having different forbidden bands which form a quantum well at their interface. Electrons are confined in this quantum well to form a two-dimensional electron gas. For reasons of high voltage and temperature resistance, the materials of these transistors are chosen so as to have a wide forbidden energy band.
  • the terms “over”, “overcomes”, “covers” or “underlying” or their equivalents do not mean “in contact with”.
  • the deposition of a first layer on a second layer does not necessarily mean that the two layers are directly in contact with one another, but it does mean that the first layer at least partially covers the second layer. by being either directly at his contact, or by being separated from it by at least one other layer or at least one other element, including air.
  • a stud surmounting a first layer does not mean that the stud is necessarily in contact with this first layer but means that the stud is either in contact with this first layer, or in contact with one or more layers arranged between the first layer and the pad.
  • stages of formation of the different layers and regions are understood in the broad sense: they can be carried out in several sub-stages which are not necessarily strictly successive.
  • the thickness or height is taken in a direction perpendicular to the main faces of the different layers.
  • the thickness or height is taken along the vertical or along the z axis of the orthogonal reference frame shown in Figure 1A.
  • a substrate, a layer, a device, "based" on a material M is understood to mean a substrate, a layer, a device comprising this material M only or this material M and possibly other materials, for example elements alloy, impurities or doping elements
  • FIGS. 1A to 1G An example of a process for forming a nitride layer will now be described with reference to FIGS. 1A to 1G.
  • a plurality of layers of III-N material are produced, each forming a thumbnail 550A, 550B.
  • a base structure 20 comprising a base substrate 10, surmounted by at least one buffer layer 40.
  • the base substrate 10 is crystalline, preferably monocrystalline. According to one example, the base substrate 10 is based on silicon. Preferably, the base substrate 10 is a bulk substrate (bulk substrate) of monocrystalline silicon. Alternatively, the base substrate 10 can be made of germanium (Ge), silicon germanium (SiGe) or else be based on SiC or Al 2 O 3 .
  • the base substrate 10 is self-supporting. It is not attached to another substrate. Alternatively, the base substrate 10 itself rests on an additional substrate or an additional layer, fixed on its lower face 11.
  • the buffer layer 40 illustrated in FIG. 1A is preferably deposited by epitaxy on the upper face 12 of the base substrate 10. This buffer layer 40 is only optional.
  • this buffer layer 40 is typically made of aluminum nitride (AIN). This makes it possible to avoid the so-called “Melt-back etching” phenomenon (reflow etching), generated by the very strong reactivity between silicon and gallium at the usual epitaxy temperatures (1000/1100°C) and which leads to very strongly degrade the 550A, 550B vignettes of GaN.
  • AIN aluminum nitride
  • the AlN layer thickness is between 10 and 100 nanometers (10.9 meters).
  • a seed layer 50 has the function of facilitating the resumption of growth of the crystallites 510 during the following steps. .
  • This seed layer 50 is from an upper face of the seed layer 50 that at least partly the growth by epitaxy of the crystallites 510A1-510B4 takes place, the crystallites being illustrated in FIG. 1E.
  • This seed layer 50 is preferably made of the same material as that of the thumbnails 550A, 550B that it is desired to obtain in the end.
  • the seed layer 50 is also GaN.
  • This seed layer 50 has for example a thickness of between 50 and 200 nanometers.
  • buffer layer 40 is placed directly in contact with base substrate 10. Also preferably, buffer layer 40 is placed directly in contact with seed layer 50.
  • thumbnail 550A For the sake of conciseness and clarity, only four studs 1000A1-1000A4 are shown in the figures to support a thumbnail 550A.
  • a sticker 550A can be formed on a greater number of pads. As will be described later, the number of pads as well as their period will be adapted according to the size desired for the microelectronic device, such as an LED, a transistor (of the HEMT type for example) or a diode of power, which we wish to achieve from this thumbnail.
  • studs 1000A1-1000B4 are then formed from the stack. These pads are obtained by etching the stack into the base substrate 10.
  • etching To form the studs by etching, many techniques can be used known to those skilled in the art. It will be possible in particular to use conventional lithography techniques, such as ultraviolet photolithography techniques comprising the formation of a mask, for example in resin, then the transfer of the patterns of the mask into the stack. These etching techniques have the major advantage of being fast and inexpensive. It will also be possible to use electron beam (e-beam) lithography techniques or nanometric printing techniques.
  • e-beam electron beam
  • studs 1000A1-1000B4 are small in size and can be qualified as nano-studs or nano-pillars.
  • the maximum dimension of the section of the pads taken in a plane parallel to the plane xy of the orthogonal coordinate system xyz or to the plane of the upper face 110 of the substrate 100, is between a few tens and a few hundreds of nanometers. This dimension is denoted by piot according to the studs.
  • d piot is between 50 and 1000 nanometers and preferably between 100 and 250 nm and preferably between 200 and 500 nm, for example of the order of 200 nm or 300 nm.
  • This maximum dimension of the section of the studs is referenced d piot in FIG.
  • this maximum dimension d stud corresponds to the diameter of the studs. If the studs are of hexagonal section, this maximum dimension d stud corresponds to the diagonal or to the diameter of the circle passing through the angles of the hexagon. If these studs are of rectangular or square section, this maximum dimension of stud corresponds to the largest diagonal or to the side of the square.
  • the pads 1000A1-1000B4 are not all distributed evenly on the surface of the substrate 100.
  • the pads 1000A1-1000B4 form sets 1000A, 1000B of pads, each set comprising a plurality of pads.
  • the pads 1000A1-1000A4 forming the same set 1000A define a network of pads remote from the network of pads 1000B1-1000B4 forming another set 1000B.
  • the adjacent pads 1000A1-1000A4 of the same set 1000A are separated by a distance D.
  • the adjacent pads 1000A4-1000B1 belonging to two separate sets 1000A, 1000B are separated by a distance W1.
  • the distances D and W1 are taken in planes parallel to the xy plane and are illustrated in FIG. 1C.
  • the studs 1000A1-1000A4 of the same set 1000A are intended to support a single thumbnail 550A which will be distant from another thumbnail 550B supported by another set 1000B of studs 1000B1-1000B4.
  • the distance D may vary.
  • the plots 1000A1-1000A4 of the same 550A vignette can be distributed non-periodically. Their distribution can thus be adapted to promote the growth of the thumbnail.
  • D can take the following values for the same thumbnail: 100 nm, 90 nm, 85 nm, 107 nm.
  • the vignettes 550A, 550B formed on sets of pads 1000A, 1000B distributed in a non-periodic manner can for their part be arranged in a periodic manner on the substrate. This facilitates the realization of a micro screen.
  • the 1000A1-1000B4 studs are made up of a stack of sections.
  • the sections extend along the main extension direction of the block, i.e. vertically (z) in Figures 1A to 1G.
  • Each section corresponds to one of the layers of the base structure 20.
  • a first section designated basal section 300 extends from a non-etched portion of the base substrate 10.
  • This non-etched portion of the base substrate 10 defines a support substrate 100 for pads 1000A, 1000B.
  • the basal section 300 and the support substrate 100 are formed in the base substrate 10.
  • the basal section 300 has continuity of material with the support substrate 100.
  • the pads 1000A1-1000B4 comprise, above the basal section 300, a seed substrate 500 and optionally a buffer substrate 400.
  • the seed substrate 500 and the buffer substrate 400 correspond respectively to the non-etched portion of the seed layer 50 and to the non-etched portion of the buffer layer 40.
  • the sections of the same plot have substantially the same section.
  • the sections are solid.
  • the section of the sections is taken parallel to the xy plane, i.e. parallel to the planes in which the faces of the base substrate 10 mainly extend.
  • the basal sections 300 of the studs 1000A1-1000B4 have a height H 30 Q, referenced in FIG. 1C.
  • d piot is the maximum dimension of the section of the pad taken in a direction parallel to a plane (xy) in which mainly extends an upper face of the substrate.
  • H 30 Q is such that, if the etching technology imposes d piot >50 nm, it is preferable for H 30 Q > 2*d piot to be H 30 Q > 100 nm, preferably H 30 Q > 150 nm.
  • dpiot 150nm, it is preferably H 30 Q > 300nm etc. It will be noted that this height is advantageously greater than the usual thickness of the crystalline active layer of a SOI substrate.
  • the buffer sections 400 have a height H 40 o.
  • H 40 o is greater than 50 nm.
  • H 4O o is greater than 100 nm.
  • H 400 is greater than 150 nm.
  • H 400 is between 100 nm and 300 nm.
  • the germination sections 500 have a height H 50 o.
  • H 50 o is greater than 100 nm.
  • H 5O o is greater than 200 nm.
  • H 500 is between 100 nm and 2 ⁇ m.
  • the heights H 30 Q, H 40 Q, H 5O o of the sections 300, 400, 500 are measured in a direction z perpendicular to the main plane xy in which mainly extends an upper face 110 of the base substrate 100, the basal sections 300 extending from this upper face 110.
  • D corresponds to the smallest distance separating two adjacent spots before growth by epitaxy of the crystallites. D is measured parallel to the xy plane.
  • Each plot has a height, referenced H piot , corresponding to the sum of the heights of its sections.
  • Hpiot/D ⁇ 2 and preferably Hpiot /D ⁇ 1.5.
  • H piot is measured along the z direction.
  • the pads are etched through the entire seed layer 50, the entire buffer layer 40 (when the latter is present). Preferably, only a portion of the thickness of the base substrate 10 is etched.
  • FIG. 1D illustrates the step for modifying pads 1000A1-1000B4. This step is also illustrated in FIG. 2. This step is configured so as to make at least the basal sections 300 more deformable. At the end of this step, the basal sections 300 are modified, for example in terms of geometry or in terms of materials. Consequently, if the 510A1-510A1 crystallites carried by two adjacent pads 1000A1-1000A2 are disoriented with respect to each other, during the coalescence of these two crystallites, the joint 560 formed at their interface, usually referred to as the grains or coalescence joint, will form without dislocation to catch up with these disorientations. These coalescence joints are illustrated in FIG. 1F.
  • the deformation of the modified basal sections 310 thus makes it possible to compensate for these disorientations and to obtain thumbnails 550A, 550B without or with very little dislocations at coalescence 560 joints.
  • the step of modifying the basal section 300 is such that it allows, during the coalescence of the crystallites 510A1-510B4, the deformation of the basal section 300 so that the crystallites 510A1-510B4 can orient themselves to compensate for a disorientation 510A1-510A1 crystallites carried by two adjacent pads 1000A1-1000A2.
  • the step of modifying the basal section 300 is such that it allows, during the coalescence of the crystallites 510A1-510B4, the deformation of the basal section 300 so that the crystallites 510A1-510B4 can orient themselves to minimize the energy of the system.
  • this modification step includes a reduction in the section of the basal sections 300.
  • the basal sections 300 Before the modification step, the basal sections 300 have a section d 3 oo. At the end of the modification step, they each have a section d 310 such that d 3 io 0.8 * d 30 o. Preferably d 3 io 0.6 * d 3 oo, and even more preferably d 310 ⁇ 0.5 * d 30 o.
  • the references d 3O o and d 31o are indicated in figures 1 D and 2.
  • d 310 ⁇ 100 nm.
  • d 310 ⁇ 50 nm.
  • this etching makes it possible to etch the material of the basal sections 300 selectively to the other sections of the pads.
  • this etching is isotropic.
  • this etching is a wet etching. It can also be isotropic dry etching. Thus, it consumes a part 101b of the upper face 110 of the support substrate 100, the part 101a of the support substrate 100 not being etched.
  • the basal section 300 is based on silicon
  • the buffer section 400 is AlN
  • the seed section 500 is GaN
  • a wet etching based on a dry etching solution can be provided. , based on XeF2
  • the thickness e 32 o of the basal section 300 consumed during this etching is referenced in FIG. 2. This thickness e 32 o is preferably time-controlled.
  • Figure 1E illustrates the formation of crystallites 510A1-510B4 by epitaxial growth from seed layer 50.
  • the studs 1000A1-1000B4 each support a crystallite 510A1-510B4 carried by a stack of sections 500A1-400B4, 400A1-400B4, 300A1-300B4.
  • the growth by epitaxy of the crystallites 510A1-510B4 takes place at least in part or only from the upper face 1010 of the pad 1000A1-1000B4, also designated vertex 1010 of the plot. This makes it possible in particular to quickly obtain 510A1-510B4 crystallites of significant thickness.
  • the upper faces of the buffer layer 40 and of the seed layer 50 that is to say the faces turned with regard to the thumbnails 550A, 550B which it is desired to grow, have polarities of the type Gallium (Ga), and not nitrogen (N), which considerably facilitates obtaining 550A, 550B vignettes of high quality epitaxial nitride.
  • crystallites 510A1-510B4 continue and extends laterally, in particular along planes parallel to the xy plane.
  • the crystallites 510A1-510B4 of the same set 1000A of pads 1000A1-1000A4 develop until they coalesce and form a block or vignettes 550A, 550B as illustrated in figure 1 F.
  • each thumbnail 550A, 550B extends between several pads 1000A1-1000A4.
  • Each vignette 550A, 550B forms a continuous layer.
  • step 1F a plurality of thumbnails 550A, 550B are obtained, each thumbnail 550A being supported by the studs 1000A1-1000A4 of a same set 1000A of studs.
  • Two adjacent vignettes 550A, 550B are separated by a distance W2, W2 being the smallest distance taken between these two vignettes. W2 is measured in the xy plane.
  • W2 depends on W1, the duration and the speed of epitaxial growth. W2 is nonzero. W2 ⁇ W1.
  • poop the maximum dimension of a vignette measured parallel to the xy plane.
  • poop corresponds to the maximum dimension of a projection of the thumbnail in a plane parallel to the xy plane.
  • 0.8 pm ⁇ poop 3 pm corresponds to an example 0.8 pm ⁇ poop 3 pm.
  • 1 pm ⁇ poop 2 pm corresponds to an example poop is between 10pm and 200pm.
  • poop is of the order of 1000 pm.
  • power transistors of the HEMT type. poop depends on the speed and the duration of the epitaxial growth as well as on the number, the dimension and the pitch Ppiot of the studs of the same set.
  • the process for making the vignettes 550A, 550B can be stopped at the end of FIG. 1F. Alternatively, this process can be continued to form a device integrating the layer of III-N material.
  • the III-N material layer forms a thumbnail
  • the method can be continued to form, for example, a micro-LED, a diode or a transistor from each of the thumbnails 550A, 550B.
  • FIG. 1G illustrates a non-limiting embodiment in which quantum wells 590 are produced within each thumbnail 550. This embodiment advantageously makes it possible to directly produce a micro-LED of size corresponding to the initial size of the thumbnail.
  • quantum wells 590 within each thumbnail 550 those skilled in the art will be able to implement known solutions from the state of the art.
  • the crystallites 510 have coalesced, the same growth conditions are adopted for the wells as during conventional two-dimensional growth.
  • micro-LEDs The smallest dimension possible for micro-LEDs depends on the ultimate resolution of the structuring methods chosen: for example, for networks produced by nanoimprinting, we reach spot sizes of 50 nm and periods P piot of 150 to 200 n. This means that one obtains poop dimensions of vignettes of 1 to 2 ⁇ m. This is therefore of the order of the pixel sizes sought for high resolution p-displays.
  • the pads 1000 are distributed over the substrate 100 so as to form distinct sets 1000A, 1000B so that a layer of III-N material is formed. on each set and that the growth by epitaxy is interrupted before the different layers come into contact, thus forming distinct and separate thumbnails 550A, 550B on the substrate 100.
  • the step of modifying the basal sections makes them less rigid.
  • This lower rigidity can for example be checked by applying a force, for example a torsion around an axis parallel to the plane of the upper face of the support substrate:
  • This force can also be applied to the basal section itself. We can then measure the difference in deformation of the stud or the basal section when an identical force is applied before and after modification.
  • the reduction in rigidity of the basal section or of the stud is greater than 20% and preferably 50%.
  • the force F1 that should be applied to obtain a given deformation of the modified basal section 310 is less than 0.8*F2, F2 being the force that should be applied to obtain an identical deformation of the basal section 300 unmodified.
  • the ratio between F2 and F1 can simply be the ratio of the sections or the radii of the studs. If the material of the pad is transformed, for example by amorphization, it is then necessary to bring in the elastic moduli of the material before and after modification. For example, if without modification of the stud, diameter ratios of a factor of two are needed for the same applied force to produce the same "deformation", this factor can become equal to 1 if the elastic moduli, after deformation, are reduced by a factor of two.
  • FIG. 2 schematically illustrates the embodiment of FIG. 1D.
  • the modification of the basal section 300 is obtained by reducing its section using an etching, preferably isotropic.
  • an etching preferably isotropic.
  • This embodiment has the advantage of being based on well-known techniques. Moreover, it can be implemented at low temperature. It also does not imply any limitation in terms of silicon doping.
  • Embodiments also make it possible to form the basal sections 300 to from particularly hard materials such as Al 2 O 3 or SiC.
  • a passivation layer on the surface of the basal sections 300 before regrowth of the nitride based on a III-N material (for example GaN).
  • a III-N material for example GaN.
  • these basal sections 300 are made of silicon based on silicon.
  • this passivation layer it is possible to provide oxidation or nitriding of only a portion of the thickness of the basal sections 300. This passivation layer naturally extends from the outer face of the basal sections 300. To this end, very slight oxidation or nitriding can be provided, for example with NH 3 before growth by epitaxy.
  • this passivation layer avoids the appearance of the reflow etching phenomenon, usually referred to as meltback ecthing, which can occur when GaN and Si are in contact.
  • FIG. 3 illustrates an embodiment in which the modification of the basal section 300 is obtained by transformation of the crystalline material constituting the basal section 300.
  • This transformation causes the material of the basal section 300 to become more easily deformable, in particular at the temperature T éP itaxia to which the stack is subjected during growth by epitaxy. After transformation, the basal section 300 thus has a lower rigidity than before transformation.
  • this transformation is obtained by at least partial nitriding of the crystalline material.
  • the transformation is obtained by amorphization of the crystalline material.
  • the amorphization is obtained by oxidation of the crystalline material.
  • the modified basal section 310 then has a different material from that of the basal section 300. Preferably, this modification is carried out throughout the section d300 of the basal section 300.
  • this oxidation does not alter the sections 400, 500 surmounting the basal section 300. This oxidation is therefore selective.
  • the oxidatively modified basal section 310 is made of a viscous material. It then presents the behavior of materials with glass transition or viscoplastic transition. In particular, it can be characterized by its glass transition temperature Glass transition- Like all materials having a glass transition temperature, the creep section 300, under the effect of a rise in temperature, deforms without breaking and without resume one's position initial after a drop in temperature.
  • the temperature T éP itaxie at which the epitaxy is carried out is greater than or of the order of the glass transition temperature Tt ra nsition vitreous transition of the material constituting the modified basal section 310.
  • the modified basal section 310 is brought to a temperature which allows it to deform. It can flow. It can be called a creep section.
  • T epitaxy ⁇ 600°C in the context of molecular beam epitaxy
  • epitaxy — 900°C and preferably T epitaxy 1000°C and preferably T epitaxy ⁇ 1100°C.
  • k2 0.9. This makes it possible to avoid a diffusion of the species of the material whose melting temperature is the lowest. If the buffer section 400 and the germination section 500 are made of AlN and GaN, the melting temperatures of which are greater than 2000 degrees, the risk of diffusion will be avoided.
  • the modified basal section 310 is a silicon oxide SixOy, (x and y being non-null integers) such as SiO 2 .
  • this oxidation affects the material of the base substrate 10 isotropically.
  • a portion 101b of the support substrate 100 supporting the basal sections 300 is also oxidized.
  • the portion of the support substrate 100 which is not oxidized is denoted 101a in FIG. 3.
  • this oxidation could be carried out with the following parameters: 1000° C. under oxygen or 950° C. under steam. Time varies with pillar size.
  • This embodiment also has the advantage of avoiding that during epitaxy the nitride of the vignettes 550A, 550B grows from crystalline portions of the basal sections 300 or of the upper face 110, crystalline, of the support substrate 100. amorphizes the basal sections 300 and the upper face 110 of the support substrate 100 by oxidizing them, prevents unwanted epitaxy on these surfaces.
  • This embodiment makes it possible to obtain modified basal sections 310 that are particularly deformable, in particular at conventional epitaxial temperatures. Furthermore, it does not require the implementation of complex or costly process steps.
  • this embodiment avoids the appearance of the meltback ecthing mentioned above
  • FIG. 4 illustrates an embodiment in which the modification of the basal section 300 is obtained by: reducing the section of the basal section 300, and
  • this embodiment corresponds to a combination of the embodiments described above with reference to figures 2 and 3. All the characteristics, steps and technical effects mentioned above with reference to figures 2 and 3 are applicable to the modes of realization illustrated in figure 4.
  • the reduction of the section of the basal section 300 by etching is carried out before the amorphization.
  • the reduction of the section of the basal section 300 by etching is carried out after the amorphization.
  • This embodiment has the advantage of making the etching of the basal sections 310 even more selective with respect to the other sections 400, 500 of the plot. Indeed, oxidized silicon etches more easily than crystalline silicon.
  • This embodiment is for example possible with an etching, for example by hydrofluoric acid (HF), to etch selectively and isotropically SiO 2 formed during the step of oxidation of the basal sections 300.
  • HF hydrofluoric acid
  • This embodiment combining reduction of the section and amorphization of the basal sections makes it possible to considerably promote the deformation of the latter during coalescence, which makes it possible to further reduce the density of dislocations.
  • FIG. 5 illustrates an embodiment in which the modification of the basal section 300 is obtained by porosification of the crystalline material constituting this section 300.
  • the modified basal section 310 then has a different material from that of the basal section 300.
  • the elastic moduli (Young's modulus E 310 and shear modulus >) of the modified basal section 310 is such that E 310 s E 30 Q le ratio between the two values being a function of the degree of porosification of the material considered, E300 being the Young's modulus of the basal section 300 before modification.
  • silicon reference may be made to the following publication: Phys. Status Solidi C 6, No. 7, 1680-1684 (2009) / DOI 0.1002/pssc.200881053.
  • this modification by porosification is carried out in the entire section d300 of the basal section 300.
  • this porosification does not alter the sections 400, 500 surmounting the basal section 300. This porosification is therefore selective.
  • this porosification affects the material of the base substrate 10 isotropically.
  • a portion 101b of the support substrate 100 supporting the basal sections 300 is also rendered porous.
  • the portion of the support substrate 100 which is not made porous is referenced 101a in FIG. 5.
  • the growth by epitaxy occurs between the pillars and from the substrate 100.
  • This embodiment by porosification is particularly advantageous when the material constituting the basal sections 300 is particularly hard. Such is the case of silicon carbide SiC.
  • this porosification can be carried out with the following parameters: the porosification of silicon is usually done in an electrolyte based on HF (preferably HF and isopropyl alcohol (IPA) for example).
  • HF preferably HF and isopropyl alcohol
  • the conditions are different: in the case of p-doped Si, the control of the process is done by the applied potential, whereas for n doping, irradiation with visible light (high power, for example greater than 700 watts) is required.
  • Unlike other materials (such as GaN) porosification is not completely selective with respect to doping.
  • the kinetics of the reactions vary according to the doping (resistivity of the plate).
  • the challenge of this step is to define the conditions to porosify only the base of the Si pillar without porosifying the GaN.
  • the AlN barrier and the difference in porosification mechanisms between Si p or n and GaN allows this process window to be determined.
  • This embodiment is thus particularly advantageous when the doping of the silicon wafer is controlled.
  • This doping of the silicon wafer can be done by implantation or during epitaxy. It also makes it possible, when combined with oxidation, to carry out this oxidation at very low temperatures.
  • FIG. 6 illustrates an embodiment in which the modification of the basal section 300 is obtained by:
  • this embodiment combines the embodiments described above with reference to Figures 2 and 5. All the characteristics, steps and technical effects mentioned above with reference to Figures 2 and 5 are applicable to the embodiments illustrated in figure 6.
  • the porosification of the section of the basal section 300 by etching is carried out before the amorphization.
  • the material is conductive when it is made porous.
  • the porosification of the section of the basal section 300 by etching is carried out after the amorphization.
  • This embodiment combining porosification and amorphization of the sections allows the deformation of the latter to be considerably favored during coalescence, which makes it possible to further reduce the density of dislocations.
  • the modification of the basal section 300 is obtained by: reduction of the section of the basal section 300, then before or after the section reduction, porosification of the crystalline material constituting the basal section 300.
  • the porosification can be carried out before or after the reduction of the section.
  • the porosification is carried out before the reduction of the section by etching, the selectivity of the etching is improved.
  • the modification of the basal section 300 is by carrying out each of the following steps: reduction of the section of the basal section 300, and porosification of the crystalline material constituting the basal section 300 and
  • the growth by epitaxy does not take place between the pads.
  • this upper face 110 can be modified. This modification can be obtained by oxidation or by nitriding. of this upper face 110.
  • the studs can be high enough for the coalescence of the crystallites to take place before the growth from the upper face 110 of the substrate 100 reaches the crystallites.
  • This embodiment is for example particularly suitable with AIN growth, since for this material the lateral growth rate is low.
  • the proposed process proves to be particularly advantageous for obtaining layers or vignettes of III-N material, the growth of which is made complex by the fact that the coalescence between adjacent crystallites takes place with difficulty or late. This advantage will now be explained with reference to FIGS. 7A to 8.
  • the growth mainly takes place in a direction parallel to the main direction in which the pads extend. This is the direction c, (axis z on the orthogonal frame of figure 7A).
  • crystallites grow at a slow rate in the xy plane. This delays the coalescence of the crystallites carried by the adjacent pads. This difficulty is encountered when it comes to obtaining a layer of AIN for example.
  • basal sections 310 modified to be made easily deformable.
  • the distance D being small, the adjacent crystallites very quickly come into contact with each other to coalesce. This can be obtained by defining germination sections 500 having large sections d 50 o . However, these large sections d 50 o are not detrimental since the basal sections 300 are modified to be made easily deformable in order to avoid the formation of dislocations.
  • FIG. 7A represents the base substrate 10 surmounted by a seed layer 50.
  • the base substrate 10 can be made of silicon and the seed layer can be made of AlN.
  • the thickness of the latter is for example of the order of 300 nanometers.
  • FIG. 7B illustrates the result of an etching step which makes it possible to define the pads 1000 in the seed layer 50 and the base substrate 10.
  • the pads 1000 of this stack thus each comprising a basal section 300 and a seed section 500.
  • the studs 1000 are spaced apart by a distance D and have a section denoted d piot or d 50 o.
  • FIG. 7C illustrates the result of a step of modifying the basal sections 300.
  • this modification step comprises a reduction by etching of the section of the basal sections 300, until obtaining a reduced section d 310 which is much lower to section d 5O o.
  • FIG. 8 illustrates, in top view, and in an enlarged manner, this stage illustrated in FIG. 7C (it will be noted that if the crystallites have hexagonal sections, FIGS. 7A to 7C correspond to views in broken section passing through the diagonals of the hexagons).
  • Figure 7D illustrates the result of the epitaxial growth step.
  • the crystallites 510 have entered into coalescence to form a vignette 550. Even though the growth in the xy plane is slow, the reduced distance D allows this coalescence to occur rapidly.
  • the present invention proposes a particularly effective solution for obtaining a single layer 550 of nitride or a plurality of epitaxial layers 550, having a very low density of dislocations while relaxing the dimensional constraints on the initial definition of the pads in the base structure 20. Furthermore, the proposed method makes it possible to use solid substrates and does not require the use of more expensive substrates such as SOI substrates.
  • the proposed process thus makes it possible to considerably reduce the costs of obtaining a nitride layer.
  • this process makes it possible to obtain nitride layers having both a high thickness and a very low dislocation density.
  • This method thus has considerable advantages for the production of power components requiring large thicknesses of III-N material.

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EP21840633.8A 2020-12-22 2021-12-22 Verfahren zur herstellung einer iii-n-materialschicht Pending EP4268266A1 (de)

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WO2022136588A1 (fr) 2022-06-30
FR3118304A1 (fr) 2022-06-24

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