EP4246810A1 - Surveillance de fréquence d'horloge pour une conception basée sur une boucle à verrouillage de phase - Google Patents

Surveillance de fréquence d'horloge pour une conception basée sur une boucle à verrouillage de phase Download PDF

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Publication number
EP4246810A1
EP4246810A1 EP23158272.7A EP23158272A EP4246810A1 EP 4246810 A1 EP4246810 A1 EP 4246810A1 EP 23158272 A EP23158272 A EP 23158272A EP 4246810 A1 EP4246810 A1 EP 4246810A1
Authority
EP
European Patent Office
Prior art keywords
range
oscillator
frequency
pll
comparison range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP23158272.7A
Other languages
German (de)
English (en)
Inventor
Ulrich Moehlmann
Andreas Lentz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of EP4246810A1 publication Critical patent/EP4246810A1/fr
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50—All digital phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
EP23158272.7A 2022-03-04 2023-02-23 Surveillance de fréquence d'horloge pour une conception basée sur une boucle à verrouillage de phase Pending EP4246810A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17/686,664 US11689206B1 (en) 2022-03-04 2022-03-04 Clock frequency monitoring for a phase-locked loop based design

Publications (1)

Publication Number Publication Date
EP4246810A1 true EP4246810A1 (fr) 2023-09-20

Family

ID=85381459

Family Applications (1)

Application Number Title Priority Date Filing Date
EP23158272.7A Pending EP4246810A1 (fr) 2022-03-04 2023-02-23 Surveillance de fréquence d'horloge pour une conception basée sur une boucle à verrouillage de phase

Country Status (2)

Country Link
US (1) US11689206B1 (fr)
EP (1) EP4246810A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004001975A1 (fr) * 2002-06-24 2003-12-31 Koninklijke Philips Electronics N.V. Systeme de syntonisation
US8140040B1 (en) * 2009-09-11 2012-03-20 Qualcomm Atheros, Inc Method and apparatus for a temperature compensated phase locked loop supporting a continuous stream receiver in an integrated circuit
US20150077164A1 (en) * 2013-04-30 2015-03-19 Micrel, Inc. Pll frequency synthesizer with multi-curve vco implementing closed loop curve searching using charge pump current modulation
US10686455B1 (en) * 2019-08-14 2020-06-16 Teledyne Defense Electronics, Llc Digital high speed acquisition system for phase locked loops

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7242223B1 (en) 2003-03-10 2007-07-10 National Semiconductor Corporation Clock frequency monitor
US7714665B2 (en) * 2006-02-16 2010-05-11 Texas Instruments Incorporated Harmonic characterization and correction of device mismatch
US9071253B2 (en) * 2011-11-09 2015-06-30 Intel Corporation Compensation for digitally controlled oscillator apparatus and method
US9344094B2 (en) * 2013-03-15 2016-05-17 Intel Corporation Temperature compensated PLL calibration
WO2015038166A1 (fr) * 2013-09-16 2015-03-19 Entropic Communications, Inc. Oscillateur commandé numériquement par un mot de commande de fréquence codé par sigma delta à thermomètre
US9337850B2 (en) * 2014-07-30 2016-05-10 Nxp, B.V. All-digital phase-locked loop (ADPLL) with reduced settling time
US9350365B2 (en) * 2014-09-18 2016-05-24 Intel Corporation Digital phase-locked loop supply voltage control
US9300305B1 (en) * 2014-12-02 2016-03-29 Mediatek Inc. Frequency synthesizer and related method for improving power efficiency
EP3096460B1 (fr) * 2015-05-20 2019-11-06 Nxp B.V. Boucle à verrouillage de phase avec détecteur de verrouillage
EP3190704B1 (fr) * 2016-01-06 2018-08-01 Nxp B.V. Boucles numériques à verrouillage de phase
US11070215B2 (en) * 2018-06-13 2021-07-20 Movellus Circuits, Inc. Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization
US11496139B2 (en) * 2018-06-13 2022-11-08 Movellus Circuits, Inc. Frequency measurement circuit with adaptive accuracy
US10594323B2 (en) * 2018-06-13 2020-03-17 Movellus Circuits, Inc. Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization
EP3641135B1 (fr) * 2018-10-17 2022-08-03 NXP USA, Inc. Détecteur de dérive de fréquence, unité de communication et procédé associé
EP3648352A1 (fr) * 2018-10-31 2020-05-06 Stichting IMEC Nederland Générateur de signal
US10819354B2 (en) 2018-11-19 2020-10-27 Silicon Laboratories Inc. Accurate and reliable digital PLL lock indicator
US10826505B1 (en) * 2019-06-24 2020-11-03 Nxp B.V. All digital phase locked loop (ADPLL) with frequency locked loop
EP3855625A1 (fr) * 2020-01-27 2021-07-28 Stichting IMEC Nederland Boucle à verrouillage de phase entièrement numérique et son procédé de fonctionnement
US11218153B1 (en) * 2020-10-29 2022-01-04 Nxp B.V. Configurable built-in self-test for an all digital phase locked loop
US11184013B1 (en) * 2021-02-22 2021-11-23 Infineon Technologies Ag Digital phase-locked loop with a dynamic element matching circuit and a digitally controlled oscillator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004001975A1 (fr) * 2002-06-24 2003-12-31 Koninklijke Philips Electronics N.V. Systeme de syntonisation
US8140040B1 (en) * 2009-09-11 2012-03-20 Qualcomm Atheros, Inc Method and apparatus for a temperature compensated phase locked loop supporting a continuous stream receiver in an integrated circuit
US20150077164A1 (en) * 2013-04-30 2015-03-19 Micrel, Inc. Pll frequency synthesizer with multi-curve vco implementing closed loop curve searching using charge pump current modulation
US10686455B1 (en) * 2019-08-14 2020-06-16 Teledyne Defense Electronics, Llc Digital high speed acquisition system for phase locked loops

Also Published As

Publication number Publication date
US11689206B1 (en) 2023-06-27

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