EP4211805A1

EP4211805A1 - Electronic quadrature quasi-circulator device

Info

Publication number: EP4211805A1
Application number: EP20786530.4A
Authority: EP
Inventors: Doron Ezri; Shimon SHILO; Dror Regev
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2020-10-06
Filing date: 2020-10-06
Publication date: 2023-07-19
Also published as: WO2022073586A1; CN116261830A

Abstract

The present disclosure relates to an electronic quadrature quasi-circulator for wireless communications, in particular for use in MIMO architectures in a HD, FD and/or FDD mode. The quadrature quasi-circulator comprises a first port, a second port, a third port, and a fourth port; a first 90 degree RPS between the first port and the second port; a second 90 degree RPS between the second port and the third port; a third 90 degree NRPS between the third port and the fourth port; and a fourth 90 degree RPS between the fourth port and the first port; wherein the third port and/or the fourth port is isolated from the first port. In particular, a characteristic impedance of the first RPS equals an impedance of the first port, and a characteristic impedance of the second RPS and the fourth RPS equals the characteristic impedance of the first RPS divided by √2.

Description

ELECTRONIC QUADRATURE QUASI-CIRCULATOR DEVICE

TECHNICAL FIELD

The present disclosure relates to a Radio Frequency (RF) front end for wireless communications, in particular to an electronic quadrature quasi-circulator device. Accordingly, the device proposed by this disclosure can be used for multi-input multi-output (MIMO) architectures in a Half Duplex (HD), Full Duplex (FD), and/or Frequency Division Duplex (FDD) mode.

BACKGROUND

In transmit (TX) and receive (RX) antenna wireless communication scenarios, a Low Noise Amplifier (LNA) in the receive path needs to be protected from a transmit signal leakage (TX leakage). In simultaneous transmit receive (STR) antenna wireless communication scenarios, such as FD or FDD without a Diplexer, a Transmit-Receive Self Interference Cancellation (SIC) mechanism is required. Conventional implementations of such SIC mechanisms are implemented at an output of a power amplifier (PA), i.e. between the TX output and the RX input, thus those implementations are also referred to as “post-PA”. Such implementations “load” both the TX and RX channels, and thus create a loss of power efficiency and of signal to noise ratio.

A magnetic and electronic circulator SIC is realized today by coupling a TX signal into a finite impulse response (FIR) filter for shaping post PA, and combining the cancellation signal before a LNA, i.e. pre-LNA. Such a scheme is complex, and particularly not scalable to MIMO, in which both self and mutual interference is present and create TX and RX losses, which degrade power efficiency and RX signal to noise ratio. In MIMO applications, in which mutual interferences between antennas exist, such a SIC scheme cannot cancel the mutual interferences. Mutual interference cancelers (MICs) between the antennas are thus required, but they further increase the losses and complexity, and also pose a limiting scaling barrier to the size of single antenna arrays. Magnetic circulators cannot be integrated on chip, and are bulky and expensive. Thus, the use of magnetic circulators is less attractive in mobile applications. Electronic circulators may be more attractive, however, they face similar TX leakage canceling challenges as the magnetic circulators.

SUMMARY

In view of the above-mentioned challenges, embodiments of the present disclosure aim to provide a new type of device that overcomes the above-mentioned issues. An objective is, in particular, to provide a device that is enabled with an embedded, efficient SIC port that eliminates the need for post-PA/Pre-LNA complex circulator cancellation schemes. One aim is to cancel mutual interferences in MIMO applications. Another aim is to direct RX signal entering the antenna port in a more efficient manner.

The objective is achieved by the embodiments provided in the enclosed independent claims. Advantageous implementations of the embodiments are further defined in the dependent claims.

In particular, embodiments of the invention present an electronic quadrature quasi circulator device as a new type of device.

A first aspect of the disclosure provides the quadrature quasi-circulator device comprising: a first port, a second port, a third port, and a fourth port; a first 90 degree reciprocal phase shifter, RPS, between the first port and the second port; a second 90 degree RPS between the second port and the third port; a third 90 degree non-reciprocal phase shifter, NRPS, between the third port and the fourth port; and a fourth 90 degree RPS between the fourth port and the first port; wherein the third port and/or the fourth port is isolated from the first port, wherein a characteristic impedance of the first RPS is a first value that is equal to an impedance of the first port, and a characteristic impedance of the second RPS and the fourth PRS is a second value, wherein the second value equals the first value divided by V2.

Embodiments of this disclosure accordingly propose to modify a conventional design of a circulator device by adding a fourth port to the same quadrature scheme. In particular, a new dedicated port may be added to a three-port circulator device, to implement the quadrature quasi-circulator device of the first aspect. The new port may be used for injecting a SIC signal, to enable MIMO mutual interferences cancellation, and thus to eliminate the need for mutual complex SIC filters. In particular, the characteristic impedance of the two branches (i.e., the second RPS and the fourth PRS) connecting to the 90 degree NRPS (i.e., the third NPRS) should fulfil a certain condition. By changing the impedances, the RX signal entering the second port can be directed in a more efficient manner. Notably, an impedance of the NRPS can be derived from port impedances of a device. The 90 degree NRPS is “impedance transparent”. Four ports of the quadrature quasi-circulator device may have the same impedance value.

In an implementation form of the first aspect, a phase of a forward signal path from the first port through second port to the third port is 180 degrees, and a phase of a forward signal path from the first port through fourth port to the third port is 0 degree.

Notably, due to the first 90 degree RPS between the first and second ports, and the second 90 degree RPS between the second and third ports, the phase of the forward signal path from the first port through the second port to the third port will be 180 degrees. Similarly, due to the third 90 degree NRPS between the third and the fourth ports, and the fourth 90 degree RPS between the fourth and the first port, the phase of the forward signal path from the first port through the fourth port to the third port is 0 degree. Thus, when a virtual electric ground is set on the third port, the NRPS will “mirror” the virtual electric ground at the third port to the fourth port. In this way, each of the third port and the fourth port can be isolated from the first port.

In an implementation form of the first aspect, the first port is configured to receive a transmit input signal; the second port is configured to output a transmit signal to an antenna, and/or to receive a signal from an antenna; the third port is configured to receive a signal from the second port and/or the fourth port, and to output the received signal to a signal processing section; and the fourth port is configured to receive a cancellation input signal and/or inject a cancellation input signal to the third port.

In this way, there is no need to introduce a complex post PA SIC implementation. According to this disclosure, an extra SIC signal may be received at the fourth port, and may be further injected to the third port for canceling interferences.

In an implementation form of the first aspect, the third port is further configured to receive the cancellation input signal and/or inject the cancellation input signal to the fourth port; and/or the fourth port is further configured to receive a signal from the second port and/or the third port, and to output the received signal to a signal processing section.

Optionally, a “symmetry” may exist between the third port and the fourth port. That is, the third port and the fourth port may have the same functionalities.

In a further implementation form of the first aspect, the cancellation input signal received at the fourth port is used to cancel a leakage signal caused at the third port when the transmit signal is output from the second port, and/or the cancellation input signal received at the third port is used to cancel a leakage signal caused at the fourth port when the transmit signal is output from the second port.

As previously discussed, the SIC signal may be used to cancel interferes/leakages. Since there is a “symmetry” between the third port and the fourth port, the SIC signal may be received at the third port, or at the fourth port. In a specific implementation, both the third port and the fourth port may receive a SIC input.

In a further implementation form of the first aspect, the quadrature quasi-circulator device is further configured to: direct a determined portion of a power of the cancellation input signal from the fourth port, in particular 1/4 of the power of the cancellation input signal, to the third port; and/or direct a determined portion of a power of the cancellation input signal from the third port, in particular 1/4 of the power of the cancellation input signal, to the fourth port.

Optionally, the SIC signal may direct 1/4 of its power to the RX port for TX leakage cancellation. Since both of the third port and the fourth port may serve as RX port or SIC port, respectively, 1/4 of the power of the SIC signal may be direct from the fourth port to the third port, or the other way round.

In a further implementation form of the first aspect, the quadrature quasi-circulator device is further configured to operate in HD mode; and in a TX mode, direct the full power of the transmit input signal received at the first port to the second port.

Optionally, when operating in the HD mode, the TX port transmits all the TX power to the antenna port in TX mode.

In a further implementation form of the first aspect, the quadrature quasi-circulator device is further configured to operate in HD mode; and in a RX mode, direct the full power of the signal from the antenna received at the second port to the third port and the fourth port, wherein the portion of the power is equally divided between a first forward signal from the second port to the third port and a second forward signal from the second port to the fourth port, and wherein a phase of the second forward signal leads a phase of the first forward signal by 90 degrees.

Optionally, when operating in the HD mode, in the RX mode, full signal power received at the antenna is coupled with equal amplitudes and a phase difference of 90 degrees into the third and fourth ports. That means, half of the power is directed to the third port, and another half the power is directed to the fourth port. Notably, the quadrature quasi-circulator device can act as an ideal quadrature power divider for RX signals entering the second port.

In a further implementation form of the first aspect, the quadrature quasi-circulator device is further configured to output signals from the third port and the fourth port as input signals to in-phase (I) and quadrature (Q) signal receive ports.

Notably, the first forward signal (from the second port to the third port) and the second forward signal (from the second port to the fourth port) may have equal amplitudes and a phase difference of 90 degrees. Therefore, these two RX outputs can be utilized as inputs for I & Q channels.

In a further implementation form of the first aspect, the quadrature quasi-circulator device is configured to be applied to a MEMO architecture in HD mode, FD mode or FDD mode, wherein the cancellation input signal is used to cancel all self and mutual leakages.

In a further implementation form of the first aspect, a scattering matrix S of the quadrature quasi-circulator device is represented as: wherein each entry S_xy of the scattering matrix S represents a portion of a square root of a power of a signal that is directed by the quadrature quasi-circulator device from the y^th port to the x^th port, wherein x and y each can be 1, 2, 3, and 4 and x is not equal to y, and each entry S_xx represents a portion of a square root of a power of a signal that is reflected at the x^th port. Notably, a scattering matrix or S-matrix can be used to describe the quadrature quasi-circulator. The quadrature quasi-circulator device proposed in embodiments of this disclosure has a transfer function from the first port to the second port as an ideal circulator. Further, the quadrature quasi-circulator device can also act as an ideal quadrature power divider for RX signals entering the second port.

A second aspect of the disclosure provides a method for operating a quadrature quasi-circulator device with a first port, a second port, a third port, and a fourth port, the method comprising: reciprocal phase shifting a signal transmitted from the first port to the second port by 90 degree; reciprocal phase shifting a signal transmitted from the second port to the third port by 90 degree; non-reciprocal phase shifting a signal transmitted from the third port to the fourth port by 90 degree; reciprocal phase shifting a signal transmitted from the fourth port to the first port by 90 degree; and wherein the third port and/or the fourth port is isolated from the first port, wherein each of a characteristic impedance of a transmission line between the first port and the second port is a first value that is equal to an impedance of the first port (and the other ports), and each of a characteristic impedance of a transmission line between the first port and the fourth port and a characteristic impedance of a transmission line between the second port and the third port is a second value, wherein the second value equals the first value divided by V2.

The method of the second aspect may be developed in implementation forms according to the implementation forms described above for quadrature quasi-circulator device of the first aspect. With the method of the second aspect and its implementation forms, the advantages and effects of the quadrature quasi-circulator device of the first aspect and its respective implementation forms are thus achieved.

A third aspect of the disclosure provides a computer program product comprising a program code for carrying out, when implemented on a processor, the method according to the second aspect, or any implementation form of the second aspect.

It has to be noted that all devices, elements, units and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

BRIEF DESCRIPTION OF DRAWINGS

The above described aspects and implementation forms of the present disclosure will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which

FIG. 1 shows a quadrature quasi-circulator device according to an embodiment of the disclosure.

FIG. 2 shows a previous design of a quadrature quasi-circulator device.

FIG. 3 shows a conventional quadrature power divider.

FIG. 4 shows an ideal equivalent schematic of a quadrature quasi-circulator device according to an embodiment of the disclosure.

FIG. 5 shows a method according to an embodiment of the disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS

Illustrative embodiments of a quadrature quasi-circulator device and corresponding methods for canceling mutual interferences in MIMO applications are described with reference to the figures. Although this description provides a detailed example of possible implementations, it should be noted that the details are intended to be exemplary and in no way limit the scope of the application.

Moreover, an embodiment/example may refer to other embodiments/examples. For example, any description including but not limited to terminology, element, process, explanation and/or technical advantage mentioned in one embodiment/example is applicative to the other embodiments/examples. FIG. 1 shows a quadrature quasi-circulator device 100 according to an embodiment of the disclosure. In particular, the quadrature quasi-circulator device 100 comprises a first port 101, a second port 102, a third port 103, and a fourth port 104. In addition, the quadrature quasi- circulator device 100 further comprises a first 90 degree RPS 105 between the first port 101 and the second port 102; a second 90 degree RPS 106 between the second port 102 and the third port 103; a third 90 degree NRPS 107 between the third port 103 and the fourth port 104; and a fourth 90 degree RPS 108 between the fourth port 104 and the first port 101. According to embodiments of this disclosure, the third port 103 and/or the fourth port 104 is isolated from the first port 101. In particular, a characteristic impedance of the first RPS 105 a first value, and a characteristic impedance of the second RPS 106 and the fourth PRS 108 is a second value, wherein the second value equals the first value divided by V2 (square-root of 2). In particular, the first value, i.e., the characteristic impedance of the first RPS 105, is equal to an impedance (i.e., a port impedance) of the first port 101.

Notably, an impedance of NRPS can be derived from port impedances of a device. The NRPS 107 between the third port 103 and the fourth port 104 is “impedance transparent”. Typically, four ports of the quadrature quasi-circulator device 100 have the same impedance value, for instance, a common value of the impedance is 50 ohm. However, other impedance value may also be used.

Notably, a conventional electronic circulator (for instance in a transceiver) comprises a port 1 : TX port, a port 2: antenna port, and a port 3 : RX port. When selecting the frequency of operation fo close or equal to the local oscillator (LO) frequency tlo, the electronic circuit of the circulator can be visualized as a quadrature circuit of three passive, two port 90 degree RPSs connected to one two port 90 degree NRPS.

As previously discussed, this type of circulator requires post PA SIC implementations, which introduce both TX and RX power losses, and hence degrade power efficiency and RX signal to noise ratio.

FIG. 2 shows a previous design of a quadrature quasi-circulator, in which a port 4, i.e., SIC port, is added into the same quadrature scheme of the conventional electronic circulator. A four- port S-matrix that describe the quadrature quasi-circulator of FIG. 2 is given by: 0 j/3 -2/3 j'2/3 ’

. j ⁰ 0 0

0 j'2/3 —1/3 —j'2/3 ‘

.0 -2/3 j'2/3 -1/3.

The S-matrix or scattering matrix relates the initial state and the final state of a physical system undergoing a scattering process. Here, each entry S_xy of the scattering matrix S represents a portion of a square root of a power of a signal that is directed by the circulator from the y^th port to the x^th port. Each entry S_xx represents a portion of a square root of a power of a signal that is reflected at the x^th port.

The quadrature quasi-circulator shown in FIG. 2 may also be named as a quadrature quasicirculating hybrid (QQCH). An ideal functionality of the QQCH includes a built-in 2/3 voltage (4/9 power) coupling (S₃₄ = —j'2/3) between the SIC port and the RX port. No coupling exists between the SIC and the antenna port, hence the SIC signal will not be transmitted with the TX signal (S₂₄ = 0). RX signals entering the antenna port couple 2/3 of the input voltage (4/9 of the RX power at the antenna) to each of the SIC port and the RX port with a respective phase shift of 90 degrees (S₃₂ = j2 /3, S₄₂ = —2/3). However, 1/9 of the RX signal was directed and wasted at port 1, the TX port (S₁₂ = j/3). The QQCH circuit ideally isolates the SIC port and the RX port from the TX signal (S₃₁ = 0, S₄₁ = 0). Hence, both the port 3 and the port 4 can serve as RX output, SIC input, or simultaneously both.

Notably, a full amplitude coupling between the TX port and the antenna port (S₂₁ = j) is achieved, hence there is no TX signal loss associated with the proposed structure. These two ports are perfectly matched (S₄₁ = 0, S₂₂ = 0), while the RX port and the SIC port are partially matched (S₃₃ = —1/3, S₄₄ = —1/3). Notably, in this design, a characteristic impedance of all branches is Zo. For instance, Zo may be equal to 50 ohm.

FIG. 3 shows a conventional quadrature divider. This quadrature divider includes two branches with a characteristic impedance Zo, and two more branches with a characteristic impedance ZoA/2.

Notably, the quadrature divider ideally divides the input power equally between two of the other three ports, wherein the remaining port is fully isolated. This can be seen from the S-matrix as shown in FIG. 3. Embodiments of this disclosure thus propose to further modify the QQCH as shown in FIG. 2 in a way that it will not lose 1/9 of the RX power to TX port and ideally divide without loss all the signal received at the antenna between ports 3 and 4. Notably, the functionality of the quadrature quasi-circulator device 100 as shown in FIG. 1 may be identical to the previous QQCH, some of the transfer functions are modified and especially SIC signal efficiency is lower than in the previous QQCH as shown in FIG. 2.

This disclosure suggests modifying the characteristic impedance of the two branches connecting to the 90 degree NRPS, i.e., the second RPS 106 and the fourth PRS 108 connecting to the third NRPS 107 as shown in FIG. 1, to ZoA/2 in a similar design to the quadrature divider as shown in FIG. 3. Notably, the characteristic impedance of the first RPS 105 is Zo. By changing the impedances, the proposed modified QQCH as shown in FIG. 4 divides half of the RX power to port 3 and another half to port 4. In this way, no RX signal power is wasted or transferred to the TX port, i.e., the first port 101.

Notably, the fourth port changes the functionality of the conventional electronic circulator. Embodiments of this disclosure enable a quadrature quasi-circulator device with an embedded, efficient SIC port that eliminates the need for post-PA/Pre-LNA complex circulator canceling schemes. Embodiments of this disclosure also allow HD implementations.

It should be noted that, according to embodiments of this disclosure, a phase of a forward signal path from the first port 101 through second port 102 to the third port 103 is 180 degree. Notably, this is resulted by the first 90 degree RPS 105 and the second 90 degree RPS 106. Similarly, a phase of a forward signal path from the first port 101 through fourth port 104 to the third port 103 is 0 degree. Accordingly, this is resulted by the third 90 degree NRPS 107 and the fourth 90 degree RPS 108.

In this way, when a virtual electric ground is assigned to the third port 103 (thus the third port 103 is isolated from the first port 101), the NRPS 107 will “mirror” the virtual electric ground at the third port to the fourth port. Notably, the NRPS 107 between the third port 103 and the fourth port 104 is “impedance transparent”, hence it transfers the virtual ground of the third port 103 to the fourth port 104. That is, the fourth port 104 is also isolated from the first port 101. Optionally, according to an embodiment of the disclosure, the first port 101 may be configured to receive a transmit input signal. The second port 102 may be configured to output a transmit signal to an antenna, and/or to receive a signal from an antenna. The third port 103 may be configured to receive a signal from the second port 102 and/or the fourth port 104, and to output the received signal to a signal processing section. Further, the fourth port 104 may be configured to receive a cancellation input signal and/or inject a cancellation input signal to the third port 103.

Preferably, according to an embodiment of the disclosure, the cancellation input signal received at the fourth port 104 may be used to cancel a leakage signal caused at the third port 103 when the transmit signal is output from the second port 102.

Preferably, according to an embodiment of the disclosure, the quadrature quasi-circulator device 100 may be further configured to direct a determined portion of a power of the cancellation input signal from the fourth port 104 to the third port 103. In particular, in a specific implementation, 1/4 of the power of the cancellation input signal is directed from the fourth port 104 to the third port 103.

It should be noted that there may be a “symmetry” between the third port 103 and the fourth port 104. Therefore, according to an embodiment of the disclosure, the third port 103 may be further configured to receive the cancellation input signal and/or inject the cancellation input signal to the fourth port 104. Optionally, according to an embodiment of the disclosure, the fourth port 104 may be further configured to receive a signal from the second port 102 and/or the third port 103, and to output the received signal to a signal processing section. That is, the third port 103 and the fourth port 104 may have the same functionalities.

Similarly, according to an embodiment of the disclosure, the cancellation input signal received at the third port 103 may be used to cancel a leakage signal caused at the fourth port 104 when the transmit signal is output from the second port 102.

Similarly, according to an embodiment of the disclosure, the quadrature quasi-circulator device 100 may be further configured to direct a determined portion of a power of the cancellation input signal from the third port 103 to the fourth port 104. In particular, in a specific implementation, 1/4 of the power of the cancellation input signal is directed from the third port 103 to the fourth port 104. A four-port S-matrix that describe the quadrature quasi-circulator device 100 of FIG. 1 or FIG. 4 is given by:

Notably, each entry S_xy of the scattering matrix S represents a portion of a square root of a power of a signal that is directed by the quadrature quasi-circulator device 100 from the y^th port to the x^th port. According to this embodiment, x and y each can be 1, 2, 3, and 4, and x is not equal to y. Each entry S_xx represents a portion of a square root of a power of a signal that is reflected at the x^th port.

Notably, a full amplitude coupling between the TX port (i.e., the first port 101) and the antenna port (i.e., the second port 102) (S₂₁ = j) is achieved, hence there is no TX signal loss associated with the proposed structure. According to embodiments of the disclosure, the first port 101 and the second port 102 are perfectly matched (S₄₁ = 0, S₂₂ = 0), while the third port 103 and the fourth port 104 are partially matched (S₃₃ = —1/2, S₄₄ = —1/2).

According to embodiments of the disclosure, the circuit of the quadrature quasi-circulator device 100 may ideally isolate the two RX ports, i.e., the third port 103 and the fourth port 104, from the TX signal (S₃₁ = 0, S₄₁ = 0). That is, the TX signal will be fully transmitted to the antenna port with a 90 degree phase shift. Hence, both the third port 103 and the fourth port 104 can serve as an RX output, a SIC input, or simultaneously as both.

Further, the ideal functionality of the quadrature quasi-circulator device 100 introduces zero transmission of the RX signal into the TX port (S₁₂ = 0). The quadrature quasi-circulator device 100 also achieves an ideal quadrature power splitting for the power entering port 2 between port 3 and 4 similar to the Quadrature Divider (S₃₂ = j/ 2, S₄₂ = — 1/V2). The built- in 1/2 voltage (1/4 power) coupling (S₃₄ = —j/2) between the fourth port 104 and the third port 103 is lower than in the previous QQCH design. Notably, preferably no coupling exists between the SIC port (i.e., the fourth port 104) and the antenna port (i.e., the second port 102), hence the SIC signal will not be transmitted with the TX signal (S₂₄ = 0). That is, this modified device, the quadrature quasi-circulator device 100 as shown in FIG. 1 or FIG. 4, has the transfer function from TX to Antenna as an ideal circulator and ideal quadrature power division for RX signals entering the second port 102 like a quadrature power divider.

Further, the quadrature quasi-circulator device 100 proposed by embodiments of the disclosure can be used either for FD scenarios or HD scenarios.

Optionally, when the quadrature quasi-circulator device 100 operates in the HD mode, in a TX mode, the quadrature quasi-circulator device 100 may be configured to direct the full power of the transmit input signal received at the first port 101 to the second port 102. That is, the TX port transmits all the TX power to the antenna port in TX mode.

Optionally, when the quadrature quasi-circulator device 100 operates in the HD mode, in an RX mode, the quadrature quasi-circulator device 100 may be configured to direct the full power of the signal from the antenna received at the second port 102 to the third port 103 and the fourth port 104. It should be noted that, the portion of the power is equally divided between a first forward signal from the second port 102 to the third port 103 and a second forward signal from the second port 102 to the fourth port 104. In particular, a phase of the second forward signal leads a phase of the first forward signal by 90 degrees.

It is worth mentioning that, since the power is equally divided between the first forward signal and the second forward signals, these two signals have the same power. Further, there is a 90 degree phase difference between the second forward signal and the first forward signal. Therefore, these two output signals from the third port 103 and the fourth port 104 can be utilized as inputs for I & Q channels.

Accordingly, in an embodiment of this disclosure, the quadrature quasi-circulator device 100 may be further configured to output signals from the third port 103 and the fourth port 104 as input signals to I & Q signal receive ports.

Notably, the quadrature quasi-circulator device 100 can be used for MIMO architectures in HD, FDD, and FD modes as well. For MIMO applications there may be multiple chains of quadrature quasi-circulator device 100. According to embodiments of this disclosure, in FDD and FD modes, no RF coupling between different antenna chains is required for canceling mutual TX leakages, as all SIC functionality can be lumped into the SIC port (i.e., the fourth port 104) of a respective quadrature quasi-circulator device 100 in each chain. That is, the cancellation input signal received by the fourth port 104 of each quadrature quasi-circulator device 100 can be used to cancel all self and mutual leakages.

FIG. 5 shows a method 500 according to an embodiment of the disclosure. In a specific implementation, the method 500 is for operating a quadrature quasi-circulator device 100 as shown in FIG. 1 or FIG. 4, in particular, for operating a quadrature quasi-circulator device 100 with a first port 101, a second port 102, a third port 103, and a fourth port 104. The method 400 comprises a step 401 of reciprocal phase shifting a signal transmitted from the first port 101 to the second port 102 by 90 degree; a step 402 of reciprocal phase shifting a signal transmitted from the second port 102 to the third port 103 by 90 degree; a step 403 of non-reciprocal phase shifting a signal transmitted from the third port 103 to the fourth port 104 by 90 degree; and a step 404 of reciprocal phase shifting a signal transmitted from the fourth port 104 to the first port 101 by 90 degree. Further, the third port 103 and/or the fourth port 104 is isolated from the first port 101. In particular, a characteristic impedance of a transmission line between the first port 101 and the second port 102 is a first value that is equal to an impedance of the first port 101, and each of a characteristic impedance of a transmission line between the first port 101 and the fourth port 104 and a characteristic impedance of a transmission line between the second port 102 and the third port 103 is a second value, wherein the second value equals the first value divided by V2.

It should be noted that, according to embodiments of this disclosure, a phase of a forward signal path from the first port 101 through second port 102 to the third port 103 is 180 degrees. A phase of a forward signal path from the first port 101 through fourth port 104 to the third port 103 is 0 degree.

In summary, embodiments of the present disclosure achieve multiple benefits. Advantages include:

• No power loss for signals entering the second port 102. The whole signal power may be divided between the third port 103 and the fourth port 104.

• An enabled built-in SIC port can efficiently couple a wide-band canceling signal into the RX channel.

• The added SIC functionality can be from the fourth port 104 to the third port 103 or from the third port 103 to the fourth port 104 or both.

• The added SIC port enables also MIC. Output signals from the third port 103 and the fourth port 104 enable different IQ RX implementations.

The present disclosure has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed disclosure, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word “comprising” does not exclude other elements or steps and the indefinite article “a” or “an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Furthermore, any method according to embodiments of the disclosure may be implemented in a computer program, having code means, which when run by processing means causes the processing means to execute the steps of the method. The computer program is included in a computer readable medium of a computer program product. The computer readable medium may comprise essentially any memory, such as a ROM (Read-Only Memory), a PROM (Programmable Read-Only Memory), an EPROM (Erasable PROM), a Flash memory, an EEPROM (Electrically Erasable PROM), or a hard disk drive.

Moreover, it is realized by the skilled person that embodiments of the quadrature quasicirculator device 100, comprises the necessary communication capabilities in the form of e.g., functions, means, units, elements, etc., for performing the solution. Examples of other such means, units, elements and functions are: processors, memory, buffers, control logic, encoders, decoders, rate matchers, de-rate matchers, mapping units, multipliers, decision units, selecting units, switches, interleavers, de-interleavers, modulators, demodulators, inputs, outputs, antennas, amplifiers, receiver units, transmitter units, DSPs, trellis-coded modulation (TCM) encoder, TCM decoder, power supply units, power feeders, communication interfaces, communication protocols, etc. which are suitably arranged together for performing the solution.

Especially, the processor(s) of the quadrature quasi-circulator device 100 may comprise, e.g., one or more instances of a Central Processing Unit (CPU), a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC), a microprocessor, or other processing logic that may interpret and execute instructions. The expression “processor” may thus represent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones mentioned above. The processing circuitry may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions, such as call processing control, user interface control, or the like.

Claims

1. A quadrature quasi-circulator device (100) comprising: a first port (101), a second port (102), a third port (103), and a fourth port (104); a first 90 degree reciprocal phase shifter, RPS (105), between the first port (101) and the second port (102); a second 90 degree RPS (106) between the second port (102) and the third port (103); a third 90 degree non-reciprocal phase shifter, NRPS (107), between the third port (103) and the fourth port (104); and a fourth 90 degree RPS (108) between the fourth port (104) and the first port (101); wherein the third port (103) and/or the fourth port (104) is isolated from the first port (101), wherein a characteristic impedance of the first RPS (105) is a first value that is equal to an impedance of the first port (101), and a characteristic impedance of the second RPS (106) and the fourth PRS (108) is a second value, wherein the second value equals the first value divided by V2.

2. The quadrature quasi-circulator device (100) according to claim 1, wherein a phase of a forward signal path from the first port (101) through second port (102) to the third port (103) is 180 degree, and a phase of a forward signal path from the first port (101) through fourth port (104) to the third port (103) is 0 degree.

3. The quadrature quasi-circulator device (100) according to claim 1 or 2, wherein the third NRPS (107) is impedance transparent.

4. The quadrature quasi-circulator device (100) according to one of the claims 1 to 3, wherein the first port (101) is configured to receive a transmit input signal; the second port (102) is configured to output a transmit signal to an antenna, and/or to receive a signal from an antenna; the third port (103) is configured to receive a signal from the second port (102) and/or the fourth port (104), and to output the received signal to a signal processing section; and the fourth port (104) is configured to receive a cancellation input signal and/or inject a cancellation input signal to the third port (103).

5. The quadrature quasi-circulator device (100) according to claim 4, wherein the third port (103) is further configured to receive the cancellation input signal and/or inject the cancellation input signal to the fourth port (104); and/or the fourth port (104) is further configured to receive a signal from the second port (102) and/or the third port (103), and to output the received signal to a signal processing section.

6. The quadrature quasi-circulator device (100) according to claim 4 or 5, wherein the cancellation input signal received at the fourth port (104) is used to cancel a leakage signal caused at the third port (103) when the transmit signal is output from the second port (102), and/or the cancellation input signal received at the third port (103) is used to cancel a leakage signal caused at the fourth port (104) when the transmit signal is output from the second port (102).

7. The quadrature quasi-circulator device (100) according to claim 6, further configured to: direct a determined portion of a power of the cancellation input signal from the fourth port (104), in particular 1/4 of the power of the cancellation input signal, to the third port (103); and/or direct a determined portion of a power of the cancellation input signal from the third port (103), in particular 1/4 of the power of the cancellation input signal, to the fourth port (104).

8. The quadrature quasi-circulator device (100) according to one of the claims 1 to 7, further configured to: operate in half-duplex mode; and in a transmit mode, direct the full power of the transmit input signal received at the first port (101) to the second port (102).

9. The quadrature quasi-circulator device (100) according to one of the claims 1 to 8, further configured to: operate in half-duplex mode; and in a receive mode, direct the full power of the signal from the antenna received at the second port (102) to the third port (103) and the fourth port (104), wherein the portion of the power is equally divided between a first forward signal from the second port (102) to the third port (103) and a second forward signal from the second port (102) to the fourth port (104), and wherein a phase of the second forward signal leads a phase of the first forward signal by 90 degrees.

10. The quadrature quasi-circulator device (100) according to claim 9, further configured to: output signals from the third port (103) and the fourth port (104) as input signals to in- phase and quadrature signal receive ports.

11. The quadrature quasi-circulator device (100) according to one of the claims 1 to 10, wherein the quadrature quasi-circulator device (100) is configured to be applied to a multipleinput and multiple-output, MIMO, architecture in half-duplex mode, full-duplex mode or frequency-division duplex mode, wherein the cancellation input signal is used to cancel all self and mutual leakages.

12. The quadrature quasi-circulator device (100) according to one of the claims 1 to 11, wherein a scattering matrix S of the quadrature quasi-circulator device (100) is represented as: wherein each entry S_xy of the scattering matrix S represents a portion of a square root of a power of a signal that is directed by the quadrature quasi-circulator device from the yth port to the xth port, wherein x and y each can be 1, 2, 3, and 4 and x is not equal to y, and each entry S_xx represents a portion of a square root of a power of a signal that is reflected at the xth port.

13. A method for operating a quadrature quasi-circulator device (100) with a first port (101), a second port (102), a third port (103), and a fourth port (104), the method comprising: reciprocal phase shifting a signal transmitted from the first port (101) to the second port (102) by 90 degree;

19 reciprocal phase shifting a signal transmitted from the second port (102) to the third port (103) by 90 degree; non-reciprocal phase shifting a signal transmitted from the third port (103) to the fourth port (104) by 90 degree; reciprocal phase shifting a signal transmitted from the fourth port (104) to the first port

(101) by 90 degree; and wherein the third port (103) and/or the fourth port (104) is isolated from the first port (101), wherein each of a characteristic impedance of a transmission line between the first port (101) and the second port (102) is a first value that is equal to an impedance of the first port

(101), and each of a characteristic impedance of a transmission line between the first port (101) and the fourth port (104) and a characteristic impedance of a transmission line between the second port (102) and the third port (103) is a second value, wherein the second value equals the first value divided by V2.

14. A computer program product comprising a program code for carrying out, when implemented on a processor, the method according to claim 13.

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