EP4208940A1 - Procédé destiné à autoévaluer une phase d'un convertisseur anpc à 3 niveaux à filtre lc - Google Patents

Procédé destiné à autoévaluer une phase d'un convertisseur anpc à 3 niveaux à filtre lc

Info

Publication number
EP4208940A1
EP4208940A1 EP21769978.4A EP21769978A EP4208940A1 EP 4208940 A1 EP4208940 A1 EP 4208940A1 EP 21769978 A EP21769978 A EP 21769978A EP 4208940 A1 EP4208940 A1 EP 4208940A1
Authority
EP
European Patent Office
Prior art keywords
switch
bridge
inverter
filter
clocking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21769978.4A
Other languages
German (de)
English (en)
Inventor
Uwe Stickelmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SMA Solar Technology AG
Original Assignee
SMA Solar Technology AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SMA Solar Technology AG filed Critical SMA Solar Technology AG
Publication of EP4208940A1 publication Critical patent/EP4208940A1/fr
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40—Testing power supplies
    • G01R31/42—AC power supplies
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H02M1/126—Arrangements for reducing harmonics from ac input or output using passive filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters

Definitions

  • the invention relates to a method for testing an inverter.
  • the application also relates to an inverter that is set up to carry out the test method.
  • Inverters are used, among other things, to convert power generated as direct current by a solar generator into alternating current power in order to feed this into an alternating current network.
  • an inverter has one or more bridges, which in turn include a number of semiconductor switches. By pulsing the switches, the potentials present at the DC connections are applied alternately to a bridge output.
  • the bridge output is connected to a phase of the AC voltage network via a line filter.
  • There are different topologies for the bridges with a choice between single-level topologies, which only alternatively apply the positive potential or the negative potential at the bridge output, and multi-level topologies, which apply further intermediate potentials, usually generated by divided intermediate circuits, at the bridge output.
  • ANPC Active Neutral Point Clamped
  • the ANPC topology is a particularly efficient bridge topology.
  • the object of this invention is therefore to provide a method with which, before the inverter is put into operation, it can be checked whether a bridge switch has failed, without endangering other bridge switches or other inverter components.
  • This object is solved by a method having the features of claim 1 and by an inverter having the features of claim 11. Preferred embodiments of the invention are described in the dependent claims.
  • the method according to the invention is based on an inverter in which a bridge has a first switch arranged between a positive connection of a divided intermediate circuit with a center point and a positive inner connection, a second switch arranged between the positive inner connection and a bridge output, and a third switch between the Bridge output and a negative inner terminal arranged switch and a fourth, arranged between the negative inner terminal and a negative terminal of the divided intermediate circuit switch. Furthermore, the bridge has a fifth switch arranged between the midpoint and the positive inner connection and a sixth switch arranged between the midpoint and the negative inner connection, with a mains filter having a filter inductor and a filter capacitor being connected to the bridge output. One connection of the filter capacitor can be connected to the center point of the intermediate circuit.
  • a method according to the invention comprises the steps:
  • the number of short pulses causes the filter capacitor to be charged to a voltage which is a fraction of the intermediate circuit voltage which is determined by the duty cycle of the short pulses.
  • the type of clocking ensures that even if a switch is defective, the full intermediate circuit voltage is not present across any of the other switches, at least for such a long period of time that this leads to the affected switch being destroyed. This allows the test to be carried out without consequential damage to the bridge.
  • the sixth switch is permanently blocked due to a defect, which means that when it is opened of the second switch, the entire intermediate circuit voltage drops across the second switch, this period of time is so short due to the low duty cycle that the second switch is still protected. If one of the bridge switches is defective so that the filter capacitor is not charged or is charged in a modified form due to the defect, this can then be determined on the basis of the voltage reached at the filter capacitor. In this case, an error condition is detected and the inverter reacts accordingly, for example by preventing commissioning or selecting a type of control of the bridge switch that is permissible despite the error detected and does not endanger other components.
  • the inverter usually already has the means for determining the voltage at the filter capacitor as part of its regulation.
  • the method is preferably supplemented by the following steps:
  • the clocking of the second switch is carried out with complementary clocking of the third switch or the clocking of the third switch with complementary clocking of the second switch.
  • the third switch can also remain open while the second switch is being clocked, or the second switch can remain open while the third switch is being clocked.
  • the clocking of the second or third switch can be carried out with a predetermined number of short pulses.
  • the test method according to the invention before the second switch is clocked, it is checked whether the potentials at the negative inner connection and at the midpoint match, or before the third switch is clocked, it is checked whether the potentials at the positive inner connection and at the midpoint match, in each case if Match a fault condition of the bridge is detected. If the inverter has a number of bridges, the method according to the invention is preferably carried out in succession on each of the bridges in order to rule out a fault condition. Proper operation of the inverter is only released if all bridges with their switches work correctly.
  • the discharging of the filter capacitor which has one terminal connected to the midpoint of the intermediate circuit, can be effected by closing the fifth and second switch simultaneously or by closing the sixth and third switch.
  • the filter capacitor one of which is connected to the center point of the intermediate circuit, can also be discharged by simultaneously closing the fifth and sixth switches.
  • the invention relates to an inverter with a bridge, a first switch arranged between a positive connection of a divided intermediate circuit with center point and a positive inner connection, a second switch arranged between the positive inner connection and a bridge output, a third , switches arranged between the bridge output and a negative inner terminal, a fourth switch arranged between the negative inner terminal and a negative terminal of the divided intermediate circuit, a fifth switch arranged between the midpoint and the positive inner terminal, and a sixth switch arranged between the Center point and the negative inner terminal arranged switches, wherein a mains filter with a filter inductor and a filter capacitor is connected to the bridge output.
  • the inverter has a controller that is designed and set up to carry out the method described above and to connect the inverter to a connected grid only if no error state is detected.
  • the inverter can have a plurality of bridges.
  • the controller is designed and set up to execute the method for each of the plurality of bridges in succession and to connect the inverter to the grid only if no fault condition is detected.
  • 2 shows a second switch configuration of the bridge for complementarily clocked charging of the filter capacitor
  • 3 shows an illustration of a clock scheme for charging the filter capacitor in a complementary clocked manner
  • FIG. 6 shows a flow chart of the method according to the invention.
  • Figure 1 shows a switch configuration of an ANPC bridge used to discharge a filter capacitor CF at the output of the bridge.
  • the ANPC bridge is connected on the input side to a split intermediate circuit, which has a first intermediate circuit capacitor C1 connected to the positive terminal DC+ and a second intermediate circuit capacitor C2 connected to the negative terminal DC-, which are connected to one another in series via a midpoint M.
  • the first switch T1 and the fourth switch T4 are designed as IGBT transistors, while the second switch T2 and the third switch T3 are designed as MOSFET transistors.
  • the midpoint M is connected to a positive inner terminal PI between the first switch T1 and the second switch T2 via a fifth switch T5. Furthermore, the middle point M is connected via a sixth switch T6 to a negative inner connection NI between the third switch T3 and the fourth switch T4.
  • Switch T5 and the sixth switch T6 are also designed as IGBT transistors.
  • An output filter with a filter inductor LF and a filter capacitor CF is connected to the bridge output BR arranged between the second switch T2 and the third switch T3 in order to provide a filtered output voltage at the AC voltage output AC.
  • the filter capacitor CF To discharge the filter capacitor CF, the third transistor T3 and the sixth transistor T6 are turned on, while all other transistors of the bridge are turned off. As a result, the filter capacitor CF is short-circuited via the filter inductor LF. As an alternative to the third switch T3 and sixth switch T6, the filter capacitor CF can also be discharged via the second switch T2 and the fifth switch T5 or via the fifth switch T5 and the sixth switch T6. complete Discharging, ie to a voltage of zero, also includes discharging down to a negligible residual voltage that may still be present.
  • FIG. 2 shows a second switch configuration of the bridge for complementary clocked charging of the filter capacitor CF to a test voltage.
  • the first switch T1 and the sixth switch T6 are turned on, while the fifth switch T5 and the fourth switch T4 are turned off.
  • the second switch T2 is now clocked at high frequency with short pulses whose duty cycle is between 1% and 5%.
  • the third switch T3 is clocked complementary to the second switch T2. In this way, the filter capacitor CF is charged via the first intermediate circuit capacitor C1 and the filter inductor LF during the conducting phase of the second switch T2, and is partially discharged again during the conducting phase of the third switch T3.
  • the clock scheme of the described complementary clocking of the bridge is illustrated in more detail in FIG.
  • the switching state of the first switch T1, including the switching state of the second switch T2, including the switching state of the third switch T3 and including the switching state of the sixth switch T6 is shown as a function of time t as the abscissa in the top partial diagram.
  • the numerical value of the ordinate is 0 for a blocking switch state and 1 for a conducting switch state.
  • the curve of the voltage U across the filter capacitor CF over time is plotted in the bottom partial diagram of FIG.
  • the charging phase LP follows with the clocking of the second switch T2 with short pulses and complementary clocking of the third switch T3.
  • the voltage U asymptotically approaches a final value, which is compared in the subsequent test phase PP against a permissible voltage window with upper and lower window limits in order to verify the error-free function of the switches.
  • the alternative switch configuration shown in FIG. 4 differs from the switch configuration for charging the filter capacitor CF, shown in FIG. This prevents the filter capacitor CF from discharging between the short pulses of the second switch T2, so that the current through the filter inductor LF during this time only decreases via the freewheeling path formed by the third switch T3, the sixth switch T6 and the filter capacitor CF.
  • the voltage across the filter capacitor builds up step by step with each short pulse, so that in a test method for the bridge switches in this switch configuration, the charging phase for the filter capacitor CF is ended after a specified number of short pulses or after a specified charging time, before the voltage of the filter capacitor CF is determined to check the bridge switch state.
  • the alternative switch configuration shown in FIG. 5 differs from the switch configuration shown in FIG. 2 for charging the filter capacitor CF in that in this case the filter capacitor CF is charged with reversed polarity via the second intermediate circuit capacitor C2.
  • This switch configuration can be used as an alternative or preferably in addition to the switch configuration shown in FIG. 2 as part of the test method, since other switches of the bridge can be tested with regard to their functionality.
  • the fourth switch T4 and the fifth switch T5 are turned on, while the sixth switch T6 and the first switch T1 are turned off.
  • the third switch T3 is now clocked at high frequency with short pulses whose duty cycle is between 1% and 5%.
  • the second switch T2 is clocked complementarily to the third switch T3. It is of course also conceivable here to modify the switch configuration, as described above, in that the second switch T2 is not clocked in a complementary manner, but instead is switched to the blocking state.
  • FIG. 6 shows a flowchart for a method according to the invention for testing an inverter with a bridge.
  • a first step S1 an intermediate circuit voltage is applied to the divided intermediate circuit of the inverter, for example by connecting a DC source to the DC voltage terminals DC+, DC- of the inverter.
  • the bridge output with the connected mains filter is still isolated from an AC voltage mains.
  • the filter capacitor of the line filter is completely discharged. Discharging is effected by operating the bridge in a switch configuration in which a conductive path is formed from the midpoint of the shared link to the bridge output BR.
  • the order in which the first step S1 and the second step S2 are carried out is arbitrary.
  • a third subsequent step S3 the first switch T1 and the sixth switch T6 are closed, while the fourth switch T4 and the fifth switch T5 are open.
  • the second switch T2 is then clocked with a plurality of short pulses, the duty cycle of the short pulses being specified between 1% and 5%.
  • a voltage drop across the filter capacitor is determined after the clocking, with a fault condition of the bridge being determined if the dropping voltage is outside a voltage window with an upper window limit and a lower window limit.
  • the method can be carried out for each of the bridges in succession.
  • the method can be supplemented by further test routines for further error patterns in the bridge or other components of the inverter.
  • the method can also be carried out several times to verify a fault condition that has been determined.
  • a fault condition in a bridge is determined by the method, it can be reacted to in different ways.
  • the inverter can be prevented from being connected to the AC voltage grid, the inverter can be operated with the affected bridge deactivated, or a control can be selected for the affected bridge in which it can be operated with restrictions.
  • the error status can still be communicated to a higher-level control authority.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Inverter Devices (AREA)

Abstract

L'invention concerne un procédé destiné à évaluer un onduleur ayant un pont comprenant un premier commutateur (T1) agencé entre une connexion positive (DC+) d'un circuit de liaison divisé, ayant un point central (M), et une connexion positive intérieure (PI), un deuxième commutateur (T2) agencé entre la connexion positive intérieure (PI) et une sortie de pont (BR), un troisième commutateur (T3) agencé entre la sortie de pont (BR) et une connexion négative intérieure (NI), un quatrième commutateur (T4) agencé entre la connexion négative intérieure (NI) et une connexion négative (DC−) du circuit de liaison divisé, un cinquième commutateur (T5) agencé entre le point central (M) et la connexion positive intérieure (PI), et un sixième commutateur (T6) agencé entre le point central (M) et la connexion négative intérieure (NI). Un filtre de réseau électrique ayant une inductance de filtre (LF) et un condensateur de filtre (CF) est connecté à la sortie de pont (BR). Le procédé consiste à appliquer une tension de circuit de liaison au circuit de liaison divisé, tandis que la sortie de pont (BR) est isolée d'un réseau électrique connecté en utilisant le filtre de réseau électrique connecté, à décharger complètement le condensateur de filtre (CF), à fermer le premier commutateur (T1) et le sixième commutateur (T6), tandis que le quatrième commutateur (T4) et le cinquième commutateur (T5) sont ouverts, à synchroniser ensuite le deuxième commutateur (T2) en utilisant une pluralité d'impulsions courtes, tel que le cycle de service des impulsions courtes est préétabli entre 1 % et 5 %, à déterminer après la synchronisation une chute de tension à travers le condensateur de filtre (CF) et à identifier un défaut d'un état du pont lorsque la chute de tension ne correspond pas à une fenêtre de tension dotée d'une limite supérieure de fenêtre et d'une limite inférieure de fenêtre. L'invention concerne également un onduleur, lequel a un système de contrôle conçu et réglé pour exécuter le procédé en fonction d'une des revendications précédentes et pour ne connecter l'onduleur à un réseau électrique connecté que si un défaut d'un état n'est pas identifié.
EP21769978.4A 2020-09-01 2021-08-31 Procédé destiné à autoévaluer une phase d'un convertisseur anpc à 3 niveaux à filtre lc Pending EP4208940A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102020122770.1A DE102020122770B4 (de) 2020-09-01 2020-09-01 Verfahren zum testen eines wechselrichters
PCT/EP2021/073996 WO2022049062A1 (fr) 2020-09-01 2021-08-31 Procédé destiné à autoévaluer une phase d'un convertisseur anpc à 3 niveaux à filtre lc

Publications (1)

Publication Number Publication Date
EP4208940A1 true EP4208940A1 (fr) 2023-07-12

Family

ID=77750284

Family Applications (1)

Application Number Title Priority Date Filing Date
EP21769978.4A Pending EP4208940A1 (fr) 2020-09-01 2021-08-31 Procédé destiné à autoévaluer une phase d'un convertisseur anpc à 3 niveaux à filtre lc

Country Status (6)

Country Link
US (1) US20230194626A1 (fr)
EP (1) EP4208940A1 (fr)
JP (1) JP2023539283A (fr)
CN (1) CN116057823A (fr)
DE (1) DE102020122770B4 (fr)
WO (1) WO2022049062A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114665735B (zh) * 2022-05-26 2022-08-12 浙江日风电气股份有限公司 Anpc三电平逆变拓扑电路、控制方法及控制装置
CN114826001B (zh) * 2022-06-27 2022-09-09 浙江日风电气股份有限公司 一种anpc型逆变器的控制方法及相关组件

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101131030B1 (ko) * 2004-06-18 2012-03-29 에이비비 슈바이쯔 아게 3 개의 전압 레벨을 배선하는 컨버터 회로에서 에러를처리하는 방법
CN103983891B (zh) * 2014-05-30 2018-10-09 台达电子企业管理（上海）有限公司 逆变器电路的短路故障检测装置及方法
CN103986310B (zh) * 2014-05-30 2017-07-14 台达电子企业管理（上海）有限公司 变流器电路及其开路检测方法
CN106169884B (zh) * 2016-06-30 2019-02-01 阳光电源股份有限公司 五电平有源中点钳位型逆变器的预充电控制方法及装置
WO2018193001A1 (fr) * 2017-04-20 2018-10-25 Abb Schweiz Ag Détection d'événement de court-circuit dans un convertisseur électrique
DE102019104145A1 (de) 2019-02-19 2020-08-20 Sma Solar Technology Ag Verfahren zum Ausschalten von Leistungshalbleiterschaltern einer Brückenschaltung, Brückenschaltung und Wechselrichter umfassend eine Brückenschaltung
CN110133538B (zh) * 2019-05-16 2021-03-12 合肥工业大学 一种anpc三电平逆变器开路故障诊断方法及实验平台
CN110187204B (zh) 2019-05-17 2020-06-02 同济大学 一种中性点钳位式多电平变流器直流电容器状态检测方法

Also Published As

Publication number Publication date
DE102020122770A1 (de) 2022-03-03
DE102020122770B4 (de) 2023-08-17
WO2022049062A1 (fr) 2022-03-10
US20230194626A1 (en) 2023-06-22
CN116057823A (zh) 2023-05-02
JP2023539283A (ja) 2023-09-13

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