EP4133483A4 - Vorrichtungen und verfahren für unterschiedliche burstlängen für gestapelte chips - Google Patents

Vorrichtungen und verfahren für unterschiedliche burstlängen für gestapelte chips Download PDF

Info

Publication number
EP4133483A4
EP4133483A4 EP21783957.0A EP21783957A EP4133483A4 EP 4133483 A4 EP4133483 A4 EP 4133483A4 EP 21783957 A EP21783957 A EP 21783957A EP 4133483 A4 EP4133483 A4 EP 4133483A4
Authority
EP
European Patent Office
Prior art keywords
apparatuses
methods
stacked die
burst lengths
different burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP21783957.0A
Other languages
English (en)
French (fr)
Other versions
EP4133483A1 (de
Inventor
Scott Eugene Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP4133483A1 publication Critical patent/EP4133483A1/de
Publication of EP4133483A4 publication Critical patent/EP4133483A4/de
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
EP21783957.0A 2020-04-07 2021-03-29 Vorrichtungen und verfahren für unterschiedliche burstlängen für gestapelte chips Pending EP4133483A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202063006195P 2020-04-07 2020-04-07
PCT/US2021/024686 WO2021206944A1 (en) 2020-04-07 2021-03-29 Apparatuses and methods for different burst lengths for stacked die

Publications (2)

Publication Number Publication Date
EP4133483A1 EP4133483A1 (de) 2023-02-15
EP4133483A4 true EP4133483A4 (de) 2024-04-24

Family

ID=77921071

Family Applications (1)

Application Number Title Priority Date Filing Date
EP21783957.0A Pending EP4133483A4 (de) 2020-04-07 2021-03-29 Vorrichtungen und verfahren für unterschiedliche burstlängen für gestapelte chips

Country Status (5)

Country Link
US (1) US11556248B2 (de)
EP (1) EP4133483A4 (de)
KR (1) KR20220158827A (de)
CN (1) CN115485772A (de)
WO (1) WO2021206944A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11545189B2 (en) * 2020-04-07 2023-01-03 Micron Technology, Inc. Apparatuses and methods for different IO widths for stacked die
US20230420017A1 (en) * 2022-06-23 2023-12-28 Microsoft Technology Licensing, Llc Computer memory arrays employing memory banks and integrated serializer/de-serializer circuits for supporting serialization/de-serialization of read/write data in burst read/write modes, and related methods

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018044391A1 (en) * 2016-09-02 2018-03-08 Rambus Inc. Memory component with input/output data rate alignment

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7562271B2 (en) 2005-09-26 2009-07-14 Rambus Inc. Memory system topologies including a buffer device and an integrated circuit memory device
US9230609B2 (en) 2012-06-05 2016-01-05 Rambus Inc. Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
US9009400B2 (en) * 2012-10-16 2015-04-14 Rambus Inc. Semiconductor memory systems with on-die data buffering
US10621040B2 (en) 2012-11-30 2020-04-14 Hewlett Packard Enterprise Development Lp Memory controllers to form symbols based on bursts
KR20150096220A (ko) 2014-02-14 2015-08-24 삼성전자주식회사 스토리지 장치 및 스토리지 장치의 동작 방법
US10490238B2 (en) * 2017-06-29 2019-11-26 SK Hynix Inc. Serializer and memory device including the same
KR20190105346A (ko) 2018-03-05 2019-09-17 삼성전자주식회사 메모리 패키지 및 메모리 장치
KR102570454B1 (ko) * 2018-04-06 2023-08-25 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그의 동작 방법
US10509752B2 (en) * 2018-04-27 2019-12-17 Advanced Micro Devices, Inc. Configuration of multi-die modules with through-silicon vias
US11157206B2 (en) * 2019-07-01 2021-10-26 Realtek Singapore Private Limited Multi-die system capable of sharing non-volatile memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018044391A1 (en) * 2016-09-02 2018-03-08 Rambus Inc. Memory component with input/output data rate alignment

Also Published As

Publication number Publication date
CN115485772A (zh) 2022-12-16
WO2021206944A1 (en) 2021-10-14
US20210311627A1 (en) 2021-10-07
US11556248B2 (en) 2023-01-17
KR20220158827A (ko) 2022-12-01
EP4133483A1 (de) 2023-02-15

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Ipc: G11C 5/02 20060101ALI20240321BHEP

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