EP4078588A4 - Signalisation à multiples usages pour un système de mémoire - Google Patents
Signalisation à multiples usages pour un système de mémoire Download PDFInfo
- Publication number
- EP4078588A4 EP4078588A4 EP20903289.5A EP20903289A EP4078588A4 EP 4078588 A4 EP4078588 A4 EP 4078588A4 EP 20903289 A EP20903289 A EP 20903289A EP 4078588 A4 EP4078588 A4 EP 4078588A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory system
- purpose signaling
- signaling
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0626—Reducing size or complexity of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0625—Power saving in storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0634—Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0674—Disk device
- G06F3/0676—Magnetic disk device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Security & Cryptography (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Databases & Information Systems (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201962951798P | 2019-12-20 | 2019-12-20 | |
US16/951,700 US11392299B2 (en) | 2019-12-20 | 2020-11-18 | Multi-purpose signaling for a memory system |
PCT/US2020/064062 WO2021126634A1 (fr) | 2019-12-20 | 2020-12-09 | Signalisation à multiples usages pour un système de mémoire |
Publications (2)
Publication Number | Publication Date |
---|---|
EP4078588A1 EP4078588A1 (fr) | 2022-10-26 |
EP4078588A4 true EP4078588A4 (fr) | 2023-01-25 |
Family
ID=76438060
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP20903289.5A Withdrawn EP4078588A4 (fr) | 2019-12-20 | 2020-12-09 | Signalisation à multiples usages pour un système de mémoire |
Country Status (5)
Country | Link |
---|---|
US (2) | US11392299B2 (fr) |
EP (1) | EP4078588A4 (fr) |
KR (1) | KR20220110579A (fr) |
CN (1) | CN114846550A (fr) |
WO (1) | WO2021126634A1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220140234A (ko) * | 2021-04-09 | 2022-10-18 | 삼성전자주식회사 | 멀티 레벨 신호 시스템에서 최적 전이 코드를 생성하기 위한 신호 처리 방법 및 반도체 장치 |
US20230041983A1 (en) * | 2021-08-04 | 2023-02-09 | Micron Technology, Inc. | Interface for refreshing non-volatile memory |
US11605416B1 (en) * | 2021-11-10 | 2023-03-14 | Micron Technology, Inc. | Reducing duty cycle degradation for a signal path |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4387423A (en) * | 1979-02-16 | 1983-06-07 | Honeywell Information Systems Inc. | Microprogrammed system having single microstep apparatus |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5668982A (en) * | 1995-11-30 | 1997-09-16 | National Semiconductor Corporation | System and method for using a half-clock module to implement computer timing control circuitry |
GB0123422D0 (en) * | 2001-09-28 | 2001-11-21 | Memquest Ltd | Improved memory controller |
US20070038850A1 (en) * | 2005-08-10 | 2007-02-15 | Matthews Jeanna N | System boot and resume time reduction method |
US7694031B2 (en) * | 2006-10-31 | 2010-04-06 | Globalfoundries Inc. | Memory controller including a dual-mode memory interconnect |
KR100936149B1 (ko) | 2006-12-29 | 2010-01-12 | 삼성전자주식회사 | 복수의 비휘발성 메모리를 갖는 메모리 시스템 그것의 메모리 억세스 방법 |
US7843989B2 (en) * | 2007-06-26 | 2010-11-30 | Sharp Laboratories Of America, Inc. | Systems and methods for embedding a first signal in the coding of a second signal |
US8489837B1 (en) * | 2009-06-12 | 2013-07-16 | Netlist, Inc. | Systems and methods for handshaking with a memory module |
KR101854251B1 (ko) | 2010-11-30 | 2018-05-03 | 삼성전자주식회사 | 멀티 채널 반도체 메모리 장치 및 그를 구비하는 반도체 장치 |
US9417687B2 (en) * | 2011-07-12 | 2016-08-16 | Rambus Inc. | Dynamically changing data access bandwidth by selectively enabling and disabling data links |
US9202551B2 (en) | 2012-06-28 | 2015-12-01 | Intel Corporation | Flexible command addressing for memory |
AR099040A1 (es) | 2014-01-09 | 2016-06-22 | Qualcomm Inc | Sistemas y métodos de comunicación de canal de retorno de la memoria dinámica de acceso aleatorio (dram) |
KR20160109207A (ko) * | 2015-03-10 | 2016-09-21 | 삼성전자주식회사 | 메모리의 초기화 및 펌 웨어의 업데이트를 위한 방법 및 전자 장치 |
US9940984B1 (en) | 2016-09-28 | 2018-04-10 | Intel Corporation | Shared command address (C/A) bus for multiple memory channels |
US10425260B2 (en) | 2017-08-07 | 2019-09-24 | Micron Technology, Inc. | Multi-level signaling in memory with wide system interface |
US10872644B2 (en) * | 2018-07-13 | 2020-12-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Boost bypass circuitry in a memory storage device |
US11393550B2 (en) * | 2018-09-14 | 2022-07-19 | Rambus Inc. | Memory system with error detection |
-
2020
- 2020-11-18 US US16/951,700 patent/US11392299B2/en active Active
- 2020-12-09 WO PCT/US2020/064062 patent/WO2021126634A1/fr unknown
- 2020-12-09 EP EP20903289.5A patent/EP4078588A4/fr not_active Withdrawn
- 2020-12-09 CN CN202080088785.6A patent/CN114846550A/zh active Pending
- 2020-12-09 KR KR1020227024315A patent/KR20220110579A/ko unknown
-
2022
- 2022-07-13 US US17/863,994 patent/US11893245B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4387423A (en) * | 1979-02-16 | 1983-06-07 | Honeywell Information Systems Inc. | Microprogrammed system having single microstep apparatus |
Also Published As
Publication number | Publication date |
---|---|
US20210191627A1 (en) | 2021-06-24 |
KR20220110579A (ko) | 2022-08-08 |
CN114846550A (zh) | 2022-08-02 |
WO2021126634A1 (fr) | 2021-06-24 |
EP4078588A1 (fr) | 2022-10-26 |
US11893245B2 (en) | 2024-02-06 |
US20220404985A1 (en) | 2022-12-22 |
US11392299B2 (en) | 2022-07-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
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17P | Request for examination filed |
Effective date: 20220615 |
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AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
A4 | Supplementary search report drawn up and despatched |
Effective date: 20221223 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: G06F 11/10 20060101ALI20221219BHEP Ipc: G06F 3/06 20060101ALI20221219BHEP Ipc: G11C 7/10 20060101ALI20221219BHEP Ipc: G11C 11/4072 20060101ALI20221219BHEP Ipc: G11C 11/4076 20060101ALI20221219BHEP Ipc: G11C 11/4096 20060101AFI20221219BHEP |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN WITHDRAWN |
|
18W | Application withdrawn |
Effective date: 20230120 |