EP3587214B1 - Balise control device - Google Patents

Description

The application relates to a balise control device for controlling at least one balise, comprising a first processing device set up to generate a first data signal based on a first signal aspect provided, and a second processing device set up to generate a further first data signal based on the first signal aspect provided. The application also relates to a system with a balise control device and a method for operating a balise control device.

To influence vehicles, in particular rail-based vehicles, it is known to use balises. According to the application, a balise is to be understood as a transmitter that sends data to a vehicle that passes the balise. In particular, a balise can be a transmitter arranged in or on a track bed, which transmits data to rail vehicles traveling over or past it.

The concept of the European Train Control System (ETCS; European Train Control System) provides that a balise at least partially takes over the control of a rail vehicle. The data sent by a balise can be at least partially displayed to the driver by at least one display device of the rail vehicle and / or at least partially processed automatically by a control device of the rail vehicle and used to control the rail vehicle (e.g. for automatic braking, acceleration, etc.).

Basically, a distinction can be made between two different types of balises: fixed data balises and transparent data balises.

A fixed data balise (also called a static balise) is a balise with unchanged data content. The unchangeable data content is stored in the fixed data balise. In order to read out the data, the fixed data balise can be supplied with energy in particular by the rail vehicle or by a reading device arranged on the rail vehicle. The functionality of a fixed data balise is therefore similar to a contactless transponder card. Such a balise has no connection to a data network and also does not have its own power supply. In particular, the distance to the next balise can be stored as the data content. A rail vehicle that receives this information from the balise will initiate an emergency stop if it does not detect the next balise within the obtained distance (possibly with a certain tolerance). Exemplary and non-exhaustive additional data of a fixed data balise can be location information, information on the route characteristics of the following route section and speed setpoints and / or limit values.

According to the application, a transparent data balise is to be understood as a balise with variable data content. In other words, such a balise is set up to send variable data, for example changing operating situations (information on the current route characteristics of the following route section and / or current speed setpoints and / or limit values) to a rail-bound vehicle. In order to receive variable data, a transparent data balise is therefore connected to a data network.

The variable data content is transmitted to the balise in the form of a so-called balise telegram from a balise control device (also called a balise control unit (BCU)) near the track. The balise control device in turn receives the data content in the form of a signal aspect from a (remotely located) data source. For example, the signal aspect can be transmitted from an electronic interlocking via a data network (eg CAN bus network) to the balise control device. This allows the balise to be variable and, in particular, always Up-to-date data are transmitted in order to transmit them to the vehicles that pass the balise.

The energy supply of the transparent data balise is usually wired. In particular, a sine wave voltage (e.g. 22V, 8.82 kHz) can be transmitted from the balise control device via a cable. This sinusoidal voltage is preferably used at the same time as a carrier signal for the data that are to be transmitted to the balise. In particular, a Manchester-encoded data signal (e.g. 16 V with 564.48 kbit / s) can be added or modulated onto the sinusoidal voltage. In other words, the balise control device supplies the balise with energy (sinusoidal signal) and data (Manchester signal) in the form of a balise telegram.

Since a balise is used in particular to control a rail vehicle, high safety requirements are placed on such a system. It must be ensured that the correct data is always transmitted from the balise control device to a balise. For this purpose, a balise control device is designed with two channels, so that the data processing in the balise control device corresponds to so-called safety level 4 (safety integrity level SIL 4).

A two-channel design is understood to mean that two separate processing devices are provided, each of which has suitable computing means, storage means, etc. In particular, it is known from the prior art to implement the two-channel design in that the balise telegram, in particular the data signal of the balise telegram, is calculated on two (separate) hardware platforms. The balise telegram is only transmitted to the balise as a valid signal if the result of the calculation is the same on both platforms. If the two calculations of the data signals from the same signal aspect do not lead to the same result, the balise control device interrupts the voltage supply to the balise, and the balise assumes a safe operating state.

A conventional system 100 with a balise control device 102 known from the prior art is described below with the aid of FIG Figure 1 described in more detail.

The system 100 comprises a data source 106, a balise control device 102 and a balise 104 permanently assigned to the balise control device 102. The balise control device 102 comprises two processing devices 108, 110 in the form of microprocessors 108, 110, two comparators 112, 114, a disconnection device 116, an AND Element 124, a control signal generating device 126 in the form of an adder 126, an amplifier 128 and a sinusoidal signal generator 130.

The data source 106 provides the data to be transmitted to the balise 104 in the form of a signal aspect 132 (shown schematically). The same signal aspect 132 is provided to the first processing device 108 and the second processing device 110. The respective processing device 108, 110 generates a data signal 136 or a data stream 136 from the signal aspect 132 provided. The data signal 136 can in particular be a Manchester-encoded data signal 136.

In order to ensure that the correct data are generated for the balise 104, each microprocessor 108, 110 is set up to forward the respectively generated data signal 136 both to the first comparator 112 and to the second comparator 114. A comparator 112, 114 or a comparison logic circuit 112, 114 compares the two data signals 136 received with one another. The comparison result (yes = data signals are identical; no (not shown) = data signals are not identical) is forwarded by each comparator 112, 114 to the AND element 118 of the disconnection device 116. The switches 120 and 122 of the disconnection device 116 are closed only if both comparison results are positive (ie yes is output). By closing the switches 120, 122, the respective data signals 136 can be forwarded to the AND element 124.

The resulting data signal 136 is output to the control signal generating device 126. The control signal generating device 126 generates the balise telegram 138 from the data signal 136 and the provided sine signal 140 by adding or modulating the data signal 136 onto the sine signal 140. Before the balise telegram 138 is sent, this signal 138 can be amplified by an amplifier 128. The balise telegram 138 is then transmitted to the balise 104 via a data line.

As can be seen from the previous explanations, the structure and mode of operation of a known balise control device 102 are expensive and complex.

For example, the disconnection device 116 comprises two switches 120, 122 in order to meet the requirements of the two-channel system in order to ensure that at least one switch 120, 122 is open in the event of a negative comparison result. In addition, with such disconnection devices 116, a function test has to be carried out regularly in order to check the correct functioning of the disconnection device 116. For example, it is not certain that a switch 120, 122, which is controlled with the "Open" command, actually opens. In the case of the present disconnection device 116, for example, the desired separation can only have taken place by one of the two switches 120, 122, while the other switch 120, 122 is defective and can therefore be closed.

In order to detect this state, it is necessary to regularly perform a function test of both switches 120, 122. For this purpose, when the first switch 120 is closed, the further switch 122 is opened and it is verified that no signal is arriving at its output. The test is repeated with switch 122 closed and switch 120 open. These tests require that two gauges (not shown) be used.

Thus, the construction and operation of a known balise control device are expensive and complex.

Furthermore, from the publication EP 0 738 973 A1 a method for transmitting useful data dA, dB in parallel via at least two transmitters, two channels and two receivers from a message source to a message sink known, the useful data dA, dB to be transmitted being fed to the transmitters and at least one reference data generator that is sent to one of the transmitters Reference data a; b outputs, which are selected as a function of an event that occurred when the associated useful data dA, dB arrived, the reference data a; b are transmitted by the transmitter via the associated channel and via the adjacent transmitter and the adjacent channel, and the transmitted reference data a, a 'and b, b' are transmitted from the receivers to at least one comparator which the reference data a and a 'or b and b 'are compared with one another or checked for correctness.

In addition, the document discloses CN 102 857 366 A a trackside electronic device comprising a responder interface module and a main control module, the main control module for receiving message data of a responder from a train control center, for temporarily storing the message data of the responder and for converting the message data into serial data of the first channel and serial data of the respective second channel of parallel data is used; the serial data of the first channel and the serial data of the second channel are converted into parallel data of the first channel and parallel data of the second channel, respectively; If the parallel data of the first channel and the parallel data of the second channel are identical to the cached message data of the responder and the serial data of the first channel are identical to the serial data of the second channel, either the serial data of the first channel or the serial Data of the second channel sent to the responder interface module; and the responder interface module is used to convert the received serial data of the first channel or the serial data of the second channel from the main control module into analog signals that are coordinated with the responder and used to output the analog signals to the responder.

The application is therefore based on the object of providing a balise control device which corresponds to the so-called safety level 4 and has a less complex structure and, in particular, can be operated in a simpler manner.

According to a first aspect of the application, the object is achieved by a balise control device for controlling at least one balise according to claim 1.

In contrast to the prior art, a balise control device is provided according to the application, which corresponds to security level 4 and has a less complex structure and, in particular, can be operated in a simpler manner. This is achieved by having one of the two Processing devices is additionally set up to carry out the at least one comparison operation and to output a carrier signal as a function of the comparison result. This enables a two-channel operation of a balise control device without a complex disconnection device.

The balise control device according to the application comprises a first processing device and a second processing device for two-channel operation. When the balise control device is in operation, each processing device is provided with at least one first signal aspect. A first signal aspect is assigned a data content that is to be sent out by a first balise as a balise telegram. The balise to be controlled is, in particular, a transparent data balise which is in particular permanently assigned to the balise control device.

The first processing device and the second processing device each comprise suitable computing means in order to generate a first data signal or a first data stream from the provided first (digital) signal aspect. The first data signal is in particular formed in such a way that it can be transmitted to the first balise by means of a second carrier signal. Preferably, the first data signal can be a Manchester encoded data signal (e.g. 16 V at 564.48 kbit / s). To generate, in particular to calculate, the first data signal and the further first data signal, (identical) generation rules (e.g. at least one conversion table or look-up table or the like) can be stored in the first processing device and in the second processing device.

At least the second processing device comprises a second comparator or a second comparison logic. The second comparator is set up to compare the two generated first data signals with one another. In particular, the first processing device makes the first data signal generated by the first processing device available to the second processing device via a communication link between the processing devices.

In a second comparison step, the second comparator carries out a comparison between this provided first data signal and the further first data signal that was generated by the second processing device.

The first processing device is also set up to output or forward the first data signal generated by the first processing device to a first control signal generating device. The second processing device is set up to output or forward a second carrier signal to the first control signal generating device. A carrier signal can in particular be a sinusoidal signal, such as a sinusoidal voltage (e.g. 22V; 8.82 kHz). A control signal generating device according to the application (e.g. an adder) is set up in particular to switch or modulate a received data signal onto a received carrier signal.

According to the application, it is provided that the second carrier signal is output to the first control signal generating device as a function of the comparison result of the second comparison step. According to the present application, this is to be understood in particular to mean that the second carrier signal is output only in the event of a positive second comparison result.

If the comparison result is negative, the second processing device can prevent the second carrier signal from being output. As a result, the balise is not activated and, for example, it assumes a safe operating state.

In the present case, a positive comparison result is to be understood in particular to mean that a data signal that was generated by the first processing device based on a specific signal aspect is equal to a data signal that was generated by the second processing device based on the same specific signal aspect. This enables two-channel operation to be ensured.

According to a first and particularly preferred embodiment of a balise control device according to the application, the second processing device can be set up to generate a second data signal based on a second signal aspect provided. The first processing device can be set up to generate a further second data signal based on the provided second signal aspect. The first processing device can comprise a first comparator. The first comparator can be set up to compare the further second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step. The second processing device can be set up to output the generated second data signal to a second control signal generating device. The first processing device can be set up to output a first carrier signal to the second control signal generating device. The output of the first carrier signal can depend on the comparison result of the first comparison step.

According to the application, it has been recognized in particular that a particularly efficient operation of a balise control device can be achieved if the hardware components required for two-channel operation, in particular the two processing devices, are used to control two balises.

The balise control device can preferably be set up for (at least partially) parallel processing of a first and a second signal aspect for a first and a second balise to be controlled. Each processing device can, for example based on stored generation rules, generate (at least partially) in parallel a first data signal from a first signal aspect and a second data signal from a second signal aspect. Likewise, each processing device can each have a comparator in order to carry out the first or second comparison step described above. Depending on the comparison result, each Processing means output (or not output) a carrier signal. As already described, this is to be understood in particular as meaning that a carrier signal is output only in the event of a positive comparison result (ie when the respective data signals are the same).

According to this preferred embodiment, the balise control device can be formed as follows: The balise control device comprises a first processing device. The first processing device is set up to generate a first data signal based on a provided first signal aspect and to generate a further second data signal based on a provided second signal aspect. The balise control device comprises a second processing device. The second processing device is set up to generate a second data signal based on the provided second signal aspect and to generate a further first data signal based on the provided first signal aspect. The first processing device comprises a first comparator. The first comparator is set up to compare the further second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step. The second processing device comprises a second comparator. The second comparator is set up to compare the further first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step. The first processing device is set up to output the generated first data signal to a first control signal generation device and to output a first carrier signal to a second control signal generation device. The output of the first carrier signal depends on the comparison result of the first comparison step. The second processing device is set up to output the generated second data signal to the second control signal generation device and to output a second carrier signal to the first control signal generation device. The Output of the second carrier signal depends on the comparison result of the second comparison step.

As has already been described, a control signal generating device can be set up to generate a balise telegram by adding or modulating a received data signal onto a received carrier signal. For example, an adder circuit can be provided as a control signal generating device. The balise control device can preferably comprise the first control signal generating device. In particular, the first control signal generating device can be integrated in the balise control device. The first control signal generating device can be set up to generate a first balise telegram based on the first data signal and the second carrier signal. Alternatively or (preferably) additionally, the balise control device can comprise the second control signal generating device. In particular, the second control signal generating device can be integrated in the balise control device. The second control signal generating device can be set up to generate a second balise telegram based on the second data signal and the first carrier signal. By preferably integrating both control signal generating devices in the balise control device, a compact balise control circuit can be provided.

To obtain a particularly reliable comparison result, according to a further embodiment of the balise control device according to the application, the first comparator can be set up to compare bit-by-bit the further second data signal generated by the first processing device and the second data signal generated by the second processing device. Alternatively or (preferably) additionally, the second comparator can be set up to compare bit-by-bit the further first data signal generated by the second processing device and the first data signal generated by the first processing device. By comparing the respective bits of two data signals with one another a deviation in just one bit can also be reliably detected. In particular, a comparison step can be carried out sequentially (bit-for-bit) and in real time. This enables the output of a carrier signal to be interrupted immediately as soon as a discrepancy between two bits is detected, that is to say a negative comparison result is present. In other words, the carrier signal can be output by a processing device (only) as long as the comparison result is / remains positive.

According to a preferred embodiment of the balise control device according to the application, the first processing device can comprise a first carrier signal generator. The first carrier signal generator can be set up to generate the first carrier signal. In particular, the first carrier signal generator can be a sinusoidal generator in order to generate a sinusoidal signal, in particular a sinusoidal voltage, as the first carrier signal. Alternatively or (preferably) additionally, the second processing device can comprise a second carrier signal generator. The second carrier signal generator can be set up to generate the second carrier signal. In particular, the second carrier signal generator can be a sinusoidal generator in order to generate a sinusoidal signal, in particular a sinusoidal voltage, as the second carrier signal. Such a carrier signal can also be used to supply energy to the corresponding balise.

The first carrier signal generator can preferably be set up to output the first carrier signal only in the event of a positive comparison result (ie the compared second data signals are the same) of the first comparison step. Alternatively or (preferably) additionally, the second carrier signal generator can be set up to output the second carrier signal only in the case of a positive comparison result (ie the compared first data signals are the same) of the second comparison step. In particular, the respective carrier signal generator can be communicatively connected to the respective comparator in such a way that at least when a negative Comparison result the generation and / or output of the respective carrier signal is (immediately) interrupted or stopped.

Since the comparison of the data signals preferably takes place bit-by-bit, a negative comparison result can also be caused by the processing devices not working synchronously or the synchronism of the processing devices being lost due to a malfunction. According to an embodiment according to the application, the handshake method described below for synchronization can therefore be carried out in the event of a negative comparison result and then a new, previously described comparison step can be carried out. If the comparison result is positive, the output of the carrier signal can be restarted. The balise control device can preferably be taken out of operation if, in particular after several, for example 10, synchronization attempts, no positive comparison result has been achieved.

According to a particularly preferred embodiment of the balise control device, the first processing device and the second processing device can be synchronized with one another. By synchronizing the processing devices over time, it can be ensured that the bits of the data signals that correspond to one another are compared in a comparison step. For synchronization, a first request signal from the first processing device can be transmitted from the first processing device to the second processing device, particularly when the balise control device is initialized and / or when the signal aspect changes and / or when the comparison result is negative. In addition, for the purpose of synchronization, in particular a second acknowledgment signal from the second processing device can be transmitted from the second processing device to the first processing device. Alternatively or additionally, a second request signal from the second processing device can be transmitted from the second processing device to the first processing device. In addition, a first acknowledgment signal, in particular, can be used for synchronization of the first processing device are transmitted from the first processing device to the second processing device.

It has also been recognized that, for example due to a systematic error in a generation rule, both the first and the second processing device can generate the same incorrect data signal. To further increase the reliability and safety, it is proposed according to a further embodiment of the balise control device according to the application that the first processing device can include a first tester. The first checker can be set up to check the plausibility and / or to decode the second data signal generated by the second processing device. Alternatively or (preferably) additionally, the second processing device can comprise a second tester. The second checker can be set up to check the plausibility and / or decode the first data signal generated by the first processing device. In the case of a plausibility check, the tester can in particular check a generated data signal to determine whether its structure (eg header, checksums, certain bit sequences or the like) corresponds to the structure of a (standard) balise telegram. For this purpose, the tester can divide the data signal to be checked, in particular by a test polynomial, and if the polynomial division delivers the result “zero”, the structure of the checked data signal corresponds to the expected structure of a balise telegram. Alternatively or additionally, the tester can decode a generated data signal in particular by means of decoding rules (for example at least one conversion table or look-up table or the like) that can be stored in a processing device. In particular, the signal aspect or a data set corresponding to the signal aspect, which was used for generating the data signal, can be determined by the decoding. This decoding makes it possible to check whether a data signal has been correctly generated by a processing device.

The first processing device can particularly preferably comprise a first evaluation module. The first evaluation module can be set up to check whether the data checked by the first tester from the second data signal correspond to the structure of a balise telegram and / or whether they correspond to the second signal aspect provided. Alternatively or (preferably) additionally, the second processing device can comprise a second evaluation module. The second evaluation module can be set up to check whether the data checked by the second tester from the first data signal correspond to the structure of a balise telegram and / or whether they correspond to the first signal aspect provided. For example, the first checker can be set up to check the second data signal received from the second processing device by polynomial division to determine whether it corresponds to the structure of a (standard) balise telegram. In addition, the first tester can be set up to decode the second data signal and to transmit the decoded data to the first evaluation module for comparison with the second signal aspect. Checker Alternatively or (preferably), the second checker can be set up to check the first data signal received from the first processing device by polynomial division to determine whether it corresponds to the structure of a (standard) balise telegram. In addition, the second tester can be set up to decode the first data signal and to transmit the decoded data to the second evaluation module for comparison with the first signal aspect. A comparison can determine whether the signal aspect that was provided for generating a data signal is identical with the signal aspect that was determined by decoding the data signal. If, when generating a data signal from a signal aspect, intermediate data are generated in an intermediate step, this data can also be used for the test, in particular the comparison.

If the comparison result is positive, for example if the polynomial division supplies the value “zero” and / or if the respective signal aspects (or intermediate data) are the same, it can be assumed that the data signal was generated correctly by a processing device. In the case of a negative The result of the comparison, that is to say when a discrepancy between the respective signal terms (or intermediate data) is detected, indicates that the balise control device is operating incorrectly. In response to a negative comparison result, the outputting of a carrier signal can be interrupted by a processing device. The output of the first and the second carrier signal can preferably be stopped. According to an embodiment according to the application, if the comparison result is negative, the handshake method described below for synchronization can be carried out and then a new comparison step can be carried out. If the comparison result is positive, the outputting of the first and second carrier signals can be restarted. The balise control device can preferably be taken out of operation if, in particular after several, for example 10, synchronization attempts, no positive comparison result has been achieved.

As has already been described, a processing device can comprise at least one computing means in order to carry out the generation step and / or the comparison step. A processing device can particularly preferably comprise at least one microprocessor and a field programmable gate array (FPGA) coupled therewith. According to one embodiment, at least the first comparator can be formed by a first field programmable gate array. Alternatively or (preferably) additionally, at least the second comparator can be formed by a second field programmable gate array. In addition, the calculation of the first data signal can be carried out by a first generation module which is at least partially formed by the first field programmable gate array. Alternatively or (preferably) additionally, the calculation of the second data signal can be carried out by a second generation module which is at least partially formed by the second field programmable gate array. It goes without saying that the first FPGA can comprise a further second generation module, set up to at least partially generate the further second data signal, and that the second FPGA can comprise a further first generation module, set up to at least partially generate the further first data signal.

In particular, a processing device or a computer module can be divided into two parts. A processing device can preferably comprise a microprocessor with its own operating system and its own file system. (Intermediate) data that correspond to the various signal terms can preferably be stored here. That is, for a signal aspect A, a microprocessor can read out (intermediate) data (A), for example, which correspond to the data content of a data signal or a data stream (A) that has to be generated for the associated balise A.

The (intermediate) data can be forwarded from the microprocessor to an FPGA. The FPGA can in particular be set up to generate a data signal, in particular a Manchester-modulated data signal, from this (intermediate) data.

There are several advantages to implementing an FPGA. For example, the bus width of a microprocessor is typically 32 or 64 bits. The transmission of a Manchester-encoded data signal with a length of 1024 bits would therefore require 16 or 32 processor steps. The bus width of the FPGA can preferably be programmed so that this is possible in 2 or 4 steps. This means that the FPGA can generate a data signal of e.g. 564 kbit / s faster and more easily than a microprocessor. In particular, this allows a data signal to be generated in real time.

A generated data signal can be fed from the respective FPGA into the respective other FPGA and checked by the latter. In particular, an FPGA can include a comparator in order to compare two data signals with one another, preferably bit by bit. Furthermore, an FPGA can comprise the carrier signal generator. If the comparison of the two data signals results in a difference, the generation of the carrier signal can be stopped as described above.

A carrier signal generated digitally in an FPGA, e.g. a sine signal, can preferably be converted into an analog carrier signal by a digital / analog converter. The analog carrier signal can then in particular be low-pass filtered in order to filter interference variables. It goes without saying that a generated data signal can also be low-pass filtered in order to filter disturbance variables.

The two FPGAs are initially in particular two components that operate independently of one another, so that two first or two second data signals cannot easily be generated or coded and compared synchronously.

Therefore, according to a preferred embodiment, the following handshake method is proposed for synchronization between the two FPGAs: If the balise control device is initialized (e.g. switched on) and / or if a new first signal aspect is to be transmitted to the first balise, then the first FPGA must generate a new first data signal. The second FPGA must then also generate a new, further first data signal and carry out the second comparison step (bit-for-for). The first FPGA sends a (first) request message to the second FPGA, with the content that a new first data signal is to be generated. As soon as the second FPGA is ready to generate a new further first data signal and to receive the new first data signal (for comparison) from the first FPGA, it sends a (second) acknowledgment message to the first FPGA. After receiving the acknowledgment message, the first FPGA sends a start signal, followed cyclically by the new first data signal; at the same time the first FPGA sends the first clock signal cyclically. At the same time, the second FPGA also generates the same further start signal, followed by the new further first data signal, to be precise at the rate of the first clock signal. The second FPGA feeds these two data streams bit-synchronously to the second comparator, which now compares the two data streams bit-for-bit in real time. A defined sequence of bits can preferably be used as the start signal, particularly preferably, for example, a sequence of a specific number of zeros, for example 75 zeros. In other words, the handshake method enables the balise control device, even in the event of a Initialization and / or to ensure the bit-by-bit checking of the (new) first data signal in the second comparator when the first signal aspect changes.

It goes without saying that the handshake process can be carried out analogously and in mirror image if a new second signal aspect is to be transmitted to the second balise.

Another aspect of the application is a system, in particular a balise control system. The system comprises at least one balise control device described above. The system comprises a first balise which is connected to the balise control device, in particular the first control signal generating device.

The system can preferably comprise a second balise which is connected to the balise control device, in particular to the second control signal generating device.

According to one embodiment of the system according to the application, the system can comprise a data source, in particular an electronic signal box and / or a light source and an optical detection device. The data source can be set up to generate (and provide) the first signal aspect and / or the second signal aspect. A (digital) signal aspect can be generated by an electronic signal box and transmitted to the balise control device via a data network. A (digital) signal aspect can also be generated from an analog light signal with subsequent digitization in a line-side electronic unit (LEU), which forms the optical detection device.

The balise control device can in particular be close to the rails and thus in the vicinity of the first ones, which are preferably arranged on the rails (for example in the track bed) and / or second balise can be arranged, while the data source can be arranged remotely therefrom.

• Generieren, durch eine erste Verarbeitungseinrichtung, eines ersten Datensignals, basierend auf einem bereitgestellten ersten Signalbegriff,
• Generieren, durch eine zweite Verarbeitungseinrichtung, eines weiteren ersten Datensignals, basierend auf dem bereitgestellten ersten Signalbegriff,
• Vergleichen, durch einen zweiten Vergleicher der zweiten Verarbeitungseinrichtung, des von der zweiten Verarbeitungseinrichtung generierten weiteren ersten Datensignals und des von der ersten Verarbeitungseinrichtung generierten ersten Datensignals in einem zweiten Vergleichsschritt,
• Ausgeben, durch die erste Verarbeitungseinrichtung, des generierten ersten Datensignals an eine erste Steuersignalerzeugungseinrichtung, und
• Ausgeben, durch die zweite Verarbeitungseinrichtung, eines zweiten Trägersignals an die erste Steuersignalerzeugungseinrichtung, wobei die Ausgabe des zweiten Trägersignals von dem Vergleichsergebnis des zweiten Vergleichsschritts abhängt.

Yet another aspect of the application is a method for operating a balise control device, in particular a balise control device described above. The procedure includes:

• Generating, by a first processing device, a first data signal based on a provided first signal aspect,
• Generating, by a second processing device, a further first data signal based on the provided first signal aspect,
• Compare, by a second comparator of the second processing device, the further first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step,
• Outputting, by the first processing device, the generated first data signal to a first control signal generating device, and
• Outputting, by the second processing device, a second carrier signal to the first control signal generating device, the output of the second carrier signal depending on the comparison result of the second comparison step.

• Generieren, durch eine erste Verarbeitungseinrichtung, eines ersten Datensignals, basierend auf einem bereitgestellten ersten Signalbegriff, und eines zweiten Datensignals, basierend auf einem bereitgestellten zweiten Signalbegriff,
• Generieren, durch eine zweite Verarbeitungseinrichtung, eines zweiten Datensignals, basierend auf dem bereitgestellten zweiten Signalbegriff, und Generieren eines ersten Datensignals, basierend auf dem bereitgestellten ersten Signalbegriff,
• Vergleichen, durch einen ersten Vergleicher der ersten Verarbeitungseinrichtung, des von der ersten Verarbeitungseinrichtung generierten zweiten Datensignals und des von der zweiten Verarbeitungseinrichtung generierten zweiten Datensignals in einem ersten Vergleichsschritt,
• Vergleichen, durch einen zweiten Vergleicher der zweiten Verarbeitungseinrichtung, des von der zweiten Verarbeitungseinrichtung generierten ersten Datensignals und des von der ersten Verarbeitungseinrichtung generierten ersten Datensignals in einem zweiten Vergleichsschritt,
• Ausgeben, durch die erste Verarbeitungseinrichtung, des generierten ersten Datensignals an eine erste Steuersignalerzeugungseinrichtung und Ausgeben, durch die erste Verarbeitungseinrichtung, eines ersten Trägersignals an eine zweite Steuersignalerzeugungseinrichtung, wobei die Ausgabe des ersten Trägersignals von dem Vergleichsergebnis des ersten Vergleichsschritts abhängt, und
• Ausgeben, durch die zweite Verarbeitungseinrichtung, des generierten zweiten Datensignals an die zweite Steuersignalerzeugungseinrichtung und Ausgeben, durch die zweite Verarbeitungseinrichtung, eines zweiten Trägersignals an die erste Steuersignalerzeugungseinrichtung, wobei die Ausgabe des zweiten Trägersignals von dem Vergleichsergebnis des zweiten Vergleichsschritts abhängt.

According to a preferred embodiment of the method according to the application, the method can comprise the following:

• Generating, by a first processing device, a first data signal based on a first signal aspect provided and a second data signal based on a second signal aspect provided,
• Generating, by a second processing device, a second data signal based on the provided second signal aspect, and generating a first data signal based on the provided first signal aspect,
• Comparing, by a first comparator of the first processing device, the second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step,
• Comparing, by a second comparator of the second processing device, the first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step,
• Outputting, by the first processing device, the generated first data signal to a first control signal generating device and outputting, by the first processing device, a first carrier signal to a second control signal generating device, the output of the first carrier signal depending on the comparison result of the first comparison step, and
• Outputting, by the second processing device, the generated second data signal to the second control signal generating device and outputting, by the second processing device, a second carrier signal to the first control signal generating device, the output of the second carrier signal depending on the comparison result of the second comparison step.

Fig. 1

eine schematische Ansicht eines Systems mit einer Balisensteuerungsvorrichtung gemäß dem Stand der Technik,

Fig. 2

eine schematische Ansicht eines Ausführungsbeispiels einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung,

Fig. 3

eine schematische Ansicht eines weiteren Ausführungsbeispiels einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung,

Fig. 4

eine schematische Ansicht eines Ausführungsbeispiels eines Systems gemäß der vorliegenden Anmeldung,

Fig. 5

eine schematische Ansicht eines Ausführungsbeispiels einer Verarbeitungseinrichtung einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung, und

Fig. 6

ein Diagramm eines Ausführungsbeispiels eines Verfahrens gemäß der vorliegenden Anmeldung.

There are now a large number of possibilities for designing and further developing the balise control device according to the application, the system according to the application and the method according to the application. For this is on the one hand reference is made to the claims subordinate to the independent claims, on the other hand to the description of exemplary embodiments in conjunction with the drawing. In the drawing shows:

Fig. 1

a schematic view of a system with a balise control device according to the prior art,

Fig. 2

a schematic view of an embodiment of a balise control device according to the present application,

Fig. 3

a schematic view of a further embodiment of a balise control device according to the present application,

Fig. 4

a schematic view of an embodiment of a system according to the present application,

Fig. 5

a schematic view of an embodiment of a processing device of a balise control device according to the present application, and

Fig. 6

a diagram of an embodiment of a method according to the present application.

The same reference symbols are used below for the same elements.

The Figure 2 FIG. 11 shows a schematic view of an embodiment of a balise control device 202 according to the present application. The balise control device 202 comprises a first processing device 250 and a second processing device 252. In addition, the balise control device 202 in the present case comprises a first control signal generating device 266.

The first processing device 250 comprises at least a first generation module 254. The first generation module 254 is set up to generate or encode a first data signal 236 based on a first (digital) signal aspect 232 provided. The second processing device 252 comprises a further first generation module 260. The further first generation module 260 is set up to generate or encode a further first data signal based on the provided first (digital) signal aspect 232.

In addition, the further processing device 252 comprises a second comparator 264. The second comparator 264 is set up to compare the first data signal 236 generated by the first processing device 250 with the further first data signal in a second comparison step.

In addition, the second processing device 252 is set up to output a second carrier signal 240, in particular a sinusoidal signal 240. In particular, the carrier signal 240 can be forwarded to the first control signal generating device 266. As can be seen, the first processing device 250 is set up to output the first data signal 236 to the first control signal generating device 266. The first control signal generating device 266 is set up to switch the provided first data signal 236 onto the provided second carrier signal 240 in order to generate a first balise telegram 238 for a first (not shown) balise.

In order to ensure that a balise telegram 238 is generated and sent only when the first data signal 236 is correctly generated, the application provides for the second processing device 252 to be set up to output the second carrier signal 240 as a function of the comparison result of the second comparison step. This is to be understood in particular as the fact that the second carrier signal 240 is only output by the second processing device 252 in the event of a positive comparison result. In the case of a negative As a result of the comparison, the output of the second carrier signal 240 is in particular stopped. In this case, a positive comparison result is given in particular when the first data signal 236 is the same as the further first data signal. A negative comparison result is given in particular when a discrepancy between the first data signal 236 and the further first data signal is detected. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new comparison step can be carried out. If the result of the comparison is positive, the outputting of the carrier signal 240 can be started again. The balise control device 202 can preferably be taken out of operation if no positive comparison result has been achieved after several, for example 10, synchronization attempts.

The Figure 3 FIG. 11 shows a schematic view of a further exemplary embodiment of a balise control device 302 according to the present application. To avoid repetition, essentially only the differences from the exemplary embodiment according to FIG Figure 2 described. For the other components of the balise control device 302, reference is made in particular to the statements above.

In the present exemplary embodiment, the balise control device 302 includes a second control signal generating device 368. The first processing device 350 includes, in addition to the first generation module 354, a further second generation module 356 and a first comparator 358. The second processing device 352 includes the further first generation module 360 and the second comparator 364 a second generation module 362. The advantage of the balise control device 302 of the present exemplary embodiment is that two balises (not shown) can be controlled by the balise control device 302 without having to duplicate the hardware used for this purpose.

The illustrated balise control device 302 is set up to receive a first signal aspect 332 for a first balise and a second signal aspect 334 for a second balise and to process these in particular in parallel. The further second generation module 356 can preferably generate a further second data signal, for example parallel to the generation of the first data signal 336, based on the provided second signal aspect 334. The second generation module 362 of the second processing device 352 can generate a second data signal 337 based on the provided second signal aspect 334.

In order to ensure that a second balise telegram 344 is generated and transmitted only when the second data signal 337 is correctly generated, it is provided in the present case that the first processing device 350 is set up to output the first carrier signal 342 as a function of the comparison result of a first comparison step. In the first comparison step, the first comparator 358 can, in particular, compare the second data signal 337 with the further second data signal. In particular, the first carrier signal 342 can only be output by the first processing device 350 if the comparison result is positive. If the result of the comparison is negative, the output of the first carrier signal 342 can be stopped. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new comparison step can be carried out. If the comparison result is positive, the outputting of the first carrier signal 342 can be started again. The balise control device 302 can preferably be taken out of operation if no positive comparison result has been achieved after several, for example 10, synchronization attempts.

The Figure 4 FIG. 3 shows a schematic view of an embodiment of a system 400 according to the present application. The system 400 includes an embodiment of a balise controller 402 in accordance with the present invention Registration. To avoid repetition, only the differences from the exemplary embodiments according to FIGS Figures 2 and 3 described. For the other components of the balise control device 402, reference is made in particular to the statements above.

The system 400 further includes a data source 406. It is understood that two or more data sources can be provided. The data source 406 is, for example, an electronic interlocking 406 or a line-side electronic unit (lineside electronic unit, LEU). In particular, the data source 406 is set up in the present case to generate at least a first digital signal aspect 432 for a first balise 404 and a second digital signal aspect 434 for a second balise 405. The first and / or the second signal aspect 432, 434 can be transmitted to the at least one balise control device 402 of the system 400 via a data network (e.g. CAN bus network).

As already described, the system 400 here comprises a first balise 404, in particular a transparent data balise 404, and a second balise 405, in particular a transparent data balise 405. Each balise 404, 405 is connected to the balise control device 402 via a data line.

Furthermore, from the Figure 4 It can be seen that a processing device 450, 452 is essentially formed from two components, namely a microprocessor 470, 474 and an FPGA 472, 476. Each FPGA 472, 476 can be supplied with its own clock signal 482, 484. The mode of operation of the processing devices 450, 452 is described in more detail below.

Based on a first signal aspect 432, the first microprocessor 470 generates first (intermediate) data 478. In particular, first (intermediate) data can be stored in the first microprocessor 470, eg in its file system, which correspond to the first signal aspects (eg in the form of a Conversion table). The first (intermediate) data 478 are forwarded to the first FPGA. The FPGA generates from the first (intermediate) data 478 is a first data signal 436. The first data signal 436 can in particular be a Manchester-encoded data signal 436. In particular, a first data signal 436 with a data stream of 564 kbit / s can be generated in real time.

The first data signal 436 is output by the first processing device 450 to a first control signal generating device 466 in the form of an adder 466 via a first low-pass filter 492. The first low-pass filter 492 preferably has a cut-off frequency of around 50 MHz.

Furthermore, the first data signal 436 is output to the second FPGA 476 of the second processing device 452.

The second microprocessor 474 generates first (intermediate) data 478 based on the first signal aspect and forwards this to the second FPGA 476. The second FPGA 476 is set up to generate a further first data signal from the first (intermediate) data 478 and to compare this with the first data signal 436 of the first processing device 450. In particular, the second FPGA 476 is set up to carry out a bit-by-bit comparison of the two first data signals. In order to carry out the second comparison step, i.e. the bit-by-bit comparison of the two first data signals in the second FPGA 476, a handshake method is proposed in the present exemplary embodiment, which is activated when the balise control device 400 is initialized and / or when the first signal aspect 432 is changed and / or when a negative comparison result can be carried out: The first FPGA 472 sends a first request message 494 to the second FPGA 476, with the content that a new first data signal 436 is to be generated. As soon as the second FPGA 476 is ready to generate a new further first data signal and to receive the new first data signal 436 (for comparison) from the first FPGA 472, it sends a second acknowledgment message 495 to the first FPGA 472 second acknowledgment message 495 sends the first FPGA 472 first a start signal and then cyclically the new first data signal 436 and cyclically the first clock signal 486. At the same time, the second FPGA 476 also generates the start signal, cyclically followed by the new further first data signal, at the same time as the first clock signal 486 FPGA 476 feeds these two data streams bit-synchronously to the second comparator, which now compares the two data streams bit-for-bit in real time. A defined sequence of bits can preferably be used as the start signal, particularly preferably, for example, a sequence of 75 zeros.

A digital second carrier signal 440 is output by the second processing device 452 as a function of the comparison result of the second comparison step. In particular, the second carrier signal 440 is only output if the comparison result is positive. As can be seen, the second carrier signal 440 is output to a digital-to-analog converter 490. The second analog carrier signal generated by the digital to analog converter 490 is forwarded to the first control signal generating device 466 via a second low-pass filter 493.

The first control signal generating device 466 generates a first balise telegram 438 by adding the first data signal 436 to the second analog carrier signal 440. Optionally, the balise telegram 438 can be amplified by an amplifier 428.

The processing of the second signal aspect 434 can be carried out by the present balise control device 402, preferably in parallel with the processing of the first signal aspect 432. The second processing device 452 generates, in accordance with the previous explanations, second (intermediate) data 480 and from it a second data signal 437. This is output to the second control signal generation device 468 and, together with a second clock signal 488, to the first processing device 450 in order to to compare the second data signal 437 with the further second data signal in a first comparison step. Only with a positive comparison result of the first In the comparison step, a first carrier signal 442 can be output to the second control signal generating device 468 in order to generate a second balise telegram 444 in the manner described above. For the synchronization of the first comparison step, the same handshake method as described above for the synchronization of the second comparison step can be used in mirror image.

The respective balise telegram 438, 444 is transmitted to the respective balise 404, 405 via a data line. If a negative comparison result is detected, the transmission of the corresponding carrier signal 440, 442 is stopped. As a result, the corresponding balise telegram 438, 444 is not sent. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new comparison step can be carried out. If the comparison result is positive, the outputting of the corresponding carrier signals 440, 442 can be restarted. As a result, the sending of the corresponding balise telegram 438, 444 is started again. The balise control device 402 can preferably be taken out of operation if no positive comparison result has been achieved after several, for example 10, synchronization attempts.

The Figure 5 FIG. 4 shows a schematic view of a further exemplary embodiment of a first processing device 550, which is shown in FIG Figures 2 to 4 can be used as processing devices 250, 350, 450. A second processing device (corresponding to the processing devices 252, 352, 452 from Figures 2 to 4 ) can be implemented in the same way and is not shown for reasons of clarity. At this point, too, essentially only the differences from the previous exemplary embodiments are described below, in order to avoid repetition, and otherwise reference is made to the previous statements.

In the present case, the first FPGA 572 is connected to the first microprocessor 570 or controller 570 via an interface 593 (e.g. a CPU interface). Among other things, the first FPGA 572 is set up to receive first (intermediate) data 578 and second (intermediate) data 580 from the first microcontroller 570, each of which corresponds to a first signal aspect and a second signal aspect. A first (not shown) balise or a second (not shown) balise is to be controlled with these data 578, 580. The data contents of the data 578, 580 can be stored in a memory area 594 (e.g. telegram memory).

A first generation module 554 or a first encoder 554 can read out the first data 578 from the memory 594 and the generation rules stored in a further memory area 595 in order to generate the first data signal 536 therefrom. In the manner described above, the first data signal 536 can be transmitted to a first balise, depending on the comparison result of the second comparison step.

At the same time, this first data stream 536, preferably together with the first clock signal 586, can be sent to the second FPGA of the second processing device in order to be checked there in the manner described above. If the check in the second FPGA reveals an error in the first data signal 536, the outputting of the second carrier signal that is generated in the second FPGA can be switched off in real time.

Furthermore, the present first FPGA 572 is set up to receive a second data signal 537, preferably together with a second clock signal 588 of the second processing device, from the second processing device, that is to say in particular from the second FPGA. With the second clock signal 588, a further second generation module 556 or a further second encoder 556 can generate, in particular calculate, a further second data signal from second (intermediate) data 580 and the generation rules stored in a further memory area 596.

In a first comparison step, in the present case, in a first comparator 558, the second data signal 537 and the further second data signal are compared with one another bit-by-bit and in particular in real time. If this comparison shows a discrepancy, i.e. a negative comparison result is detected, the carrier signal generator 598, in particular a sine wave generator 598, which generates the first carrier signal 542, can be switched off. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new first comparison step can be carried out. If the comparison result is positive, the outputting of the corresponding carrier signals 542 can be restarted.

In other words, in the present case the output of the first carrier signal 542 can be stopped, in particular in real time, if an error has occurred in the first comparison step. It can thus be achieved that the energy supply to the second balise is switched off. If the second balise is then driven over by a rail vehicle, it sends in particular a preset signal to the rail vehicle. This can recognize the fault and initiate a correspondingly safe reaction.

It is also possible that a (first or second) data signal was generated incorrectly (identically) in both processing devices. The bit-by-bit comparison of the two generated data signals would then show no discrepancy. A first tester 597, preferably in the first FPGA 572, can optionally be provided to detect such a fault. In a corresponding manner, a second tester can be provided in the second processing device.

Again Figure 5 As can be seen, not only two generated second data streams can be compared with one another in the first FPGA 572, but preferably the second data stream 537, which can be received by the first FPGA from the second FPGA, is checked for plausibility by the first tester 597 or decoded or . be calculated back. In particular, the first checker 597 can check the second data signal 537 by polynomial division to determine whether it corresponds to the structure of a (standard) balise telegram, and / or the first checker 597 can use the second data signal to extract the second (intermediate) data of the second signal aspect 534 determine. If the plausibility check and / or a comparison of the determined second (intermediate) data and the second (intermediate) data generated by the first microprocessor 570 shows an error, the output of the first carrier signal 542 can be switched off.

The Figure 6 shows a diagram of an embodiment of a method according to the present application. In the present case, a preferred exemplary embodiment is shown in particular, in which two balises can be controlled in parallel with the method. It goes without saying that only one balise can be controlled with other variants of the registration.

In step 601, a first data signal is calculated based on a first signal aspect by a first processing device. In this step, a further, second data signal, based on a second signal aspect, can also be calculated by the first processing device, as has been described above.

For example, in parallel with this, in step 602 a second data signal, based on the second signal aspect, can be calculated by a second processing device. In addition, in this step, the second processing device can generate a further first data signal based on the first signal aspect.

In steps 603 and 604, the first comparison step and the second comparison step are carried out. In particular, the first processing device can compare the second data signal with the further second data signal in a first comparison step. The second processing device in a second comparison step, compares the first data signal with the further first data signal.

In step 605, the first processing device outputs the first data signal to the first control signal generating device and the first carrier signal to the second control signal generating device. The first carrier signal is output as a function of the comparison result of the first comparison step. If the comparison result is positive, the first carrier signal is output, while if the comparison result is negative, the output is interrupted. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new first comparison step can be carried out. If the comparison result is positive, the output of the first carrier signal can be restarted. The balise control device can preferably be taken out of operation if no positive comparison result has been achieved after several, for example 10, synchronization attempts. In a corresponding manner, in step 606 the second processing device can output the second data signal to the second control signal generating device and the second carrier signal to the first control signal generating device. The second carrier signal is output as a function of the comparison result of the second comparison step. If the comparison result is positive, the second carrier signal is output, while if the comparison result is negative, the output is interrupted. Furthermore, if the comparison result is negative, the handshake method described for synchronization can be carried out and then a new, second comparison step can be carried out. If the comparison result is positive, the output of the second carrier signal can be restarted. The balise control device can preferably be taken out of operation if no positive comparison result has been achieved after several, for example 10, synchronization attempts.

Only if a carrier signal is output can the corresponding balise telegram be output to the corresponding balise, as described above.

According to the application, it is provided in particular that a first data signal and a second data signal are generated in both processing devices, the two data signals representing the respective signal aspect for the first balise and the second balise. Both data signals can be compared with one another in one of the two processing devices, preferably in real time and bit by bit. If the comparison shows a discrepancy, the corresponding carrier signal or energy supply signal for the corresponding balise can be switched off and a signal-technically safe state can be established. This comparison and, if necessary, the switching off can take place in particular in real time during the generation of the data signals.

Claims (11)

1. Balise control apparatus (202, 302, 402) for controlling at least one balise (404, 405), wherein the balise control apparatus (202, 302, 402) comprises:

   - a first processing unit (250, 350, 450, 550) configured in such a way that a first data signal (236, 336, 436, 536) is generated based on a provided first signal term (232, 332, 432, 532),

   - a second processing unit (252, 352, 452) configured in such a way that a further first data signal is generated based on the provided first signal term (232, 332, 432, 532),

   - wherein the second processing unit (252, 352, 452) comprises a second comparator (264, 364, 464) configured in such a way that the further first data signal generated by the second processing unit (252, 352, 452) and the first data signal (236, 336, 436, 536) generated by the first processing unit (250, 350, 450, 550) are compared in a second comparison step, and

   - wherein the first processing unit (250, 350, 450, 550) is configured such that the generated first data signal (236, 336, 436, 536) is output to a first control signal generating unit (266, 366, 466),

   characterized in that

   - the second processing unit (252, 352, 452) is configured in such a way that a second carrier signal (240, 340, 440) is output to the first control signal generating unit (266, 366, 466), wherein the output of the second carrier signal (240, 340, 440) is dependent on the comparison result of the second comparison step.
2. Balise control apparatus (202, 302, 402) according to claim 1, wherein

   - the second processing unit (252, 352, 452) is configured in such a way that a second data signal (337, 437, 537) is generated based on a provided second signal term (334, 434),

   - the first processing unit (250, 350, 450, 550) is configured in such a way that a further second data signal is generated based on a provided second signal term (334, 434),

   - wherein the first processing unit (250, 350, 450, 550) comprises a first comparator (358, 458, 558) configured in such a way that the further second data signal generated by the first processing unit (250, 350, 450, 550) and the second data signal (337, 437, 537) generated by the second processing unit (252, 352, 452) are compared in a first comparison step,

   - wherein the second processing unit (252, 352, 452) is configured in such a way that the generated second data signal (337, 437, 537) is output to a second control signal generating unit (368, 468), and

   - wherein the first processing unit (250, 350, 450, 550) is configured in such a way that a first carrier signal (342, 442, 542) is output to the second control signal generating unit (368, 468), wherein the output of the first carrier signal (342, 442, 542) is dependent on the comparison result of the first comparison step.
3. Balise control apparatus (202, 302, 402) according to claim 1 or 2, wherein

   - the balise control apparatus (202, 302, 402) comprises the first control signal generating unit (266, 366, 466) configured in such a way that a first balise telegram (238, 338, 438) is generated based on the first data signal (236, 336, 436, 536) and the second carrier signal (240, 340, 440),
   and/or

   - the balise control apparatus (202, 302, 402) comprises the second control signal generating unit (348, 468) configured in such a way that a second balise telegram (344, 444) is generated based on the second data signal (337, 437, 537) and the first carrier signal (342, 442, 542).
4. Balise control apparatus (202, 302, 402) according to any one of the preceding claims, wherein

   - the first comparator (358, 458, 558) is configured in such a way that the further second data signal generated by the first processing unit (250, 350, 450, 550) and the second data signal (337, 437, 537) generated by the second processing unit (252, 352, 452) are compared bit by bit,
   and/or

   - the second comparator (264, 364, 464) is configured in such a way that the further first data signal generated by the second processing unit (252, 352, 452) and the first data signal (236, 336, 436, 536) generated by the first processing unit (250, 350, 450, 550) are compared bit by bit.
5. Balise control apparatus (202, 302, 402) according to any one of the preceding claims, wherein

   - the first processing unit (250, 350, 450, 550) comprises a first carrier signal generator (598) configured in such a way that the first carrier signal (342, 442, 542) is generated,
   and/or

   - the second processing unit (252, 352, 452) comprises a second carrier signal generator configured in such a way that the second carrier signal (240, 340, 440) is generated.
6. Balise control apparatus (202, 302, 402) according to claim 5, wherein

   - the first carrier signal generator (598) is configured in such a way that the first carrier signal (342, 442, 542) is output only in the case of a positive comparison result of the first comparison step,
   and/or

   - the second carrier signal generator is configured in such a way that the second carrier signal (240, 340, 440) is output only when the comparison result of the second comparison step is positive.
7. Balise control apparatus (202, 302, 402) according to any one of the preceding claims, wherein

   - the first processing unit (250, 350, 450, 550) and the second processing unit (252, 352, 452) are synchronized with each other,

   - wherein for synchronization, in particular, a first request signal (494) of the first processing unit (250, 350, 450, 550) is transmitted from the first processing unit (250, 350, 450, 550) to the second processing unit (252, 352, 452),
   and/or

   - wherein, for synchronization, in particular, a second acknowledgement signal (495) of the second processing unit (252, 352, 452) is transmitted from the second processing unit (252, 352, 452) to the first processing unit (250, 350, 450, 550).
8. Balise control apparatus (202, 302, 402) according to any one of the preceding claims, wherein

   - the first processing unit (250, 350, 450, 550) comprises a first verifier (597) configured in such a way that the plausibility is checked and/or the second data signal (337, 437, 537) generated by the second processing unit (252, 352, 452) is decoded,
   and/or

   - the second processing unit (252, 352, 452) comprises a second verifier configured in such a way that the plausibility is checked and/or the first data signal (236, 336, 436, 536) generated by the first processing unit (250, 350, 450, 550) is decoded.
9. Balise control apparatus (202, 302, 402) according to claim 8, wherein

   - the first processing unit (250, 350, 450, 550) comprises a first evaluation module configured in such a way that it is checked whether the data decoded by the first verifier (597) from the second data signal (337, 437, 537) corresponds to the provided second signal term (334, 434, 534),
   and/or

   - the second processing unit (252, 352, 452) comprises a second evaluation module configured in such a way that it is checked whether the data decoded by the second verifier from the first data signal (236, 336, 436, 536) corresponds to the provided first signal term (232, 332, 432, 532).
10. System (400), comprising:

    - at least one balise control apparatus (202, 302, 402) according to any one of the preceding claims,

    - a first balise (404) connected to the balise control apparatus (202, 302, 402,), in particular, the first control signal generating device (266, 366, 466).
11. Method of operating a balise control apparatus (202, 302, 402), in particular, a balise control apparatus (202, 302, 402) according to any one of claims 1 to 8, wherein the method comprises:

    - generating, by a first processing unit (250, 350, 450, 550), a first data signal (236, 336, 436, 536) based on a provided first signal term (232, 332, 432, 532),

    - generating, by a second processing unit (252, 352, 452), a further first data signal based on the provided first signal term (232, 332, 432, 532),

    - comparing, by a second comparator (264, 364, 464) of the second processing unit (252, 352, 452), the further first data signal generated by the second processing unit (252, 352, 452) and the first data signal (236, 336, 436, 536) generated by the first processing unit (250, 350, 450, 550) in a second comparing step, and

    - outputting, by the first processing unit (250, 350, 450, 550), the generated first data signal (236, 336, 436, 536) to a first control signal generating unit (266, 366, 466), characterized in that the method comprises:

    - outputting, by the second processing unit (252, 352, 452), a second carrier signal (240, 340, 440) to the first control signal generating unit (266, 366, 466), wherein the output of the second carrier signal (240, 340, 440) is dependent on the comparison result of the second comparison step.

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