DE102018115759B3 - Balisensteuerungsvorrichtung - Google Patents

Abstract

The application relates to a balise control device (202, 302, 402) for controlling at least one balise (404, 405), comprising: first processing means (250, 350, 450, 550) arranged to generate a first data signal (236, 336, 436 , 536), based on a provided first signal term (232, 332, 432, 532), second processing means (252, 352, 452) configured to generate a further first data signal, based on the provided first signal term (232, 332, 432, 532), wherein the second processing means (252, 352, 452) comprises a second comparator (264, 364, 464) arranged to compare the further first data signal generated by the second processing means (252, 352, 452) the first processing means (250, 350, 450, 550) generating the first data signal (236, 336, 436, 536) in a second comparing step, wherein the first processing means (250, 350, 450, 550 ) for outputting the generated first data signal (236, 336, 436, 536) to a first control signal generating means (266, 366, 466), and wherein the second processing means (252, 352, 452) for outputting a second carrier signal (240, 340, 440) is set to the first control signal generating means (266, 366, 466), wherein the output of the second carrier signal (240, 340, 440) depends on the comparison result of the second comparing step.

Description

The application relates to a balise control device for controlling at least one balise, comprising a first processing device configured to generate a first data signal based on a provided first signal term, and a second processing device configured to generate a further first data signal based on the provided first signal term. Moreover, the application relates to a system with a balise control device and a method for operating a balise control device.

For influencing vehicles, in particular rail-based vehicles, it is known to use balises. According to the application, a beacon is a sender that sends data to a vehicle passing through the balise. In particular, a balise may be a transmitter located in or on a track bed which transmits data to rail vehicles passing over or past it.

In the concept of the European Train Control System (ETCS) it is envisaged that a balise will at least partially take over the influence of a rail vehicle. The data transmitted by a balise may be at least partially displayed to the driver by at least one display device of the rail vehicle and / or at least partially processed automatically by a controller of the rail vehicle and used to control the rail vehicle (e.g., for automatic braking, acceleration, etc.).

Basically, a distinction can be made between two different types of balises: fixed data balises and transparent data balises.

A fixed data balise (also called static balise) is a balise with unchanged data content. The immutable data content is stored in the fixed data balise. In order to read out the data, the fixed data balise can be supplied with energy, in particular by the rail vehicle or by a reading device arranged on the rail vehicle. The operation of a fixed data balise therefore resembles a contactless transponder card. Such a balise has no connection to a data network and also has no own power supply. In particular, the distance to the next balise can be stored as data content. A rail vehicle receiving this information from the balise will initiate an emergency stop if it does not detect the next balise within the obtained distance (possibly with a certain tolerance). Exemplary and non-terminating further data of a fixed data balise can be location information, details of the route condition of the subsequent route section and speed setpoints and / or limit values.

According to the application, a transparent data balise is to be understood as a balise with a variable data content. In other words, such a balise is set up to transmit variable data, for example variable operating situations (information on the current route condition of the subsequent route section and / or current speed setpoint values and / or limit values) to a rail-bound vehicle. In order to obtain variable data, a transparent data beacon is therefore connected to a data network.

The variable data content is transmitted to the balise in the form of a so-called balise telegram from a (rail-near) balise control unit (also called the balise control unit (BCU)). The balise control device in turn receives the data content in the form of a signal term from a (remote) data source. For example, the signal term may be transmitted from an electronic interlocking to the balise controller via a data network (e.g., CAN bus network). As a result, the Balise variable and especially always current data are transmitted to transfer them to the vehicles that pass through the balise.

The power supply of the transparent data balise is usually wired. In particular, a sinusoidal voltage (e.g., 22V, 8.82 kHz) may be transmitted from the balise controller via a cable. This sine voltage is preferably used simultaneously as a carrier signal for the data to be transmitted to the balise. In particular, a Manchester encoded data signal (e.g., 16V at 564.48 kbit / s) may be added to the sine wave. In other words, the balise control device supplies the balise with energy (sinusoidal signal) and data (Manchester signal) in the form of a balise telegram.

Since a balise is used in particular for the control of a rail vehicle, high safety requirements are placed on such a system. It must be ensured that the correct data is always transmitted from the balise control device to a balise. For this purpose, a balise control device has two channels, so that the data processing in the balise control device is the so-called security level 4 (Safety Integrity Level SIL 4 ) corresponds.

Under a two-channel design is to be understood that two separate processing means are provided, each having appropriate computing means, storage means, etc. have. From the prior art, it is particularly known to implement the two-channel design in that the Balisentelegramm, in particular the data signal of the Balisentelegramms, is calculated on two (separate) hardware platforms. Only if the result of the calculation on the two platforms is the same, the balise telegram is transmitted as a valid signal to the balise. If the two computations of the data signals from the same signal term do not result in the same result, the balise control device interrupts the power supply to the balise and the balise assumes a safe operating condition.

The following is a conventional system 100 with a known from the prior art balise control device 102 with the help of 1 described in more detail.

The system 100 includes a data source 106 , a balise control device 102 and one of the balise control device 102 firmly assigned balise 104 , The balise control device 102 includes two processing facilities 108 . 110 in the form of microprocessors 108 . 110 , two comparators 112 . 114 , a shutdown device 116 , an AND member 124 , a control signal generating means 126 in the form of an adder 126 , an amplifier 128 and a sine signal generator 130 ,

The data source 106 put that to the balise 104 data to be transmitted in the form of a signal concept (shown schematically) 132 ready. The same signal concept 132 becomes the first processing device 108 and the second processing device 110 provided. From the provided signal concept 132 generates the respective processing device 108 . 110 one data signal each 136 or a data stream 136 , The data signal 136 in particular, a Manchester-encoded data signal 136 his.

To make sure the correct data for the balise 104 Any microprocessor is generated 108 . 110 set up the respectively generated data signal 136 both to the first comparator 112 as well as to the second comparator 114 forward. A comparator 112 . 114 or a comparison logic circuit 112 . 114 compares the two received data signals 136 together. The comparison result (yes = data signals are identical, no (not shown) = data signals are not identical) is used by each comparator 112 . 114 each to the AND gate 118 the shutdown device 116 forwarded. Only if both comparison results are positive (ie yes is output) will the switches become 120 and 122 the shutdown device 116 closed. By closing the switch 120 . 122 can the respective data signals 136 to the AND gate 124 to get redirected.

The resulting data signal 136 is applied to the control signal generating means 126 output. The control signal generating means 126 generated from the data signal 136 and the sine signal provided 140 by adding or modulating the data signal 136 to the sine wave signal 140 the bali telegram 138 , Before a transmission of the Balisentelegramms 138 can this signal 138 still through an amplifier 128 be strengthened. Then the balis telegram 138 via a data line to the balise 104 transfer.

As can be seen from the previous embodiments, the structure and operation of a known balise control device 102 complex and complex.

So the shutdown device includes 116 for the fulfillment of the requirements of two-channel two switches 120 . 122 to make sure that at least one switch 120 . 122 is open for a negative comparison result. In addition, such defeat devices 116 in that a functional test is to be carried out regularly to ensure the correct functioning of the shutdown device 116 to check. For example, it is not certain that a switch 120 . 122 opened with the command "Open" really opens. So can with the present Abschalteinrichtung 116 the desired separation only by one of the two switches 120 . 122 be done while the other switch 120 . 122 is defective and therefore can be closed.

To detect this condition, it is necessary to periodically test both switches 120 . 122 perform. This is done with the first switch closed 120 , the other switch 122 opens and verifies that no signal arrives at its output. The test will be with the switch closed 122 and opened switch 120 repeated. These tests require that two gauges (not shown) are used. A balise control device is, for example, from WO 2005/113 314 A1 known.

Thus, the structure and operation of a known balise control device are complicated and complex.

The application is therefore based on the object to provide a balise control device available, the so-called security level 4 corresponds and has a less complex structure and in particular is easier to operate.

The object is achieved according to a first aspect of the application by a balise control device for controlling at least one balise according to claim 1. The balise control device comprises a first processing device. The first processing device is configured to generate a first data signal based on a provided first signal term. The balise control device comprises a second processing device. The second processing device is configured to generate a further first data signal, based on the provided first signal concept. The second processing device comprises a second comparator. The second comparator is configured to compare the further first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step. The first processing device is set up for outputting the generated first data signal to a first control signal generating device. The second processing device is configured to output a second carrier signal to the first control signal generating device. The output of the second carrier signal depends on the comparison result of the second comparing step.

In contrast to the prior art, according to the application, a balise control device is provided which corresponds to the security level 4 This is achieved in that one of the two processing devices is additionally set up to carry out the at least one comparison operation and to output a carrier signal as a function of the comparison result. This allows a two-channel operation of a balise control device without a complex shutdown device.

According to the application, the balise control device comprises a first processing device and a second processing device for a two-channel operation. In operation of the balise control device, at least one first signal term is provided to each processing device. A first signal term is assigned a data content which is to be transmitted by a first balise as a balise telegram. The Balise to be controlled is, in particular, a transparent data balise which is in particular permanently assigned to the balise control device.

The first processing device and the second processing device each comprise suitable computing means for generating a first data signal or a first data stream from the provided first (digital) signal concept. The first data signal is in particular formed in such a way that it can be transmitted to the first balise by means of a second carrier signal. Preferably, the first data signal may be a Manchester coded data signal (e.g., 16V at 564.48 kbit / s). For generating, in particular for calculating, the first data signal and the further first data signal, respectively (same) generation rules (for example at least one look-up table or the like) can be stored in the first processing device and in the second processing device.

At least the second processing device comprises a second comparator or a second comparison logic. The second comparator is set up to compare the two generated first data signals. In particular, the first processing device provides the first data signal generated by the first processing device to the second processing device via a communication connection between the processing devices.

The second comparator performs a comparison in a second comparison step by means of this provided between the first data signal and the further first data signal generated by the second processing device.

The first processing device is further configured to output or forward the first data signal generated by the first processing device to a first control signal generating device. The second processing device is set up to output or forward a second carrier signal to the first control signal generating device. In particular, a carrier signal may be a sinusoidal signal, such as a sine voltage (e.g., 22V, 8.82 kHz). A control signal generating device according to the application (for example an adder) is in particular arranged to connect or to modulate a received data signal onto a received carrier signal.

According to the application, it is provided that the second carrier signal is output to the first control signal generating device as a function of the comparison result of the second comparison step. This is to be understood according to the present application in particular that an output of the second carrier signal takes place only in a positive second comparison result.

In the case of a negative comparison result, outputting of the second carrier signal can be prevented by the second processing device. This has the consequence that a control of Balise is omitted and this example assumes a safe operating condition.

In the present case, a positive comparison result is understood in particular to mean that a data signal generated by the first processing device based on a specific signal term is equal to a data signal generated by the second processing device based on the same particular signal term. As a result, a two-channel operation can be ensured.

In accordance with a first and particularly preferred embodiment of a balise control device according to the application, the second processing device can be set up to generate a second data signal, based on a second signal concept provided. The first processing device may be configured to generate a further second data signal, based on the provided second signal concept. The first processing means may comprise a first comparator. The first comparator may be configured to compare the further second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step. The second processing device may be configured to output the generated second data signal to a second control signal generating device. The first processing device may be configured to output a first carrier signal to the second control signal generating device. The output of the first carrier signal may depend on the comparison result of the first comparing step.

According to the application, it has been recognized in particular that a particularly efficient operation of a balise control device can be achieved if the hardware components required for two-channel operation, in particular the two processing devices, are used to drive two balises.

Preferably, the balise control device can be set up for (at least partial) parallel processing of a first and a second signal term for a first and a second balise to be triggered. Each processing device may, e.g. based on stored generation rules, (at least partially) generate a first data signal in parallel from a first signal concept and a second data signal from a second signal concept. Likewise, each processing device can each have a comparator in order to carry out the first or second comparison step described above. Depending on the comparison result, each processor may output (or not output) a carrier signal. As has already been described, this means in particular that only with a positive comparison result (i.e., when the respective data signals are the same) will a carrier signal be output.

According to this preferred embodiment, the balise control device may be formed as follows: The balise control device comprises a first processing device. The first processing device is configured to generate a first data signal based on a provided first signal term, and to generate a further second data signal based on a provided second signal term. The balise control device comprises a second processing device. The second processing device is configured to generate a second data signal based on the provided second signal term, and to generate a further first data signal based on the provided first signal term. The first processing device comprises a first comparator. The first comparator is set up for comparing the further second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step. The second processing device comprises a second comparator. The second comparator is set up for comparing the further first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step. The first processing device is set up for outputting the generated first data signal to a first control signal generating device and for outputting a first carrier signal to a second control signal generating device. The output of the first carrier signal depends on the comparison result of the first comparing step. The second processing device is set up for outputting the generated second data signal to the second control signal generating device and for outputting a second carrier signal to the first control signal generating device. The output of the second carrier signal depends on the comparison result of the second comparing step.

As already described, a control signal generating device for generating a balise telegram can be set up by adding or modulating a received data signal onto a received carrier signal. For example, an adder circuit may be provided as a control signal generating device. Preferably, the balise control device may comprise the first control signal generating means. In particular, the first control signal generating device may be integrated in the balise control device. The first control signal generating device may be configured to generate a first balise telegram based on the first data signal and the second carrier signal. Alternatively or (preferably) in addition, the balise control device may comprise the second control signal generating device. In particular, the second control signal generating device can be integrated in the balise control device. The second control signal generating device may be configured to generate a second balise telegram based on the second data signal and the first carrier signal. By preferably integrating both control signal generating means in the balise control apparatus, a compact balise control circuit can be provided.

In order to obtain a particularly reliable comparison result, according to a further embodiment of the balise control device according to the application, the first comparator can be set up for bitwise comparison of the further second data signal generated by the first processing device and the second data signal generated by the second processing device. Alternatively or (preferably) in addition, the second comparator can be set up for bitwise comparison of the further first data signal generated by the second processing device and the first data signal generated by the first processing device. By comparing the respective bits of two data signals with each other, even a deviation in only one bit can be reliably detected. In particular, a comparison step may be performed sequentially (bit-by-bit) and in real time. This makes it possible for the outputting of a carrier signal to be interrupted immediately as soon as a deviation between two bits is detected, that is to say a negative comparison result is present. In other words, the carrier signal may be output from a processing device (only) as long as the result of the comparison is / remains positive.

According to a preferred embodiment of the balise control device according to the application, the first processing device may comprise a first carrier signal generator. The first carrier signal generator may be configured to generate the first carrier signal. In particular, the first carrier signal generator may be a sine-wave generator in order to generate a sine signal, in particular a sine voltage, as the first carrier signal. Alternatively or (preferably) in addition, the second processing device may comprise a second carrier signal generator. The second carrier signal generator may be configured to generate the second carrier signal. In particular, the second carrier signal generator may be a sine-wave generator in order to generate a sine signal, in particular a sine voltage, as the second carrier signal. Such a carrier signal may be used in addition to powering the corresponding balise.

Preferably, the first carrier signal generator may be arranged to output the first carrier signal only in the case of a positive comparison result (i.e., the compared second data signals are the same) of the first comparing step. Alternatively or (preferably) additionally, the second carrier signal generator may be arranged to output the second carrier signal only in the case of a positive comparison result (i.e., the compared first data signals are equal) of the second comparing step. In particular, the respective carrier signal generator can be communicatively connected to the respective comparator, such that at least when a negative comparison result is detected, the generation and / or outputting of the respective carrier signal is (immediately) interrupted or stopped.

Since the comparison of the data signals is preferably done bit by bit, a negative comparison result can also be caused by the fact that the processing devices are not working synchronously or the synchronicity of the processing devices has been lost due to a disturbance. According to an embodiment according to the application, therefore, the handshake method for synchronization described below can be carried out in the case of a negative comparison result, and then a renewed, previously described comparison step can be carried out. In a positive comparison result, the output of the carrier signal can be restarted. Preferably, the balise control device can be taken out of service, if in particular after several, eg. 10, synchronization attempts no positive comparison result was achieved.

According to a particularly preferred embodiment of the balise control device, the first processing device and the second processing device may be synchronized with one another. By temporally synchronizing the processing means, it can be ensured that in a comparison step the respectively mutually corresponding bits of the data signals are compared. For synchronization, a first request signal of the first processing device can be transmitted from the first processing device to the second processing device, in particular during initialization of the balise control device and / or when changing the signal concept and / or in the case of a negative comparison result. In addition, for synchronization, in particular a second acknowledgment signal of the second processing device of the second Processing means are transmitted to the first processing means. Alternatively or additionally, a second request signal of the second processing device can be transmitted from the second processing device to the first processing device. In addition, for synchronization, in particular a first acknowledgment signal of the first processing device can be transmitted from the first processing device to the second processing device.

Furthermore, it has been recognized that, for example due to a systematic error in a generation rule, both the first and second processing means may generate the same false data signal. In order to further increase the reliability and safety, it is proposed according to a further embodiment of the balise control device according to the application that the first processing device can comprise a first checker. The first checker can be set up to check the plausibility and / or to decode the second data signal generated by the second processing device. Alternatively or (preferably) additionally, the second processing device may comprise a second checker. The second checker may be configured to check the plausibility and / or decode of the first data signal generated by the first processing device. In the case of a plausibility check, the auditor can, in particular, check a generated data signal to determine whether its structure (for example, headers, checksums, certain bit sequences or the like) corresponds to the structure of a (standard) balise telegram. For this purpose, the examiner can divide the data signal to be checked in particular by a check polynomial, and if the polynomial division yields the result "zero", the structure of the checked data signal corresponds to the expected construction of a balise telegram. Alternatively or additionally, the verifier may in particular decode a generated data signal by means of decoding rules (e.g., at least one look-up table or the like) that may be stored in a processing device. In particular, the signal concept or a data record corresponding to the signal concept which was used for the generation of the data signal can be determined by the decoding. By means of this decoding, a check can be made as to whether a correct generation of a data signal has been carried out by a processing device.

Particularly preferably, the first processing device may comprise a first evaluation module. The first evaluation module can be set up to check whether the data checked by the first checker from the second data signal correspond to the structure of a balise telegram and / or whether they correspond to the provided second signal concept. Alternatively or (preferably) additionally, the second processing device may comprise a second evaluation module. The second evaluation module can be set up to check whether the data checked by the second checker from the first data signal correspond to the structure of a balise telegram and / or whether they correspond to the first signal concept provided. For example, the first checker may be configured to check by polynomial division the second data signal received from the second processing device as to whether it corresponds to the structure of a (standard) balise telegram. In addition, the first checker may be configured to decode the second data signal and to transmit the decoded data to the first evaluation module for comparison with the second signal concept. Checker Alternatively or (preferably), the second checker may be arranged to check by polynomial division the first data signal received from the first processing means as to whether it corresponds to the construction of a (standard) balise telegram. In addition, the second checker can be set up to decode the first data signal and to transmit the decoded data to the second evaluation module for comparison with the first signal concept. In a comparison, it can be determined whether the signal concept provided for the generation of a data signal is identical with the signal term determined by decoding the data signal. If intermediate data are generated during the generation of a data signal from a signal term in an intermediate step, these data can also be used for the check, in particular the comparison.

In the case of a positive comparison result, for example if the polynomial division delivers the value "zero" and / or if the respective signal terms (or intermediate data) are the same, a correct generation of the data signal by a processing device can be assumed. In the case of a negative comparison result, that is to say when a deviation between the respective signal terms (or intermediate data) is detected, a faulty operation of the balise control device can be inferred. In response to a negative comparison result, the output of a carrier signal may be interrupted by a processing device. Preferably, the output of the first and second carrier signals can be stopped. According to an embodiment according to the application, the handshake method for synchronization described below can be carried out in the case of a negative comparison result, and then a renewed comparison step can be carried out. In a positive comparison result, the outputting of the first and the second carrier signal can be restarted become. Preferably, the balise control device can be taken out of service, if in particular after several, eg. 10, synchronization attempts no positive comparison result was achieved.

As already described, a processing device may comprise at least one computing means for carrying out the generating step and / or the comparing step. Particularly preferably, a processing device may comprise at least one microprocessor and a Field Programmable Gate Array (FPGA) coupled thereto. According to one embodiment, at least the first comparator may be formed by a first field programmable gate array. Alternatively or (preferably) additionally, at least the second comparator can be formed by a second field programmable gate array. In addition, the calculation of the first data signal can be performed by a first generation module, which is at least partially formed by the first field programmable gate array. Alternatively or (preferably) in addition, the calculation of the second data signal can be performed by a second generation module which is at least partially formed by the second field programmable gate array. It is understood that the first FPGA may comprise a further second generation module configured to at least partially generate the further second data signal, and that the second FPGA may comprise a further first generation module configured to at least partially generate the further first data signal.

In particular, a processing device or a computer module can be divided into two parts. A processing device may preferably comprise a microprocessor with its own operating system and its own file system. Preferably (intermediate) data may be stored here, which correspond to the different signal terms. That For example, a microprocessor can read (intermediate) data (A) corresponding to the data content of a data signal or a data stream (A) which has to be generated for the associated balise A.

The (intermediate) data can be forwarded by the microprocessor to an FPGA. In particular, the FPGA can be set up to generate from this (intermediate) data a data signal, in particular a Manchester-modulated data signal.

The implementation of an FPGA has several advantages. For example, the bus width of a microprocessor is typically 32 or 64 bits. The transmission of a 1024-bit Manchester-encoded data signal would therefore require 16 or 32 processor steps. Preferably, the bus width of the FPGA may be programmed to be possible in 2 or 4 steps. Thus, the FPGA can process a data signal of e.g. Generate 564 kbit / s. In particular, this allows a generation of a data signal in real time.

A generated data signal can be fed from the respective FPGA into the respective other FPGA and be checked by this. In particular, an FPGA may comprise a comparator for comparing two data signals, preferably bitwise, with one another. Furthermore, an FPGA may include the carrier signal generator. Should the comparison of the two data signals result in a difference, the generation of the carrier signal can be adjusted, as described above.

A carrier signal digitally generated in an FPGA, e.g. a sine signal, may preferably be converted to an analog carrier signal by a digital to analog converter. The analog carrier signal can then in particular be low-pass filtered in order to filter disturbances. It goes without saying that a generated data signal can also be low-pass filtered in order to filter disturbances.

The two FPGAs are initially, in particular, two independently operating components, so that two first or two second data signals could not be generated or encoded synchronously without further ado.

Therefore, for synchronization between both FPGAs, according to a preferred embodiment, the following handshake method is proposed: When the balise control device is initialized (eg, turned on) and / or when a new first signal term is to be sent to the first balise, then the first FPGA generate a new first data signal. Also, the second FPGA must then generate a new further first data signal and perform the second comparison step (bit-by-for). The first FPGA sends a (first) request message to the second FPGA, with the content that a new first data signal is to be generated. As soon as the second FPGA is ready to generate a new further first data signal and receive the new first data signal (for comparison) from the first FPGA, it sends a (second) acknowledgment message to the first FPGA. Upon receipt of the acknowledgment message, the first FPGA sends a start signal, cyclically followed by the new first data signal; At the same time, the first FPGA cyclically sends the first clock signal. At the same time, the second FPGA also generates an equal start signal, followed by the new further first data signal at the rate of the first clock signal. The second FPGA leads these two data streams bit-synchronously to the second comparator, which now compares both data streams bit by bit in real time. A defined sequence of bits can preferably be used as the start signal, particularly preferably a sequence of a certain number of zeros, eg 75 zeros. In other words, the handshake method enables the balise control device to ensure bit-by-bit verification of the (new) first data signal in the second comparator even during initialization and / or when changing the first signal term.

It goes without saying that the handshake method can be carried out analogously and mirror-inverted if a new second signal concept is to be transmitted to the second balise.

Another aspect of the application is a system, in particular a balise control system. The system comprises at least one previously described balise control device. The system comprises a first balise, which is connected to the balise control device, in particular the first control signal generating device.

Preferably, the system may comprise a second balise, which is connected to the balise control device, in particular to the second control signal generating device.

According to one embodiment of the system according to the application, the system may comprise a data source, in particular an electronic interlocking and / or a light source and an optical detection device. The data source may be configured to generate (and provide) the first signal term and / or the second signal term. A (digital) signal concept can be generated by an electronic interlocking and transmitted via a data network to the balise control device. Also, a (digital) signal concept of an analog light signal with subsequent digitization in a trackside electronic unit (lineside electronic unit, LEU) can be generated, which forms the optical detection device.

In particular, the balise control device may be located near the rail, and thus near the first and / or second balises, preferably located on the rails (e.g., in the track bed), while the data source may be remotely located therefrom.

• - Generieren, durch eine erste Verarbeitungseinrichtung, eines ersten Datensignals, basierend auf einem bereitgestellten ersten Signalbegriff,
• - Generieren, durch eine zweite Verarbeitungseinrichtung, eines weiteren ersten Datensignals, basierend auf dem bereitgestellten ersten Signalbegriff,
• - Vergleichen, durch einen zweiten Vergleicher der zweiten Verarbeitungseinrichtung, des von der zweiten Verarbeitungseinrichtung generierten weiteren ersten Datensignals und des von der ersten Verarbeitungseinrichtung generierten ersten Datensignals in einem zweiten Vergleichsschritt,
• - Ausgeben, durch die erste Verarbeitungseinrichtung, des generierten ersten Datensignals an eine erste Steuersignalerzeugungseinrichtung, und
• - Ausgeben, durch die zweite Verarbeitungseinrichtung, eines zweiten Trägersignals an die erste Steuersignalerzeugungseinrichtung, wobei die Ausgabe des zweiten Trägersignals von dem Vergleichsergebnis des zweiten Vergleichsschritts abhängt.

Yet another aspect of the application is a method of operating a balise control device, particularly a previously described balise control device. The method comprises:

• Generating, by a first processing device, a first data signal based on a provided first signal term,
• Generating, by a second processing device, a further first data signal, based on the provided first signal concept,
• Comparing, by a second comparator of the second processing device, the further first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step,
• Outputting, by the first processing means, the generated first data signal to a first control signal generating means, and
• Outputting, by the second processing means, a second carrier signal to the first control signal generating means, wherein the output of the second carrier signal depends on the comparison result of the second comparing step.

• - Generieren, durch eine erste Verarbeitungseinrichtung, eines ersten Datensignals, basierend auf einem bereitgestellten ersten Signalbegriff, und eines zweiten Datensignals, basierend auf einem bereitgestellten zweiten Signalbegriff,
• - Generieren, durch eine zweite Verarbeitungseinrichtung, eines zweiten Datensignals, basierend auf dem bereitgestellten zweiten Signalbegriff, und Generieren eines ersten Datensignals, basierend auf dem bereitgestellten ersten Signalbegriff,
• - Vergleichen, durch einen ersten Vergleicher der ersten Verarbeitungseinrichtung, des von der ersten Verarbeitungseinrichtung generierten zweiten Datensignals und des von der zweiten Verarbeitungseinrichtung generierten zweiten Datensignals in einem ersten Vergleichsschritt,
• - Vergleichen, durch einen zweiten Vergleicher der zweiten Verarbeitungseinrichtung, des von der zweiten Verarbeitungseinrichtung generierten ersten Datensignals und des von der ersten Verarbeitungseinrichtung generierten ersten Datensignals in einem zweiten Vergleichsschritt,
• - Ausgeben, durch die erste Verarbeitungseinrichtung, des generierten ersten Datensignals an eine erste Steuersignalerzeugungseinrichtung und Ausgeben, durch die erste Verarbeitungseinrichtung, eines ersten Trägersignals an eine zweite Steuersignalerzeugungseinrichtung, wobei die Ausgabe des ersten Trägersignals von dem Vergleichsergebnis des ersten Vergleichsschritts abhängt, und
• - Ausgeben, durch die zweite Verarbeitungseinrichtung, des generierten zweiten Datensignals an die zweite Steuersignalerzeugungseinrichtung und Ausgeben, durch die zweite Verarbeitungseinrichtung, eines zweiten Trägersignals an die erste Steuersignalerzeugungseinrichtung, wobei die Ausgabe des zweiten Trägersignals von dem Vergleichsergebnis des zweiten Vergleichsschritts abhängt.

According to a preferred embodiment of the method according to the application, the method may comprise:

• Generating, by a first processing device, a first data signal, based on a provided first signal concept, and a second data signal, based on a provided second signal concept,
• Generating, by a second processing device, a second data signal based on the provided second signal term, and generating a first data signal based on the provided first signal term,
• Comparing, by a first comparator of the first processing device, the second data signal generated by the first processing device and the second data signal generated by the second processing device in a first comparison step,
• Comparing, by a second comparator of the second processing device, the first data signal generated by the second processing device and the first data signal generated by the first processing device in a second comparison step,
• Outputting, by the first processing means, the generated first data signal to a first control signal generating means and outputting by the first one Processing means, a first carrier signal to a second control signal generating means, wherein the output of the first carrier signal on the comparison result of the first comparison step depends, and
• Outputting, by the second processing means, the generated second data signal to the second control signal generating means and outputting, by the second processing means, a second carrier signal to the first control signal generating means, the output of the second carrier signal depending on the comparison result of the second comparing step.

The features of the balise control devices, systems and methods are freely combinable. In particular features of the description and / or the dependent claims, even with complete or partial circumvention of features of the independent claims, in isolation or freely combined with each other, be inventive in its own right.

• 1 eine schematische Ansicht eines Systems mit einer Balisensteuerungsvorrichtung gemäß dem Stand der Technik,
• 2 eine schematische Ansicht eines Ausführungsbeispiels einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung,
• 3 eine schematische Ansicht eines weiteren Ausführungsbeispiels einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung,
• 4 eine schematische Ansicht eines Ausführungsbeispiels eines Systems gemäß der vorliegenden Anmeldung,
• 5 eine schematische Ansicht eines Ausführungsbeispiels einer Verarbeitungseinrichtung einer Balisensteuerungsvorrichtung gemäß der vorliegenden Anmeldung, und
• 6 ein Diagramm eines Ausführungsbeispiels eines Verfahrens gemäß der vorliegenden Anmeldung.

There are now a variety of ways to design the application according to the balise control device, the system according to the application and the method according to the application and further develop. For this purpose, reference is made, on the one hand, to the claims subordinate to the independent claims, and, on the other hand, to the description of exemplary embodiments in conjunction with the drawing. In the drawing shows:

• 1 a schematic view of a system with a balise control device according to the prior art,
• 2 1 is a schematic view of an embodiment of a balise control device according to the present application;
• 3 1 is a schematic view of another embodiment of a balise control device according to the present application;
• 4 a schematic view of an embodiment of a system according to the present application,
• 5 a schematic view of an embodiment of a processing device of a balise control device according to the present application, and
• 6 a diagram of an embodiment of a method according to the present application.

Hereinafter, like reference numerals will be used for like elements.

The 2 shows a schematic view of an embodiment of a balise control device 202 according to the present application. The balise control device 202 includes a first processing device 250 and a second processing device 252 , In addition, the balise control device includes 202 in the present case, a first control signal generating device 266 ,

The first processing device 250 includes at least a first generation module 254 , The first generation module 254 is established based on a provided first (digital) signal term 232 a first data signal 236 to generate or code. The second processing device 252 includes another first generation module 260 , The further first generation module 260 is set up based on the provided first (digital) signal term 232 generate or code another first data signal.

In addition, the further processing device comprises 252 a second comparator 264 , The second comparator 264 is set up, the first, by the first processing means 250 generated data signal 236 to compare with the other first data signal in a second comparison step.

In addition, the second processing device 252 set up, a second carrier signal 240 , in particular a sinusoidal signal 240 to spend. In particular, the carrier signal 240 to the first control signal generating device 266 to get redirected. As can be seen, the first processing device 250 set up, the first data signal 236 to the first control signal generating device 266 issue. The first control signal generating means 266 is set up, the provided first data signal 236 to the provided second carrier signal 240 aufzuschalten, to a first Balisentelegramm 238 for a first (not shown) Balise to produce.

To ensure that only with a correct generation of the first data signal 236 a balis telegram 238 is generated and sent, is provided according to the application that the second processing device 252 is set up that second carrier signal 240 depending on the comparison result of the second comparison step. This is to be understood in particular that the second carrier signal 240 only in the case of a positive comparison result by the second processing device 252 is issued. In a negative comparison result, the output of the second carrier signal 240 especially stopped. In this case, a positive comparison result is present in particular if the first data signal 236 is equal to the further first data signal. A negative comparison result is given in particular when a deviation between the first data signal 236 and the further first data signal is detected. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a new comparison step can be carried out. In a positive comparison result, the output of the carrier signal 240 be started again. Preferably, the balise control device 202 taken out of service, if after several, eg 10, synchronization attempts no positive comparison result was achieved.

The 3 shows a schematic view of another embodiment of a balise control device 302 according to the present application. In order to avoid repetition, essentially only the differences from the exemplary embodiment will follow 2 described. For the other components of the balise control device 302 Reference is made in particular to the above statements.

In the present embodiment, the balise control device includes 302 a second control signal generating means 368 , The first processing device 350 includes next to the first generation module 354 another second generation module 356 and a first comparator 358 , The second processing device 352 includes next to the other first generation module 360 and the second comparator 364 a second generation module 362 , The advantage of the balise control device 302 of the present embodiment lies in that two balises (not shown) are provided by the balise control device 302 are controllable, without having to double the hardware used.

The illustrated balise control device 302 is set up, a first signal concept 332 for a first balise and a second signal concept 334 for a second balise and to process these in particular in parallel. Preferably, the further second generation module 356 , for example, parallel to the generation of the first data signal 336 based on the provided second signal term 334 to generate another second data signal. The second generation module 362 the second processing device 352 can be a second data signal 337 based on the provided second signal term 334 ,

To ensure that only with a correct generation of the second data signal 337 a second bali telegram 344 is generated and sent, it is provided in the present case that the first processing means 350 is set up that first carrier signal 342 in response to the comparison result of a first comparison step. In the first comparison step, the first comparator 358 in particular the second data signal 337 compare with the other second data signal. The first carrier signal 342 can in particular only with a positive comparison result by the first processing device 350 be issued. In a negative comparison result, the output of the first carrier signal 342 being stopped. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a new comparison step can be carried out. In a positive comparison result, the outputting of the first carrier signal 342 be started again. Preferably, the balise control device 302 taken out of service, if after several, eg 10, synchronization attempts no positive comparison result was achieved.

The 4 shows a schematic view of an embodiment of a system 400 according to the present application. The system 400 includes an embodiment of a balise control device 402 according to the present application. To avoid repetition, essentially only the differences from the exemplary embodiments according to FIGS 2 and 3 described. For the other components of the balise control device 402 Reference is made in particular to the above statements.

The system 400 also includes a data source 406 , It is understood that two or more data sources may be provided. The data source 406 is for example an electronic interlocking 406 or a trackside electronic unit (LEU). In particular, the data source 406 in the present case, at least a first digital signal concept 432 for a first balise 404 and a second digital signal term 434 for a second balise 405 to generate. Via a data network (eg CAN bus network) can / can the first and / or the second signal term 432 . 434 to the at least one balise control device 402 of the system 400 be transmitted.

As already described, the system includes 400 present a first balise 404 , in particular a transparent data balise 404 , and a second balise 405 , in particular a transparent data balise 405 , Every balise 404 . 405 is with the balise control device 402 connected via a data line.

Furthermore, from the 4 to recognize that a processing device 450 . 452 is essentially formed of two components, namely a microprocessor 470 . 474 and an FPGA 472 . 476 , Each FPGA 472 . 476 can with its own clock signal 482 . 484 be supplied. The functioning of the processing equipment 450 . 452 will be described in more detail below.

Based on a first signal concept 432 generates the first microprocessor 470 first (intermediate) data 478 , In particular, in the first microprocessor 470 , eg in its file system, first (intermediate) data are stored which correspond to first signal terms (eg in the form of a conversion table). The first (intermediate) data 478 will be forwarded to the first FPGA. The FPGA generates a first data signal from the first (intermediate) data 478 436 , The first data signal 436 in particular, a Manchester-encoded data signal 436 his. In particular, a first data signal 436 be generated with a stream of 564 kbps in real time.

The first data signal 436 is, by the first processing device 450 , to a first control signal generating device 466 in the form of an adder 466 via a first low-pass filter 492 output. The first low pass filter 492 has preferably a cutoff frequency of about 50 MHz.

Furthermore, the first data signal 436 to the second FPGA 476 the second processing device 452 output.

The second microprocessor 474 generated, based on the first signal term first (intermediate) data 478 and forwards these to the second FPGA 476 continue. The second FPGA 476 is set up, another first data signal from the first (intermediate) data 478 and this in particular with the first data signal 436 the first processing device 450 to compare. In particular, the second FPGA 476 configured to perform a bitwise comparison of the first two data signals.

The second comparison step, ie the bitwise comparison of the two first data signals in the second FPGA 476 to perform synchronously, a handshake method is proposed in the present embodiment, the initialization of the balise control device 400 and / or when changing the first signal term 432 and / or can be performed on a negative comparison result: the first FPGA 472 sends a first request message 494 to the second FPGA 476 , with the content that a new first data signal 436 should be generated. As soon as the second FPGA 476 is ready, in turn, to generate a new further first data signal and from the first FPGA 472 the new first data signal 436 (for comparison), it sends a second acknowledgment message 495 to the first FPGA 472 , Upon receipt of the second acknowledgment message 495 sends the first FPGA 472 first a start signal and then cyclically the new first data signal 436 and cyclically the first clock signal 486 , At the same time generates the second FPGA 476 also the start signal, cyclically followed by the new further first data signal, in time with the first clock signal 486 , The second FPGA 476 leads these two data streams bit-synchronously to the second comparator, which now compares both data streams bit by bit in real time. A defined sequence of bits can preferably be used as the start signal, particularly preferably a sequence of 75 zeros.

Depending on the comparison result of the second comparison step, by the second processing device 452 , a digital second carrier signal 440 output. In particular, the second carrier signal becomes 440 only issued with a positive comparison result. As can be seen, the second carrier signal 440 to a digital to analog converter 490 output. That through the digital analog converter 490 generated analog second carrier signal is sent to the first control signal generating means 466 via a second low-pass filter 493 forwarded.

The first control signal generating means 466 generates a first Balisentelegramm 438 by the first data signal 436 to the second analog carrier signal 440 is added up. Optionally, the balis telegram 438 through an amplifier 428 be strengthened.

Preferably parallel to the processing of the first signal term 432 may be the processing of the second signal term 434 by the present balise control device 402 be performed. The second processing device 452 generated, according to the previous statements, second (intermediate) data 480 and from this a second data signal 437 , This is sent to the second control signal generating device 468 and, together with a second clock signal 488 to the first processing device 450 outputting the second data signal in a first comparison step 437 to compare with the other second data signal. Only with a positive comparison result of the first comparison step can a first carrier signal 442 to the second control signal generating means 468 to output a second balise telegram in the manner previously described 444 to generate. For the synchronization of the first comparison step, the same handshake procedure as above for the synchronization of the described second comparison step, mirror image applied.

The respective Balisentelegramm 438 . 444 will be sent to the respective balise 404 . 405 transmitted via a data line. If a negative comparison result is detected, then the transmission of the corresponding carrier signal 440 . 442 stopped. This has the consequence that also the transmission of the corresponding Balisentelegramms 438 . 444 omitted. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a new comparison step can be carried out. In a positive comparison result, the output of the corresponding carrier signals 440 . 442 be started again. This has the consequence that also the transmission of the corresponding Balisentelegramms 438 . 444 is restarted. Preferably, the balise control device 402 taken out of service, if after several, eg 10, synchronization attempts no positive comparison result was achieved.

The 5 shows a schematic view of another embodiment of a first processing device 550 , in the 2 to 4 as processing equipment 250 . 350 . 450 can be used. A second processing device (corresponding to the processing devices 252 . 352 . 452 out 2 to 4 ) may be the same and is not shown for reasons of clarity. At this point, to avoid repetition, essentially only the differences from the previous exemplary embodiments are described below, and otherwise reference is made to the previous statements.

The first FPGA 572 is in this case via an interface 593 (eg a CPU interface) with the first microprocessor 570 or controller 570 connected. Among other things is the first FPGA 572 set up by the first microcontroller 570 first (intermediate) data 578 and second (intermediate) data 580 to obtain, each corresponding to a first signal term and a second signal term. With this data 578 . 580 a first balise (not shown) or a second balise (not shown) should be triggered. The data contents of the data 578 . 580 can in a storage area 594 (eg telegrams memory) are stored.

A first generation module 554 or a first encoder 554 can be the first data 578 from the store 594 and in another storage area 595 read out the stored generation rules to the first data signal 536 to generate. In the manner described above, the first data signal 536 to a first balise, depending on the comparison result of the second comparison step.

At the same time, this first data stream 536 , preferably together with the first clock signal 586 be sent to the second FPGA of the second processing device to be checked there in the manner described above. If the check in the second FPGA fails in the first data signal 536 gives, the output of the second carrier signal, which is generated in the second FPGA, can be turned off in real time.

Further, the present first FPGA is 572 set up, from the second processing device, ie in particular from the second FPGA, a second data signal 537 , preferably together with a second clock signal 588 the second processing device. With the second clock signal 588 can be another second generation module 556 or another second encoder 556 from second (intermediate) data 580 and in another storage area 596 stored generation rules generate a further second data signal, in particular calculate.

In a first comparison step, in a first comparator 558 , in this case the second data signal 537 and the further second data signal is compared bit by bit and in particular in real time with each other. If this comparison indicates a deviation, ie a negative comparison result is detected, the carrier signal generator 598 , in particular a sine-wave generator 598 , the first carrier signal 542 generated, be turned off. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a renewed first comparison step can be carried out. In a positive comparison result, the output of the corresponding carrier signals 542 be started again.

In other words, in the present case, the output of the first carrier signal 542 in particular be stopped in real time, if in the first comparison step an error has occurred. This can be achieved that the power supply of the second Balise is turned off. If the second balise is then driven by a rail vehicle, in particular it sends out a preset signal to the rail vehicle. This can detect the fault and initiate a correspondingly safe reaction.

Furthermore, it is possible that a (first or second) data signal was generated incorrectly in both processing devices (equal). The bitwise comparison of the two generated data signals would then show no deviation. For the detection of a such error can optionally be a first examiner 597 , preferably in the first FPGA 572 , be provided. In a corresponding manner, a second checker may be provided in the second processing device.

Again 5 can be seen in the first FPGA 572 not only two generated second data streams compared to each other, but preferably the second data stream 537 which can be received by the first FPGA from the second FPGA by the first controller 597 checked for plausibility or decoded or recalculated. In particular, the first examiner 597 in this case, the second data signal 537 check by polynomial division whether this corresponds to the construction of a (standard) balise telegram and / or the first examiner 597 can from the second data signal, the second (intermediate) data of the second signal term 534 determine. If the plausibility check and / or a comparison of the particular second (intermediate) data and that by the first microprocessor 570 generated second (intermediate) data shows an error, the output of the first carrier signal 542 be turned off.

The 6 shows a diagram of an embodiment of a method according to the present application. In the present case, in particular, a preferred embodiment is shown in which two balises can be controlled in parallel with the method. It is understood that in other variants of the application, only one balise can be controlled.

In step 601 For example, a first data signal based on a first signal term may be calculated by a first processing device. In addition, in this step, a further second data signal, based on a second signal concept, can be calculated by the first processing device, as described above.

For example, in parallel to this, in step 602 a second data signal, based on the second signal term, is calculated by a second processing means. In addition, the second processing device can generate a further first data signal in this step, based on the first signal concept.

In the steps 603 and 604 the first comparison step or the second comparison step can be carried out. In particular, the first processing device can compare the second data signal with the further second data signal in a first comparison step. The second processing device can compare the first data signal with the further first data signal in a second comparison step.

In step 605 For example, the first processing device may output the first data signal to the first control signal generating device and the first carrier signal to the second control signal generating device. The output of the first carrier signal in this case takes place as a function of the comparison result of the first comparison step. In a positive comparison result, the first carrier signal is output, while in a negative comparison result, the output is interrupted. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a renewed first comparison step can be carried out. In a positive comparison result, the output of the first carrier signal can be restarted. Preferably, the balise control device can be taken out of service, if after several, eg. 10, synchronization attempts no positive comparison result was achieved.

Similarly, in step 606 the second processing device outputs the second data signal to the second control signal generating device and the second carrier signal to the first control signal generating device. The output of the second carrier signal takes place as a function of the comparison result of the second comparison step. In a positive comparison result, the second carrier signal is output, while in a negative comparison result, the output is interrupted. Furthermore, in the case of a negative comparison result, the described handshake method for synchronization can be carried out and then a renewed second comparison step can be carried out. In a positive comparison result, the output of the second carrier signal can be restarted. Preferably, the balise control device can be taken out of service, if after several, eg. 10, synchronization attempts no positive comparison result was achieved.

Only when a carrier signal is output, the corresponding Balisentelegramm can be output to the corresponding Balise, as described above.

According to the application, provision is made in particular for a first data signal and a second data signal to be generated in each case in both processing devices, the two data signals representing the respective signal concept for the first balise and the second balise. Both data signals can be compared in one of the two processing devices, preferably in real time and bit by bit. If the comparison shows a deviation, the corresponding carrier signal or energy supply signal for the corresponding balise can be turned off and a signal-safe state can be established. This comparison and, if appropriate, switching off can be carried out in particular in real time during the generation of the data signals.

Claims (11)

A balise control device (202, 302, 402) for controlling at least one balise (404, 405), comprising: a first processing means (250, 350, 450, 550) arranged to generate a first data signal (236, 336, 436, 536) based on a provided first signal term (232, 332, 432, 532), a second processing device (252, 352, 452) configured to generate a further first data signal, based on the provided first signal concept (232, 332, 432, 532), wherein the second processing means (252, 352, 452) comprises a second comparator (264, 364, 464) arranged to compare the further first data signal generated by the second processing means (252, 352, 452) and that of the first processing means ( 250, 350, 450, 550) generated first data signal (236, 336, 436, 536) in a second comparison step, - wherein the first processing means (250, 350, 450, 550) for outputting the generated first data signal (236, 336, 436, 536) to a first control signal generating means (266, 366, 466) is arranged, and - wherein the second processing means (252, 352, 452) for outputting a second carrier signal (240, 340, 440) to the first control signal generating means (266, 366, 466) is arranged, wherein the output of the second carrier signal (240, 340, 440 ) depends on the comparison result of the second comparison step. Balise control device (202, 302, 402) according to Claim 1 characterized in that - the second processing means (252, 352, 452) is arranged to generate a second data signal (337, 437, 537) based on a provided second signal term (334, 434), - the first processing means (250, 350, 450, 550) is arranged to generate a further second data signal based on the provided second signal term (334, 434), wherein the first processing means (250, 350, 450, 550) comprises a first comparator (358, 458, 558 ) arranged to compare the further second data signal generated by the first processing device (250, 350, 450, 550) and the second data signal (337, 437, 537) generated by the second processing device (252, 352, 452) in a first Comparing step, - wherein the second processing means (252, 352, 452) is arranged to output the generated second data signal (337, 437, 537) to a second control signal generating means (368, 468), and - wherein the first processing means (250, 350, 450, 550) is arranged to output a first carrier signal (342, 442, 542) to the second control signal generating means (368, 468), the output of the first carrier signal (342, 442, 542) depends on the comparison result of the first comparison step. Balise control device (202, 302, 402) according to Claim 1 or 2 characterized in that - the balise control device (202, 302, 402) comprises the first control signal generating means (266, 366, 466) arranged to generate a first balise telegram (238, 338, 438) based on the first data signal (236 , 336, 436, 536) and the second carrier signal (240, 340, 440), and / or the balise control device (202, 302, 402) comprises the second control signal generating device (343, 442, 542), which is configured to generate a second balise telegram (344, 444) based on the second data signal (337, 437, 537) and the first carrier signal (342, 442, 542). A balise control device (202, 302, 402) according to any one of the preceding claims, characterized in that - the first comparator (358, 458, 558) is adapted to bitwise compare the one generated by the first processing means (250, 350, 450, 550) second data signal and the second data signal (337, 437, 537) generated by the second processing means (252, 352, 452), and / or the second comparator (264, 364, 464) is adapted for bitwise comparison of that from the second processing means (252, 352, 452) generated further first data signal and of the first processing means (250, 350, 450, 550) generated first data signal (236, 336, 436, 536). A balise control device (202, 302, 402) according to any one of the preceding claims, characterized in that - the first processing means (250, 350, 450, 550) comprises a first carrier signal generator (598) arranged to generate the first carrier signal (342, 442, 542), and / or - the second processing means (252, 352, 452) comprises a second carrier signal generator which is arranged to generate the second carrier signal (240, 340, 440). Balise control device (202, 302, 402) according to Claim 5 characterized in that - the first carrier signal generator (598) is arranged to output the first carrier signal (342, 442, 542) only in the case of a positive comparison result of the first comparison step, and / or - the second carrier signal generator is arranged to output the second carrier signal ( 240, 340, 440) only with a positive comparison result of the second comparison step. A balise control device (202, 302, 402) according to any one of the preceding claims, characterized in that - the first processing means (250, 350, 450, 550) and the second processing means (252, 352, 452) are synchronized with each other, - wherein for synchronization in particular, a first request signal (494) of the first processing device (250, 350, 450, 550) is transmitted from the first processing device (250, 350, 450, 550) to the second processing device (252, 352, 452), and / or - wherein, for synchronization, in particular a second acknowledgment signal (495) of the second processing device (252, 352, 452) is transmitted from the second processing device (252, 352, 452) to the first processing device (250, 350, 450, 550) , A balise control device (202, 302, 402) according to any one of the preceding claims, characterized in that - the first processing means (250, 350, 450, 550) comprises a first checker (597) arranged to check plausibility and / or Decoding the second data signal (337, 437, 537) generated by the second processing means (252, 352, 452), and / or - the second processing means (252, 352, 452) comprises a second checker arranged to check the plausibility and / or decoding the first data signal (236, 336, 436, 536) generated by the first processing means (250, 350, 450, 550). Balise control device (202, 302, 402) according to Claim 8 characterized in that - the first processing means (250, 350, 450, 550) comprises a first evaluation module arranged to check whether those decoded by the first checker (597) from the second data signal (337, 437, 537) Data corresponding to the provided second signal term (334, 434, 534), and / or - the second processing means (252, 352, 452) comprises a second evaluation module which is arranged to check whether the information provided by the second checker from the first data signal (236, 336, 436, 536) correspond to decoded data to the provided first signal term (232, 332, 432, 532). System (400) comprising: at least one balise control device (202, 302, 402) according to one of the preceding claims, - A first balise (404), which is connected to the balise control device (202, 302, 402,), in particular the first control signal generating means (266, 366, 466). Method for operating a balise control device (202, 302, 402), in particular a balise control device (202, 302, 402) according to one of Claims 1 to 9 comprising, by a first processing means (250, 350, 450, 550), a first data signal (236, 336, 436, 536) based on a provided first signal term (232, 332, 432, 532), - Generating, by a second processing means (252, 352, 452), another first data signal, based on the provided first signal term (232, 332, 432, 532), comparing, by a second comparator (264, 364, 464) the second processing means (252, 352, 452), the further first data signal generated by the second processing means (252, 352, 452) and the first data signal (236, 336, 436) generated by the first processing means (250, 350, 450, 550) , 536) in a second comparison step, outputting, by the first processing device (250, 350, 450, 550), the generated first data signal (236, 336, 436, 536), to a first control signal generating device (266, 366, 466), and - spend, dur ch the second processing means (252, 352, 452), a second carrier signal (240, 340, 440) to the first control signal generating means (266, 366, 466), wherein the output of the second carrier signal (240, 340, 440) from the comparison result of the second comparison step.

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