EP3504728A4 - Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays - Google Patents

Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays Download PDF

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Publication number
EP3504728A4
EP3504728A4 EP17844550.8A EP17844550A EP3504728A4 EP 3504728 A4 EP3504728 A4 EP 3504728A4 EP 17844550 A EP17844550 A EP 17844550A EP 3504728 A4 EP3504728 A4 EP 3504728A4
Authority
EP
European Patent Office
Prior art keywords
capacitive
film transistor
dimensional arrays
coupled non
transistor strings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP17844550.8A
Other languages
German (de)
French (fr)
Other versions
EP3504728A1 (en
Inventor
Eli Harari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sunrise Memory Corp
Original Assignee
Sunrise Memory Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/248,420 external-priority patent/US10121553B2/en
Application filed by Sunrise Memory Corp filed Critical Sunrise Memory Corp
Publication of EP3504728A1 publication Critical patent/EP3504728A1/en
Publication of EP3504728A4 publication Critical patent/EP3504728A4/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1434Memory
    • H01L2924/1435Random access memory [RAM]
    • H01L2924/1443Non-volatile random-access memory [NVRAM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
EP17844550.8A 2016-08-26 2017-08-25 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays Pending EP3504728A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/248,420 US10121553B2 (en) 2015-09-30 2016-08-26 Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays
PCT/US2017/048768 WO2018039654A1 (en) 2016-08-26 2017-08-25 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays

Publications (2)

Publication Number Publication Date
EP3504728A1 EP3504728A1 (en) 2019-07-03
EP3504728A4 true EP3504728A4 (en) 2020-09-09

Family

ID=61246301

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17844550.8A Pending EP3504728A4 (en) 2016-08-26 2017-08-25 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays

Country Status (5)

Country Link
EP (1) EP3504728A4 (en)
JP (2) JP7089505B2 (en)
KR (2) KR102513489B1 (en)
CN (1) CN109863575B (en)
WO (1) WO2018039654A1 (en)

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US10608011B2 (en) * 2017-06-20 2020-03-31 Sunrise Memory Corporation 3-dimensional NOR memory array architecture and methods for fabrication thereof
CN113169170B (en) 2018-12-04 2024-08-13 日升存储公司 Method for forming multi-layer horizontal NOR thin film memory strings
EP3953937A4 (en) * 2019-04-09 2022-12-14 Sunrise Memory Corporation Quasi-volatile memory device with a back-channel usage
KR20220031033A (en) * 2019-07-09 2022-03-11 선라이즈 메모리 코포레이션 Process for 3D Array of Horizontal NOR-type Memory Strings
WO2021048928A1 (en) * 2019-09-10 2021-03-18 キオクシア株式会社 Memory device
KR102676269B1 (en) * 2019-09-26 2024-06-19 에스케이하이닉스 주식회사 Semiconductor device
US11488858B2 (en) * 2019-10-29 2022-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming stacked layers and devices formed thereof
CN112825263B (en) * 2019-11-20 2024-08-13 合肥格易集成电路有限公司 NAND FLASH voltage control method and nonvolatile memory
US11251199B2 (en) * 2019-12-09 2022-02-15 Sandisk Technologies Llc Three-dimensional NOR array including active region pillars and method of making the same
US11580038B2 (en) 2020-02-07 2023-02-14 Sunrise Memory Corporation Quasi-volatile system-level memory
CN111326864B (en) * 2020-03-13 2021-06-18 天津大学 Coupling differential feed double compression mode patch antenna and solar cell integration
JP2021150486A (en) 2020-03-19 2021-09-27 キオクシア株式会社 Semiconductor storage device
US11653500B2 (en) * 2020-06-25 2023-05-16 Taiwan Semiconductor Manufacturing Co., Ltd. Memory array contact structures
US11985825B2 (en) 2020-06-25 2024-05-14 Taiwan Semiconductor Manufacturing Co., Ltd. 3D memory array contact structures
US11532343B2 (en) 2020-06-26 2022-12-20 Taiwan Semiconductor Manufacturing Co., Ltd. Memory array including dummy regions
US11600520B2 (en) 2020-06-26 2023-03-07 Taiwan Semiconductor Manufacturing Co., Ltd. Air gaps in memory array structures
US11495618B2 (en) 2020-07-30 2022-11-08 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional memory device and method
JP7539323B2 (en) 2021-01-27 2024-08-23 サンライズ メモリー コーポレイション Storage device and manufacturing method thereof
CN112909015B (en) * 2021-03-08 2023-10-17 中国科学院微电子研究所 NOR type memory device, method of manufacturing the same, and electronic apparatus including the same
KR102429142B1 (en) * 2021-07-22 2022-08-03 란데몬 에스피. 제트 오.오. Method and apparatus for highly effective on-chip true random number generator utilizing beta decay
CN113782070B (en) * 2021-09-02 2024-05-28 西安紫光国芯半导体有限公司 Self-powered nonvolatile programmable chip and memory device
CN118160426A (en) * 2021-12-16 2024-06-07 铠侠股份有限公司 Semiconductor memory device with a memory cell having a memory cell with a memory cell having a memory cell
WO2024060021A1 (en) * 2022-09-20 2024-03-28 华为技术有限公司 Three-dimensional memory array, memory, and electronic device

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Also Published As

Publication number Publication date
JP7089505B2 (en) 2022-06-22
KR102513489B1 (en) 2023-03-23
CN109863575B (en) 2024-01-30
KR102626193B1 (en) 2024-01-18
JP2022123017A (en) 2022-08-23
CN109863575A (en) 2019-06-07
WO2018039654A1 (en) 2018-03-01
JP7379593B2 (en) 2023-11-14
JP2019526934A (en) 2019-09-19
EP3504728A1 (en) 2019-07-03
WO2018039654A4 (en) 2018-04-19
KR20230042417A (en) 2023-03-28
KR20190057065A (en) 2019-05-27

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