EP3398410B1 - Optoelektronische schaltung mit leuchtdioden - Google Patents

Optoelektronische schaltung mit leuchtdioden Download PDF

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Publication number
EP3398410B1
EP3398410B1 EP16829297.7A EP16829297A EP3398410B1 EP 3398410 B1 EP3398410 B1 EP 3398410B1 EP 16829297 A EP16829297 A EP 16829297A EP 3398410 B1 EP3398410 B1 EP 3398410B1
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EP
European Patent Office
Prior art keywords
circuit
module
light
elementary electronic
terminal
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EP16829297.7A
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English (en)
French (fr)
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EP3398410A1 (de
Inventor
Frédéric MERCIER
Xavier Hugon
Philippe Gilet
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Aledia
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Aledia
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10—Controlling the intensity of the light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits
    • H05B45/44—Details of LED load circuits with an active control inside an LED matrix
    • H05B45/48—Details of LED load circuits with an active control inside an LED matrix having LEDs organised in strings and incorporating parallel shunting devices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • H05B47/155—Coordinated control of two or more light sources
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • H05B47/175—Controlling the light source by remote control
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/10—Controlling the intensity of the light
    • H05B45/12—Controlling the intensity of the light using optical feedback

Definitions

  • the present description relates to an optoelectronic circuit, in particular an optoelectronic circuit comprising light emitting diodes.
  • An example relates to the supply of an optoelectronic circuit comprising light-emitting diodes with an alternating voltage, in particular a sinusoidal voltage, for example the voltage of the mains.
  • the figure 1 represents an example of an optoelectronic circuit 10 comprising input terminals IN 1 and IN 2 between which an alternating voltage V IN is applied.
  • the optoelectronic circuit 10 further comprises a rectifier circuit 12 comprising a diode bridge 14, receiving the voltage V IN and supplying a rectified voltage V ALIM which supplies N sets in series of elementary light-emitting diodes, called global light-emitting diodes D i , where i is an integer varying from 1 to N.
  • the optoelectronic circuit 10 comprises a current source 22, one terminal of which is connected to node A 2 and the other terminal of which is connected to a node A 3 .
  • Circuit 10 comprises a device 24 for switching the overall light-emitting diodes D i , i varying from 1 to N.
  • the switching device 24 makes it possible to gradually increase the number of overall light-emitting diodes receiving the supply voltage V ALIM during an increasing phase of the supply voltage V ALIM and of progressively reducing the number of overall light-emitting diodes receiving the supply voltage V ALIM during a decreasing phase of the supply voltage V ALIM . This makes it possible to reduce the period during which no light is emitted by the optoelectronic circuit 10.
  • the device 24 comprises N controllable switches SW 1 to SW N.
  • Each switch SW i , i varying from 1 to N, is mounted between node A 3 and the cathode of the overall light-emitting diode D i and is controlled by a control module 26 as a function of signals supplied by a sensor 28.
  • the order of closing and opening of the switches SW i is fixed by the structure of the optoelectronic circuit 10 and is repeated for each cycle of the supply voltage V ALIM .
  • the figure 2 is a timing diagram of the supply voltage V ALIM in the case where the alternating voltage V IN corresponds to a sinusoidal voltage and for an example in which the optoelectronic circuit 10 comprises four global light-emitting diodes D 1 , D 2 , D 3 and D 4 .
  • Phase P 1 represents the conduction phase of the overall light-emitting diode D 1 .
  • Phase P 2 represents the conduction phase of the overall light-emitting diode D 2 .
  • Phase P 3 represents the conduction phase of the overall light-emitting diode D 3 .
  • Phase P 4 represents the conduction phase of the overall light-emitting diode D 4 .
  • a drawback of optoelectronic circuit 10 is that the duration of light emission is not the same for each overall light emitting diode. Therefore, the life of the overall light emitting diode which emits light most often may be less than the life of the overall light emitting diode which emits light least often. Furthermore, depending on the configuration of the optoelectronic circuit 10, an observer can perceive an inhomogeneity of the light power emitted by the optoelectronic circuit 10.
  • the figure 3 shows, partially and schematically, a top view of the optoelectronic circuit 10 comprising a zone 30 in which the overall light-emitting diodes D 1 to D 4 are made and a zone 32 in which the other elements of the optoelectronic circuit 10 are made.
  • the overall light-emitting diodes D 1 to D 4 are substantially aligned and arranged next to each other.
  • an observer can perceive, in particular when the overall light-emitting diodes are spaced apart, a light power emitted by the zone 30 of the optoelectronic circuit 10 which is greater on the side of the overall light-emitting diode D 1 , of which the duration of light emission is greater than on the side of the overall light-emitting diode D 4 , whose light emission duration is the smallest.
  • An object of an embodiment is to overcome all or part of the drawbacks of the optoelectronic circuits described above comprising overall light-emitting diodes and a device for switching light-emitting diodes.
  • Another object of an embodiment is to improve the homogeneity of light emission by the optoelectronic circuit.
  • Another object of an embodiment is to increase the life of the overall light emitting diode which emits the light the longest.
  • Another object of an embodiment is to reduce the bulk of the optoelectronic circuit.
  • Another object of an embodiment is that the number of overall light emitting diodes of the optoelectronic circuit can be changed in a simple manner.
  • Another object of an embodiment is that the order of activation of the overall light emitting diodes can be changed in a simple manner.
  • one embodiment provides an optoelectronic circuit according to claim 1.
  • the integrated circuit chip of each elementary electronic circuit further comprises a communication circuit containing a modulation circuit suitable for supplying a first modulated signal and a demodulation circuit. adapted to supply a second signal by demodulation of the first signal, the control circuit of the light-emitting diode being adapted to activate or inhibit the light-emitting diode from the second signal.
  • each elementary electronic circuit comprises a control circuit suitable for supplying an activation or deactivation signal to the other elementary electronic circuits.
  • the optoelectronic circuit is intended to receive a variable voltage.
  • the control circuit of the light-emitting diode is adapted to activate or inhibit the light-emitting diode according to the activation or deactivation signal, from which it follows that the number of activated light-emitting diodes depends on the value of variable voltage.
  • each elementary electronic circuit comprises a current source connected to the light-emitting diode.
  • the integrated circuit chip of each elementary electronic circuit further comprises a circuit for detecting a master or slave state of the elementary electronic circuit when the elementary electronic circuit is in operation.
  • the optoelectronic circuit comprises several elementary electronic circuits connected in series.
  • At least one of the elementary electronic circuits is suitable for transmitting data to other elementary electronic circuits, called slave circuits, so that the light-emitting diodes are activated randomly or according to a given succession.
  • each elementary electronic circuit further comprises a first terminal.
  • the optoelectronic circuit comprises a sensor connected to the first terminal of one of the elementary electronic circuits, and the intensity of the current supplied by the current source of the master circuit depends on a third signal supplied by the sensor.
  • the optoelectronic circuit comprises several elementary electronic circuits connected in parallel.
  • the first signal corresponds to a modulation of the supply current of the light-emitting diode.
  • each elementary electronic circuit further comprises a second terminal.
  • the second signal corresponds to a modulated current supplied by the modulation circuit to the second terminal which is different from the supply current of the light-emitting diode, or the second signal corresponds to the potential at said terminal.
  • the optoelectronic circuit further comprises a third terminal, the demodulation circuit being adapted to receive the second signal via the third terminal.
  • the third terminal of each elementary electronic circuit is connected to a conductive line via a capacitor.
  • each elementary electronic circuit further comprises a fourth terminal and a copying circuit connecting the third terminal and the fourth terminal and adapted to supply the demodulation circuit with a copy of the current flowing between the third and fourth terminals.
  • the elementary electronic circuits are connected in series according to a succession of elementary electronic circuits.
  • the fourth terminal of the elementary electronic circuit is connected to the third terminal of the preceding elementary electronic circuit of the succession.
  • each elementary electronic circuit comprises less than five light-emitting diodes.
  • the same elements have been designated by the same references in the various figures and, moreover, the various figures are not drawn to scale.
  • the terms “substantially”, “approximately” and “of the order of” mean “to within 10%”.
  • the term “binary signal” is used to mean a signal which alternates between a first constant state, for example a low state, denoted "0", and a second constant state, for example a high state, denoted "1".
  • the high and low states of different binary signals of the same electronic circuit can be different.
  • the binary signals may correspond to voltages or currents which may not be perfectly constant in the high or low state.
  • connection is used to denote a direct electrical connection, without an intermediate electronic component, for example by means of a conductive track, and the term “coupled” or the term “connected”, to denote either a direct electrical connection (meaning then "connected") or a connection via one or more intermediate components (resistance, capacitor, etc.).
  • the optoelectronic circuit has a modular structure and comprises several modules, also called elementary electronic circuits, connected to each other.
  • the modules are not connected to a common node connected to a source of a low reference potential, for example the ground of the optoelectronic circuit.
  • each module is connected only to one or two other modules and has a floating mass.
  • Each module includes a diode overall electroluminescent and electronic circuit.
  • the overall light-emitting diode corresponds to a first integrated circuit chip and the electronic circuit corresponds to a second integrated circuit chip, the first and second chips being mounted on a printed circuit or integrated in the same package.
  • the modules all have the same structure. This advantageously makes it possible to easily add a module to the optoelectronic circuit or to easily remove a module from the optoelectronic circuit.
  • the electronic circuit comprises a control circuit for the overall light-emitting diode, for example an activation / inhibition circuit for the overall light-emitting diode.
  • the electronic circuits of the modules make it possible to activate or inhibit the overall light-emitting diodes as a function of the value of the supply voltage of the optoelectronic circuit according to a selection sequence.
  • the electronic circuits of the modules are adapted to communicate with each other, for example for the transmission of the selection sequence of the light-emitting diodes as a function of the supply voltage.
  • the modules can be connected to each other so that the overall light emitting diodes can be connected in series and / or in parallel.
  • the number of light-emitting diodes which are activated varies automatically as a function of the value of the supply voltage.
  • the sequence for selecting the light-emitting diodes as a function of the supply voltage is a random or pseudo-random sequence.
  • the optoelectronic circuit comprises at least one set of several modules mounted in series, the diode selection sequence
  • the overall electroluminescent of the modules of this set is controlled by only one of the modules of this set, called the master module, the other modules of this set being called slave modules.
  • each module is capable of being a master module or a slave module and the configuration of each module as a master module or as a slave module is obtained automatically, for example by the way in which the module is connected to the other modules in the optoelectronic circuit.
  • each module comprises a current source for supplying the light-emitting diode of the module.
  • a current source for supplying the light-emitting diode of the module.
  • only the current source of the master module is activated.
  • control circuit is adapted to modify the intensity of the current supplied by the current source, for example from a setpoint received by the module.
  • the optoelectronic circuit comprises several modules emitting lights of different colors, one of these modules being suitable for controlling the other modules for controlling the overall color emitted by all the modules.
  • the circuits of the module 40 can correspond in whole or in part to dedicated circuits. However, at least some of these circuits may include a processor adapted to execute a computer program stored in a memory.
  • Terminal Vdd is intended to be connected to a source of high potential and terminal Gnd is intended to be connected to a source of low potential.
  • Each module 40 has a local ground insofar as the potentials in a module 40 are referenced with respect to the potential at the terminal Gnd of this module 40.
  • the electrical connections between the circuit 50 and the other circuits of the module 40 are not not shown.
  • the connections between the circuits of the module 40 and the terminals Vdd and Gnd are not shown.
  • each module 40 comprises at least one capacitor which is charged each time the global light-emitting diode D is on and the circuit 50 (Bandgap & supplies) supplies the supply voltages / currents of the various circuits of the module. 40 from the energy stored in the capacitor. The Vdd terminal may then not be present.
  • the overall light-emitting diode D comprises at least one elementary light-emitting diode and is preferably made up of the placing in series and / or in parallel of at least two elementary light-emitting diodes.
  • Each module 40 may correspond to a single integrated circuit chip or comprise two integrated circuit chips or more than two integrated circuit chips. Each module 40 corresponds to a separate elementary electronic circuit and all the components of the module 40 are contained in the same housing. In in particular, the overall light-emitting diode D and the integrated circuit chip or the integrated circuit chips comprising the circuits 44, 46, 48 and 50 are contained in the same package.
  • the control circuit 44 comprises a circuit 51 (System Control Unit) for controlling the module 40, referred to below as a selection circuit.
  • the selection circuit 51 is adapted to select the “master” or “slave” state of the module 40 and to supply a signal S3 to the control circuit 46 representative of the fact that the module 40 operates as a master module or as a slave module. .
  • the selection circuit 51 is adapted to determine whether the current source 42 of module 40 is in operation. When the current source 42 is in operation, the selection circuit 51 provides for example a signal S3 at "1", which means that the module 40 operates as a master module.
  • the selection circuit 51 When the current source 42 is not in operation, the selection circuit 51 provides for example a signal S3 at "0", which means that the module 40 operates as a slave module.
  • the optoelectronic circuit 10 comprises a voltage sensor 52 (Vsense) connected to the selection circuit 51 and adapted to measure the potential at the terminal CS.
  • the selection circuit 51 is suitable for controlling the intensity I CS of the current supplied by the current source 42.
  • the selection circuit 51 is suitable for providing a current setpoint. current I CS to a current control circuit 53 (Current Control) which converts the setpoint into a control signal for the current source 52.
  • Current Control Current Control
  • Each module 40 can furthermore comprise the terminal S which is connected to the selection circuit 51.
  • a circuit external to the modules 40 for example a sensor, not shown in figure 4 , can be connected to terminal S.
  • the setpoint of current I CS supplied by circuit 51 may depend on the signal received by circuit 51 by terminal S.
  • the selection circuit 51 receives a measurement signal S4 supplied by a sensor 54 (Vsense).
  • the sensor 54 is a voltage sensor adapted to measure the voltage at the cathode of the overall light-emitting diode D.
  • the selection circuit 51 is adapted to supply the signal S1 which is representative of the light-emitting diodes of the optoelectronic circuit. to activate / deactivate.
  • the communication circuit 48 comprises a modulation circuit 58 (Modulation Unit) receiving the signal S1 supplied by the control circuit 44 and a demodulation circuit 60 (Demodulation Unit) supplying the signal S2 to the control circuit 46.
  • the modulation circuits 58 and demodulation 60 implement modulation / demodulation steps so that the signal S2 is, like the signal S1, representative of the light-emitting diodes of the optoelectronic circuit to be activated / inhibited.
  • the control circuit 46 comprises a control circuit 62 (Switch Control) receiving the signal S2 and the signal S3 and supplying a control signal S5 to a switch 64 mounted at the terminals of the overall light-emitting diode D.
  • the signal S5 is a binary signal and the switch 64 is open when the signal S5 is in a first state, for example the low state, and the switch 64 is closed when the signal S5 is in a second state, for example high state.
  • Each switch 64 is, for example, a switch based on at least one transistor, in particular a field effect transistor with a metal-oxide gate or MOS transistor, with enrichment (normally closed) or depletion (normally open).
  • each switch 64 corresponds to a MOS transistor, for example N-channel transistor, the drain of which is connected to the anode of the overall light-emitting diode D, the source of which is connected to the cathode of the global light-emitting diode D and the gate of which receives the signal S5.
  • MOS transistor for example N-channel transistor
  • the modulation / demodulation step implemented by the communication circuit 48 comprises the modulation of the current I CS supplied by the current source 42.
  • the modulation circuit 58 is then adapted to control the source. current 42 to modulate the current I CS supplied by the current source 42.
  • the communication circuit 48 further comprises a circuit 66 for detecting the modulation of the current I CS comprising a diode 68 connected in series between the terminal A and the anode of the global light-emitting diode D and a sensor 70 of the voltage across the terminals of the diode 68, supplying a signal S6 to the demodulation circuit 60.
  • the figure 5 represents an embodiment of an optoelectronic circuit 80 comprising N modules 40 such as represented in figure 4 , where N is an integer between 2 and 200, three modules 40 being represented by way of example in figure 5 .
  • the modules 40 correspond to distinct elementary circuits.
  • the housings of the modules 40 are distinct.
  • the optoelectronic circuit 80 comprises a succession of modules 40 mounted in series between a node A 1 and a node A 2 , the module at the first position of the succession being that connected to node A 1 and the module at the last position of the succession being that connected to node A 2 .
  • a supply voltage V ALIM is applied between the nodes A 1 and A 2 .
  • the supply voltage V ALIM can correspond to the oscillating voltage supplied by a rectifier circuit.
  • the supply voltage can be a direct voltage, for example a substantially constant voltage.
  • terminal Vdd is connected to node A 1 by a resistor 82 which may be identical or different depending on the modules 40.
  • the value of each resistor 82 is chosen so that, for each module 40, the potential at the terminal Vdd is within a range of values suitable for correct operation of the circuit 50 for supplying the supply voltages / currents of the components of the module 40.
  • the modules 40 are connected to each other so that there is only one master module, shown by way of example in the last position in figure 5 .
  • the operation of the optoelectronic circuit 80 is as follows.
  • the selection circuit 51 of each module 40 determines whether the CS terminal is left floating. If this is the case, the selection circuit 51 transmits an inhibition signal S3 to the control circuit. command 46 and the module considered operates as a slave module.
  • the selection circuit 51 transmits an activation signal S3 to the control circuit 46 and the module considered operates as a master module.
  • the detection of whether the CS terminal is floating or not can be performed by comparing the potential at the CS terminal and the potential at the Gnd terminal. If the potentials are equal, this means that the CS terminal is not floating and if the potentials are different, this means that the CS terminal is left floating.
  • the control circuit 44 of the master module controls the modulation circuit 58 to transmit data by modulating the current I CS .
  • the modulation of the current I CS can be a modulation of any type, for example an amplitude modulation and / or a frequency modulation.
  • the modulation circuit 58 of each slave module remains inactive.
  • the demodulation circuit 60 of each module is suitable for receiving the data transmitted by demodulation of the current I CS and the driving circuit 62 is suitable for controlling the opening or closing of the switch 64 as a function of the data received.
  • the data supplied by the master module and transmitted to each slave module by modulation of the current I CS can be representative of an order of activation of the overall light-emitting diodes during the evolution of the voltage of supply V ALIM , for example during each cycle of voltage V ALIM in the case of a voltage V ALIM varying periodically.
  • This activation order can be modified over time so that the order of activation of the overall light-emitting diodes is not always the same for each cycle of the supply voltage V ALIM .
  • the order of activation of the global light-emitting diodes can be random.
  • each module is associated with a unique identifier and the data supplied by the master module include in particular a succession of identifiers.
  • the list of identifiers can be stored in a memory of the control circuit 46.
  • a slave module receives the identifier associated with it, it changes the state of the switch 64, to open to closed or closed to open.
  • FIGS. 6 and 7 are figures analogous to figures 4 and 5 respectively of another embodiment of a module 90 and of an optoelectronic circuit 95 comprising several examples of the module 90.
  • the elements common between the module 40 and the module 90 are designated by the same references.
  • the module 90 comprises all the elements of the module 40 with the difference that there is no modulation of the current I CS by the modulation circuit 58 and that the modulation circuit 58 is adapted to supply a modulated current I mod to an I_ctrl terminal.
  • the module 90 further comprises two terminals I_ctrl_in and I_ctrl_out and the communication circuit 48 comprises a copy circuit 96 connected to the terminals I_ctrl_in and I_ctrl_out and linked to the demodulation circuit 60 and adapted to supply a copy of the current flowing between the terminals I_ctrl_in and I_ctrl_out to demodulation circuit 60.
  • the transmission of data between the master module and the slave modules is carried out by a modulation of the current I mod which is transmitted on a conductive line dedicated by the master module to the slave modules.
  • the connection of the terminals A, K, Vdd and Gnd of each module 90 is identical to what has been described previously for the module 40 in relation to the figure 5 with the difference that the master module is preferably placed in the last position, that is to say connected to node A 2 .
  • the I_ctrl terminal of the master module is connected to the I_ctrl_in terminal of the master module and the I_ctrl_out of the master module is connected to the I_ctrl_in terminal of the preceding slave module in the succession of modules.
  • the I_ctrl terminal is not used. She is left floating or fixed at a neutral potential adequate for the operation of the circuit.
  • the I_ctrl_in terminal is connected to the I_ctrl_out terminal of the next module in the succession of modules and the I_ctrl_out terminal is connected to the I_ctrl_in terminal of the previous module in the succession of modules, with the exception of the slave module in the first position whose terminal I_ctrl_out is connected to node A 1 or Vdd via a resistor.
  • the operation of the optoelectronic circuit 95 is as follows.
  • the role of master module or slave module is determined as described above for optoelectronic circuit 80.
  • modulation circuit 58 of the master module under the control of selection circuit 51, modulates current I mod to transmit data by modulating the current I mod .
  • the modulation of the current I mod can be of any type, for example an amplitude modulation and / or a frequency modulation.
  • the modulation circuit 58 of each slave module remains inactive.
  • the current I mod flows from module to module by passing through the feedback circuit 96 of each module 90.
  • the feedback circuit 96 of each module 90 supplies a copy of the current I mod to the demodulation circuit 60.
  • the demodulation circuit 60 of each module is suitable for receiving the data transmitted by demodulation of the current I mod and the control circuit 62 is suitable for controlling the opening or closing of the switch 64 as a function of the data received.
  • An advantage of the present embodiment is that the modulation of the current I mod by the modulation circuit 58 of the master module can be implemented more simply than the modulation of the current I CS in the embodiment described above in relation to the figures 4 and 5 . Indeed, the impedance seen by the current source 42, due to the overall light-emitting diodes of all the modules is higher than the impedance seen by the modulation circuit 58 due to the feedback circuits 96. In addition, the modulation does not affect the light emitted.
  • the figures 8 and 9 are figures analogous to figures 4 and 5 respectively of another embodiment of a module 100 and of an optoelectronic circuit 105 comprising several examples of the module 100.
  • the elements common between the module 100 and the module 90 are designated by the same references.
  • the module 100 comprises all the elements of the module 90 with the difference that the terminal I_ctrl_out is not present and that the terminal I_ctrl_in is connected directly to the demodulation circuit 60.
  • the data transmission between the master module and the slave modules is carried out by high frequency modulation of the potential at the I_ctrl terminal.
  • each module 100 The connection of the terminals A, K, Vdd and Gnd of each module 100 is identical to what was described previously for the module 40 in relation to the figure 5 .
  • the I_ctrl terminal is left floating.
  • the I_ctrl_in terminal is connected to a conductive line 106 by a capacitor 108.
  • the I_ctrl terminal of the master module is connected to the conductive line 106 by a capacitor 109.
  • the operation of the optoelectronic circuit 105 is as follows.
  • the role of master module or slave module is determined as described above for optoelectronic circuit 80.
  • modulation circuit 58 of the master module under the control of selection circuit 51, varies the potential. to the I_ctrl terminal to transmit data to the slave modules.
  • the variations of the potential at the I_ctrl terminal are reproduced at the I_ctrl_in terminals of each slave module by capacitive coupling.
  • the potential modulation at the I_ctrl terminal can be of any type, for example amplitude modulation and / or frequency modulation.
  • the modulation circuit 58 of each slave module remains inactive.
  • the demodulation circuit 60 of each module is adapted to receive the data transmitted to the terminal I_ctrl_in and the control circuit 62 is suitable for controlling the opening or closing of the switch 64 as a function of the data received.
  • each control circuit 46 is, moreover, adapted to modulate the potential at the terminal I_ctrl_in. Bidirectional communication can then be implemented between the master module and the slave modules.
  • the supply of the signal S3 from the control circuit 44 to the control circuit 46 makes it possible to facilitate the setting up of a bidirectional communication protocol between the master module and the slave modules, in particular concerning the priorities of access to the communication channel.
  • An advantage of the present embodiment is that the data transmission between the modules is carried out by capacitive coupling and therefore allows the implementation of a bidirectional communication between the master module and each slave module, the performance of which does not depend on the position. relative in the succession of modules between the master module and the slave module.
  • each slave module can signal itself to the master module, for example when the optoelectronic circuit is started.
  • the activation sequence of the light-emitting diodes then being adapted by the master module as a function of the number of slave modules. This makes it possible to modify in a simple manner the number of modules of the optoelectronic circuit 105.
  • the exchange of data between the master module and each slave module is carried out by a single wire link.
  • the transmission of data from the master module to each slave module is carried out using a two-wire link, corresponding, for example, to an I 2 C or other bus.
  • FIGS. 10 and 11 are figures analogous to figures 8 and 9 respectively of another embodiment of a module 110 and an optoelectronic circuit 115 comprising several examples of module 110.
  • the elements common between the module 110 and the module 100 are designated by the same references.
  • the module 110 comprises all the elements of the module 100 with the difference that the module 110 comprises an additional terminal MS and that the selection circuit 51 of the module 110 is connected to the terminal MS instead of being connected to the terminal CS as is the case for module 100.
  • the transmission of data between the master module and the slave modules can be carried out as has been described previously for the module 100.
  • the transmission of data between the master module and the slave modules can be implemented as has been described for module 40 or module 90.
  • terminals A, K, CS, K, Vdd and Gnd of each module 110 is identical to what has been described previously for module 40 in relation to figure 5 .
  • the MS terminal is left floating.
  • the MS terminal is connected to the CS terminal.
  • the selection circuit 51 of each module 40 determines whether the terminal MS is left floating or at a neutral potential other than GND. If this is the case, the selection circuit 51 transmits an inhibition signal S3 to the control circuit 46 and the module considered operates as a slave module. When the terminal MS is detected as not being left floating, the selection circuit 51 transmits an activation signal S3 to the control circuit 46 and the module considered operates as a master module.
  • the figure 12 is a figure similar to the figure 4 of another embodiment of a module 120 comprising light emitting diodes.
  • the module 120 has the same structure as the module 40 with the difference that certain elements are present in triplicate.
  • the module 120 comprises three overall light-emitting diodes D 1 , D 2 and D 3 .
  • the light-emitting diodes D 1 , D 2 and D 3 can be adapted to emit light radiation at different wavelengths, for example in red, green and blue respectively.
  • the control circuit 62 is suitable for separately controlling each switch 64 1 , 64 2 and 64 3 .
  • the selection circuit 51 receives the signals supplied by the sensors 52 1 , 52 2 and 52 3 and the signals supplied by the sensors 54 1 , 54 2 and 54 3 .
  • the rules for connecting the modules 120 to each other are the same as those described above for the terminals A, CS and K, considering separately the set of terminals A 1 , CS 1 and K 1 , l 'set of terminals A 2 , K 2 and CS 2 and the set of terminals A 3 , CS 3 and K 3 , each set being referenced to the associated terminal Gnd.
  • the overall light-emitting diodes D 1 of the modules 120 are then connected in series, the overall light-emitting diodes D 2 are connected in series and the overall light-emitting diodes D 3 are connected in series.
  • the structure of the module 120 advantageously makes it possible to connect the modules 120 so that a first module plays the role of master module for the light-emitting diodes D 1 , that a second module, possibly different from the first module, plays the role of master module. role of master module for the light-emitting diodes D 2 , and that a third module, possibly different from the first module and the second module, plays the role of master module for the light-emitting diodes D 3 .
  • a first module plays the role of master module for the light-emitting diodes D 1
  • a second module possibly different from the first module
  • a third module possibly different from the first module and the second module
  • the three sets of terminals A 1 , CS 1 and K 1 , A 2 , K 2 and CS 2 and A 3 , CS 3 and K 3 are connected in the same way so that the same module plays the role master module for light emitting diodes D 1 , D 2 and D 3 .
  • the structure of the module 120 is derived from that of the module 40, certain elements being present in triplicate.
  • the structure of the module 120 can be derived from the module 110 shown in figure 10 .
  • the figure 13 shows an embodiment of an optoelectronic circuit 125 comprising a succession of modules 130 mounted in series.
  • a circuit 132 external to the modules, is connected to terminal S of the master module.
  • the circuit 132 can comprise a sensor, for example a brightness sensor, or can include a variator, and the current setpoint I CS supplied by the circuit 51 can depend on a signal supplied to the terminal S by the sensor 132.
  • the circuit 132 can be integrated into each module 130.
  • the circuit 132 can comprise an interface that can be actuated by a user and the activation sequence provided by the user. control circuit 44 of the master module can then depend on the signal supplied by circuit 132.
  • circuit 132 in the case where bidirectional communication is carried out between the master module and the slave modules, circuit 132 can be connected to the one of the slave modules and the signals supplied by the circuit 132 to the slave module are retransmitted by this slave module to the master module.
  • each module 130 can have a structure similar to that of one of the modules 90, 100 or 110.
  • the figure 14 represents an embodiment of an optoelectronic circuit 135 comprising a succession of modules 140 mounted in parallel.
  • Each 140 module can include all the elements of module 100 described previously in relation to the figure 8 .
  • each module 140 The terminals Vdd and A of each module 140 are connected to a source of a high reference potential VCC.
  • the Gnd and CS terminals are connected to a low reference potential.
  • Each module 140 is mounted as a master module. Each module 140 is then adapted to control its own light-emitting diode D. The exchange of data between modules 140 can be carried out as has been described previously for the optoelectronic circuit 105 shown in figure 9 .
  • the I_ctrl_in terminal is connected to the conductive line 106 by the capacitor 108 and the I_ctrl terminal is connected to the conductive line 106 by the capacitor 109.
  • the exchange of data between the modules can, by way of a variant, be carried out by a two-wire link, corresponding, for example, to an I 2 C bus or the like.
  • the light-emitting diodes D of the modules 140 are adapted to emit light at different wavelengths.
  • the optoelectronic circuit 135 comprises three modules 140.
  • the light-emitting diodes D of these modules 140 can be adapted to emit light radiation at different wavelengths, for example respectively in red, green and green. blue.
  • the set of modules 140 can then correspond to a display pixel.
  • Each module 140 is, for example, suitable for modifying the light intensity emitted by the light-emitting diode D that it contains as a function of data supplied by at least one of the other modules 140.
  • the modification of the light intensity can be carried out by any type of modulation, for example by an all-or-nothing modulation of the activation / inhibition switch of the light-emitting diode D or by a modulation of the intensity of the current supplied by the current source 42.
  • one of the modules 140 is adapted to receive a setpoint of a property of the radiation emitted by the optoelectronic circuit 135, for example a color setpoint.
  • the module 140 receiving the instruction transmits data to the other modules 140 so that the property of the radiation emitted by all the light-emitting diodes follows this instruction. This advantageously makes it possible to transmit a general instruction to the electronic circuit while the regulation of the radiation emitted by each module 140 is carried out directly by the module 140 considered.
  • the electronic components used to produce the module 40, 90, 100, 120, 140 can be components suitable for low voltage applications. This makes it possible in particular to reduce the cost of manufacturing the module.
  • the signal S4 from which the selection circuit 51 of the master module supplies the activation / inhibition sequence of the overall light-emitting diodes of the modules corresponds to the potential at the cathode of the overall light-emitting diode D.
  • the circuit 51 can be controlled by another signal, for example the potential at the anode of the light emitting diode D.

Landscapes

  • Optical Communication System (AREA)
  • Led Devices (AREA)

Claims (16)

  1. Optoelektronische Schaltung (80; 95; 105; 115; 125; 135), die miteinander verbundene separate elektronische Elementarschaltungen (40; 90; 100; 110; 120; 140) aufweist, wobei jede elektronische Elementarschaltung Folgendes aufweist:
    mindestens eine Leuchtdiode (D); und
    mindestens einen integrierten Schaltungschip mit einer Schaltung (46) zur Steuerung der Leuchtdiode, wobei die Schaltung in der Lage ist, die Leuchtdiode zu aktivieren oder zu deaktivieren,
    wobei die optoelektronische Schaltung dazu bestimmt ist, eine variable Versorgungsspannung (VALIM) zu empfangen,
    wobei jede elektronische Elementarschaltung (40; 90; 100; 110; 120; 140) eine Steuerschaltung (44) aufweist, die in der Lage ist, ein Aktivierungs- oder Deaktivierungssignal an jede der anderen elektronischen Elementarschaltungen gemäß einer Auswahlsequenz in Bezug auf den Wert der variablen Versorgungsspannung (VALIM) zu liefern, und wobei für jede elektronische Elementarschaltung die Schaltung (46) zur Steuerung der Leuchtdiode (D) in der Lage ist, die Leuchtdiode gemäß dem Aktivierungs- oder Deaktivierungssignal zu aktivieren oder zu sperren, wodurch die Anzahl der aktivierten Leuchtdioden von dem Wert der variablen Versorgungsspannung (VALIM) abhängt.
  2. Optoelektronische Schaltung nach Anspruch 1, wobei jede elektronische Elementarschaltung (40; 90; 100; 110; 120; 140) in einem gleichen Gehäuse die mindestens eine Leuchtdiode (D) und den mindestens einen integrierten Schaltungschip aufweist.
  3. Optoelektronische Schaltung nach Anspruch 1 oder 2, wobei der integrierte Schaltungschip jeder elektronischen Elementarschaltung ferner eine Kommunikationsschaltung (48) aufweist, die eine Modulationsschaltung (58), die in der Lage ist, ein erstes moduliertes Signal (ICS; Imod) aus dem Aktivierungs- oder Deaktivierungssignal zu liefern, und eine Demodulationsschaltung (60), die in der Lage ist, ein zweites Signal (S2) durch Demodulation des ersten Signals zu liefern, enthält, wobei die Schaltung (46) zur Steuerung der Leuchtdiode in der Lage ist, die Leuchtdiode von dem zweiten Signal aus zu aktivieren oder zu sperren.
  4. Optoelektronische Schaltung nach einem der Ansprüche 1 bis 3, wobei jede elektronische Elementarschaltung eine Stromquelle (42) aufweist, die mit der Leuchtdiode (D) gekoppelt ist.
  5. Optoelektronische Schaltung nach einem der Ansprüche 1 bis 4, wobei der integrierte Schaltungschip jeder elektronischen Elementarschaltung ferner eine Schaltung (51) aufweist zum Erfassen eines Master- oder Slave-Zustands der elektronischen Elementarschaltung, wenn die elektronische Elementarschaltung in Betrieb ist, und zwar durch die Art und Weise, wie die elektronische Elementarschaltung mit den anderen elektronischen Elementarschaltungen verbunden ist.
  6. Optoelektronische Schaltung nach Anspruch 5, wobei die elektronische Elementarschaltung im Master-Zustand in der Lage ist, Daten an die anderen elektronischen Elementarschaltungen zu übertragen, so dass die Leuchtdioden zufällig oder nach einer vorgegebenen Reihenfolge aktiviert werden.
  7. Optoelektronische Schaltung nach einem der Ansprüche 1 bis 6, die eine Mehrzahl von in Reihe geschalteten elektronischen Elementarschaltungen aufweist.
  8. Optoelektronische Schaltung nach einem der Ansprüche 1 bis 6, die eine Vielzahl von parallel geschalteten elektronischen Elementarschaltungen aufweist.
  9. Optoelektronische Schaltung nach Anspruch 6 und nach Anspruch 4, wobei jede elektronische Elementarschaltung ferner einen ersten Anschluss (S) aufweist, wobei die optoelektronische Schaltung einen Sensor (132) umfasst, der mit dem ersten Anschluss einer der elektronischen Elementarschaltungen gekoppelt ist, und wobei die Stärke des von der Stromquelle (42) der Master-Schaltung gelieferten Stroms von einem von dem Sensor gelieferten dritten Signal abhängt.
  10. Optoelektronische Schaltung nach Anspruch 3, wobei für jede elektronische Elementarschaltung das erste modulierte Signal einer Modulation des Versorgungsstroms der Leuchtdiode (D) entspricht.
  11. Optoelektronische Schaltung nach Anspruch 3, wobei jede elektronische Elementarschaltung ferner einen zweiten Anschluss (I_ctrl) aufweist, und wobei das erste modulierte Signal (Imod) einem modulierten Strom entspricht, der von der Modulationsschaltung (58) an den zweiten Anschluss (I_ctrl) geliefert wird und der sich von dem Strom zur Stromversorgung der Leuchtdiode unterscheidet, oder wobei das erste modulierte Signal dem Potential an diesem Anschluss entspricht.
  12. Optoelektronische Schaltung nach Anspruch 11, die weiterhin einen dritten Anschluss (I_ctrl_in) aufweist, wobei die Demodulationsschaltung (60) in der Lage ist, das zweite Signal (Imod) über den dritten Anschluss zu empfangen.
  13. Optoelektronische Schaltung nach Anspruch 12, wobei der dritte Anschluss (I_ctrl_in) jeder elektronischen Elementarschaltung über einen Kondensator (108; 134) mit einer leitenden Leitung (106; 132) gekoppelt ist.
  14. Optoelektronische Schaltung nach Anspruch 12, wobei jede elektronische Elementarschaltung ferner einen vierten Anschluss (I_ctrl_out) und eine Kopierschaltung aufweist, die den dritten Anschluss und den vierten Anschluss koppelt und in der Lage ist, die Demodulationsschaltung (60) mit einer Kopie des Stroms zu versorgen, der zwischen dem dritten und dem vierten Anschluss fließt.
  15. Optoelektronische Schaltung nach Anspruch 14, bei der die elektronischen Elementarschaltungen gemäß einer Folge von elektronischen Elementarschaltungen in Reihe geschaltet sind und bei der für jede elektronische Elementarschaltung, mit Ausnahme der elektronischen Elementarschaltungen, die sich an den Enden der Folge befinden, der vierte Anschluss (I_ctrl_out) der elektronischen Elementarschaltung mit dem dritten Anschluss (I_ctrl_in) der vorherigen elektronischen Elementarschaltung in der Folge gekoppelt ist.
  16. Optoelektronische Schaltung nach einem der Ansprüche 1 bis 15, wobei jede elektronische Elementarschaltung weniger als fünf Leuchtdioden (D) aufweist.
EP16829297.7A 2015-12-31 2016-12-29 Optoelektronische schaltung mit leuchtdioden Active EP3398410B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1563488A FR3046493B1 (fr) 2015-12-31 2015-12-31 Circuit optoelectronique a diodes electroluminescentes
PCT/FR2016/053682 WO2017115055A1 (fr) 2015-12-31 2016-12-29 Circuit optoelectronique a diodes electroluminescentes

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EP3398410B1 true EP3398410B1 (de) 2021-06-16

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EP (1) EP3398410B1 (de)
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CN (1) CN108432348B (de)
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WO (1) WO2017115055A1 (de)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5278432A (en) * 1992-08-27 1994-01-11 Quantam Devices, Inc. Apparatus for providing radiant energy
US20020039721A1 (en) * 1996-11-26 2002-04-04 George R. Hull Pattern testing board
CN101479694A (zh) * 2006-06-27 2009-07-08 皇家飞利浦电子股份有限公司 大面积照明
US8110835B2 (en) * 2007-04-19 2012-02-07 Luminus Devices, Inc. Switching device integrated with light emitting device
TW200923874A (en) * 2007-11-16 2009-06-01 Aussmak Optoelectronic Corp Light emitting device
EP2088836A1 (de) * 2008-01-31 2009-08-12 Ledon Lighting Jennersdorf GmbH LED-Beleuchtungssystem mit optischer Kommunikationsfunktion
US8255487B2 (en) * 2008-05-16 2012-08-28 Integrated Illumination Systems, Inc. Systems and methods for communicating in a lighting network
JP2010109168A (ja) * 2008-10-30 2010-05-13 Fuji Electric Systems Co Ltd Ｌｅｄ駆動装置、ｌｅｄ駆動方法および照明装置
DE102010034347A1 (de) * 2010-07-27 2012-02-02 Abb Ag Verfahren und Vorrichtung zur Kommunikation über eine Lastleitung
TW201352055A (zh) 2012-06-01 2013-12-16 Jinone Inc Ｌｅｄ小串之控制裝置
TW201431432A (zh) * 2013-01-17 2014-08-01 安恩國際公司 雙端電流控制器及相關發光二極體照明裝置
US20150351202A1 (en) * 2014-05-29 2015-12-03 Technical Consumer Products, Inc. Master-slave control arrangement for a lighting fixture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

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KR20180099710A (ko) 2018-09-05
WO2017115055A1 (fr) 2017-07-06
CN108432348A (zh) 2018-08-21
US10440788B2 (en) 2019-10-08
FR3046493A1 (fr) 2017-07-07
FR3046493B1 (fr) 2018-07-27
EP3398410A1 (de) 2018-11-07
CN108432348B (zh) 2019-12-31
US20190014627A1 (en) 2019-01-10

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