EP3388945A4 - Method of exchanging data with memory cells - Google Patents
Method of exchanging data with memory cells Download PDFInfo
- Publication number
- EP3388945A4 EP3388945A4 EP16872479.7A EP16872479A EP3388945A4 EP 3388945 A4 EP3388945 A4 EP 3388945A4 EP 16872479 A EP16872479 A EP 16872479A EP 3388945 A4 EP3388945 A4 EP 3388945A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory cells
- exchanging data
- exchanging
- data
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/04—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using optical elements ; using other beam accessed elements, e.g. electron or ion beam
- G11C13/048—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using optical elements ; using other beam accessed elements, e.g. electron or ion beam using other optical storage elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
RU2015148643A RU2625023C2 (en) | 2015-11-12 | 2015-11-12 | Method of exchanging data with memory cells or other devices and their addressing |
PCT/IB2016/001796 WO2017098319A1 (en) | 2015-11-12 | 2016-10-21 | Method of exchanging data with memory cells |
Publications (4)
Publication Number | Publication Date |
---|---|
EP3388945A1 EP3388945A1 (en) | 2018-10-17 |
EP3388945A4 true EP3388945A4 (en) | 2019-08-28 |
EP3388945C0 EP3388945C0 (en) | 2023-11-22 |
EP3388945B1 EP3388945B1 (en) | 2023-11-22 |
Family
ID=58715185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP16872479.7A Active EP3388945B1 (en) | 2015-11-12 | 2016-10-21 | Method of exchanging data with memory cells |
Country Status (7)
Country | Link |
---|---|
US (1) | US10910053B2 (en) |
EP (1) | EP3388945B1 (en) |
JP (1) | JP6815012B2 (en) |
KR (1) | KR102315322B1 (en) |
CN (1) | CN108369554B (en) |
RU (1) | RU2625023C2 (en) |
WO (1) | WO2017098319A1 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100097858A1 (en) * | 2008-10-21 | 2010-04-22 | Naoya Tokiwa | Three-dimensionally stacked nonvolatile semiconductor memory |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3855004A (en) * | 1973-11-01 | 1974-12-17 | Us Army | Method of producing current with ceramic ferroelectric device |
NO316637B1 (en) * | 2002-03-25 | 2004-03-15 | Thin Film Electronics Asa | Volumetric data storage device |
KR100497419B1 (en) * | 2002-12-23 | 2005-07-01 | 한국전자통신연구원 | An information storage medium and an optical device using the medium |
JP4421957B2 (en) * | 2004-06-29 | 2010-02-24 | 日本電気株式会社 | 3D semiconductor device |
CN100505268C (en) * | 2005-03-21 | 2009-06-24 | 旺宏电子股份有限公司 | Memory device and methods of accessing memory unit |
US8031505B2 (en) * | 2008-07-25 | 2011-10-04 | Samsung Electronics Co., Ltd. | Stacked memory module and system |
CN101350360B (en) * | 2008-08-29 | 2011-06-01 | 中国科学院上海微系统与信息技术研究所 | Three-dimensional stacking non-phase-change caused resistance conversion storage apparatus and manufacturing method thereof |
KR20100097858A (en) | 2009-02-27 | 2010-09-06 | 홍익대학교 산학협력단 | Super-resolution using example-based neural networks |
JP2013070008A (en) * | 2011-09-26 | 2013-04-18 | Toshiba Corp | Semiconductor device and manufacturing method of the same |
US8847302B2 (en) * | 2012-04-10 | 2014-09-30 | Sandisk Technologies Inc. | Vertical NAND device with low capacitance and silicided word lines |
US9208883B2 (en) * | 2013-08-23 | 2015-12-08 | Sandisk Technologies Inc. | Three-dimensional NAND non-volatile memory devices with buried word line selectors |
CN103680640B (en) * | 2013-12-11 | 2017-03-15 | 北京时代民芯科技有限公司 | A kind of laser analog single particle effect back of the body irradiation testing method of memory circuitry |
KR102192950B1 (en) * | 2013-12-19 | 2020-12-18 | 에스케이이노베이션 주식회사 | Non-volatile memory device and method for fabricating the same |
US20160188495A1 (en) * | 2014-12-26 | 2016-06-30 | Intel Corporation | Event triggered erasure for data security |
-
2015
- 2015-11-12 RU RU2015148643A patent/RU2625023C2/en active
-
2016
- 2016-10-21 CN CN201680070798.4A patent/CN108369554B/en active Active
- 2016-10-21 US US15/780,554 patent/US10910053B2/en active Active
- 2016-10-21 WO PCT/IB2016/001796 patent/WO2017098319A1/en active Application Filing
- 2016-10-21 JP JP2018523400A patent/JP6815012B2/en active Active
- 2016-10-21 EP EP16872479.7A patent/EP3388945B1/en active Active
- 2016-10-21 KR KR1020187016292A patent/KR102315322B1/en active IP Right Grant
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100097858A1 (en) * | 2008-10-21 | 2010-04-22 | Naoya Tokiwa | Three-dimensionally stacked nonvolatile semiconductor memory |
Non-Patent Citations (1)
Title |
---|
YUE BAI ET AL: "Study of Multi-level Characteristics for 3D Vertical Resistive Switching Memory", SCIENTIFIC REPORTS, vol. 4, no. 1, 1 May 2015 (2015-05-01), pages 1 - 7, XP055389152, DOI: 10.1038/srep05780 * |
Also Published As
Publication number | Publication date |
---|---|
EP3388945C0 (en) | 2023-11-22 |
EP3388945B1 (en) | 2023-11-22 |
RU2015148643A (en) | 2017-05-15 |
US20180350435A1 (en) | 2018-12-06 |
CN108369554A (en) | 2018-08-03 |
KR102315322B1 (en) | 2021-10-21 |
WO2017098319A8 (en) | 2019-05-16 |
EP3388945A1 (en) | 2018-10-17 |
US10910053B2 (en) | 2021-02-02 |
WO2017098319A1 (en) | 2017-06-15 |
JP2019507456A (en) | 2019-03-14 |
KR20180091837A (en) | 2018-08-16 |
CN108369554B (en) | 2022-04-15 |
JP6815012B2 (en) | 2021-01-20 |
RU2625023C2 (en) | 2017-07-11 |
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