EP3345223A1 - Verfahren zur herstellung eines optoelektronischen halbleiter-bauteils, optoelektronisches; halbleiter-bauteil, und temporärer träger - Google Patents
Verfahren zur herstellung eines optoelektronischen halbleiter-bauteils, optoelektronisches; halbleiter-bauteil, und temporärer trägerInfo
- Publication number
- EP3345223A1 EP3345223A1 EP16757678.4A EP16757678A EP3345223A1 EP 3345223 A1 EP3345223 A1 EP 3345223A1 EP 16757678 A EP16757678 A EP 16757678A EP 3345223 A1 EP3345223 A1 EP 3345223A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- metal layer
- metal
- layer
- optoelectronic semiconductor
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/8506—Containers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/851—Wavelength conversion means
- H10H20/8511—Wavelength conversion means characterised by their material, e.g. binder
- H10H20/8512—Wavelength conversion materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
- H10H20/853—Encapsulations characterised by their shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0361—Manufacture or treatment of packages of wavelength conversion means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0362—Manufacture or treatment of packages of encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0364—Manufacture or treatment of packages of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Definitions
- the invention relates to a method for producing an optoelectronic semiconductor component, an optoelectronic semiconductor component and a temporary carrier for the position of an optoelectronic semiconductor component.
- temporary carriers are used on which a semiconductor chip is mounted. After contacting and potting the semiconductor chip with a potting compound, the temporary carrier is detached again. This can be done for example by laser detachment in the case of a transparent carrier or by etching, for example, a copper carrier
- An object of the invention is to provide an improved method for producing an optoelectronic semiconductor device. Another object of the invention is to provide an improved optoelectronic semiconducting ⁇ ter-component. Another object of the invention be ⁇ is to provide an improved temporary support suits ⁇ ben to the manufacturing position of an optoelectronic semiconductor component.
- a method for producing an optoelectronic semiconductor device comprising the steps of: providing ei ⁇ nes temporary support with two metal layers, the metal layers are mechanically detachable from each other. Attaching an optoelectronic semiconductor chip on the first metal layer of the carrier. Releasing the second metal layer from the first metal layer. The release of the second metal layer of the first metal layer is a mechani ⁇ ULTRASONIC loosening. This means in particular that the second metal layer of the first metal layer peeled Toris ⁇ sen, or otherwise mechanically released from the first metal layer.
- the mechanical release of the second of the first metal layer may be effected by holding the second metal layer with a holder. Subsequently, the holder is moved away from the first metal layer such that the second metal layer is detached from the replaced metal layer.
- the optoelectronic semiconducting ⁇ ter-chip with the first metal layer is electrically conductively connected.
- an electrically insulating material is additionally applied to the first metal layer after the optoelectronic semiconductor chip has been mounted on the first metal layer and the electrical contacting of the optoelectronic semiconductor chip has taken place.
- the electrically insulating material can be applied by means of distribution, spraying or injection molding on the first metal layer. However, other application possibilities for the electrically insulating material are also conceivable for the skilled person. Due to the electrically insulating material, the optoelectronic semiconductor component obtains a stable structure.
- the first metal layer is patterned so that electrically insulated regions of the first metal layer are formed from one another. This can be done, for example, by sawing, laser erosion or etching. By structuring the first metal layer can be easily and inexpensively electrically isolated regions of the first metal layer produced. This is particularly advantageous when these electrically isolated areas are then used for electrical contacting of the optoelectronic semiconductor device.
- the metal layers comprise copper.
- the two metal layers consist of copper.
- copper is a good material for the electrical contacting of the optoelectronic semiconductor chip, on the other hand, copper is well suited for the described method of detaching the second metal layer from the first metal layer.
- the copper of the first and / or the second metal layer may be coated with silver, a nickel-silver alloy, a nickel-palladium-gold alloy or with gold.
- the carrier has an additional layer between the two metal layers, in particular an intermediate view of chromium. Chromium is particularly prone geeig ⁇ net to support the detachment of the second metal layer of the first metal layer.
- the method additionally comprises the steps of: applying photoresist on the first metal layer, patterning the photoresist, so that regions of resist having a predetermined cross-section on said first metal layer are present, galvanic application ei ⁇ nes further metal to free Areas, ie not covered by Pho ⁇ tolack areas, the first metal layer, wherein the further metal has a greater thickness than the photoresist and areas of the photoresist partially surmounted, removing the photoresist, wherein a body of the further metal ent ⁇ is having a projecting upper edge.
- the patterned photoresist are formed on the first metal layer regions which are covered with photoresist, and preparation ⁇ che, which are free from photoresist.
- the method for producing an optoelectronic semiconductor component comprises the following steps: First, a carrier is produced, wherein the carrier is produced by applying a chromium layer on a metal layer, wherein the metal layer has a thickness of between 30 and 200 ⁇ m. Subsequently, photoresist is applied to the chromium layer and patterned such that areas of photoresist with a predetermined cross section are formed on the chromium layer. Subsequently, a white ⁇ teres metal is electrodeposited on the chromium layer, WO wherein the further metal has a greater thickness than the photoresist and the areas of photoresist partially surmounted.
- the photoresist is removed, which again Be ⁇ rich or body of the further metal arise, which have a projecting upper edge.
- the bodies of the further metal, which have a projecting upper edge can also be regarded as the first metal layer of the temporary carrier, while the second metal layer is that on which the chromium layer was initially applied.
- the method comprises the further steps, namely the fixing of an optoelectronic ⁇ African semiconductor chip on the electrodeposited metal, the application of an electrically insulating material, and the dissolution of the originally existing metal layer.
- the optoelectronic half ⁇ conductor chip is connected to an electrically conductive connector with a galvanically applied body.
- the electrodeposited metal is copper or nickel. Copper or nickel are particularly suitable as electroplated metals, which form the Be ⁇ rich, to which the optoelectronic semiconductor chip is applied. In one embodiment, the electrodeposited
- Metal has a thickness between 20 and 60 ym. Thicknesses between 20 and 60 ym are particularly advantageous for the structures mentioned.
- the structuring of the first metal layer is carried out by means of sawing, laser ablation or etching.
- An optoelectronic semiconductor component has a light-emitting semiconductor chip and contact surfaces, wherein the contact surfaces have residues of a metal of an intermediate layer, in particular chromium. This allows the Lötkontak- orientation of the resulting semiconductor device improves the ⁇ .
- a temporary carrier for producing an optoelectronic semiconductor component consists of a first metal layer and a second metal layer.
- the second metal ⁇ layer is detachable, in particular mechanically detachably mounted on the first metal layer. Characterized in that the second Me ⁇ tall Anlagen is mechanically detachably mounted on the first metal layer, the second metal layer of the first metal layer may be mechanically released after the completion of the optoelectronic semiconductor component. Removal by laser, or a back etching of the second metal layer is thereby superfluous. As a result, the manufacturing method for an optoelectronic semiconductor device can be simplified.
- the first metal layer of the temporary carrier is copper and has a thickness of between 0.5 and 20 ym.
- the second metal layer of the temporary carrier is copper and has a thickness between 30 and 200 ym. If the thickness of the first metal layer is between 0.5 and
- the temporary carrier has an intermediate view between the two metal layers, wherein the intermediate view is guided in particular as a metallic intermediate view .
- An intermediate view, in particular a metallic intermediate view makes it easier to detach the second metal layer from the first metal layer.
- the intermediate view is chrome or the intermediate view is chrome.
- Chromium is a particularly advantageous material for the intermediate view because the use of chromium makes it very easy to detach the second metal layer from the first metal layer. This is especially true when the first and second metal layers are made of copper.
- FIG. 1 shows a temporary carrier
- FIG. 2 shows a temporary carrier with an intermediate view
- FIG. 3 shows a temporary carrier with an applied optoelectronic semiconductor chip and electrical contacting
- FIG. 4 shows a carrier with optoelectronic semiconductor chip and detached second metal layer
- FIG. 5 shows a first method step for producing an optoelectronic semiconductor component
- FIG. 6 shows a second method step for producing an optoelectronic semiconductor component
- FIG. 7 shows a third method step for producing an optoelectronic semiconductor component
- FIG. 8 shows a fourth method step for producing an optoelectronic semiconductor component
- Figures a further embodiment of the method for producing an optoelectronic semiconductor device
- FIGS. 16-19 show a further embodiment of the method for producing an optoelectronic semiconductor component
- FIG. 21 shows an exemplary embodiment of an optoelectronic semiconductor component with conversion element .
- FIG. 1 shows a cross section through a temporary carrier 100.
- a first metal layer 110 is mounted on a second metal layer 120 such that the second metal layer 120 is mechanically detachable from the first metal layer 110. After the application of further components on the first metal layer 110, it is possible to detach the second metal layer 120 from the first metal layer 110.
- the first metal layer 110 is copper.
- the second metal layer 120 is copper. Both metal layers 110, 120 may also consist of copper.
- the first metal layer 110 has a thickness of between 0.5 and 20 ⁇ m.
- the second metal layer 120 has a thickness Zvi ⁇ rule 30 and 200 ym. Other thicknesses of the metal layers are also conceivable, provided that the second metal layer is detachably mounted on the first metal layer.
- Figure 2 shows a further embodiment of a temporä ⁇ ren carrier 100.
- the intermediate vision 130 is in particular a metal ⁇ metallic intermediate vision and serves to ensure that the second metal ⁇ layer 120 is more easily from the first metal layer 110 ablös ⁇ bar.
- the intermediate view 130 comprises chrome or the intermediate view 130 is chrome.
- FIG. 3 shows a further cross section through a temporary carrier 100, consisting of a first metal layer 110 and a second metal layer 120.
- An optoelectronic semiconductor chip 140 is attached to the first metal layer 110.
- the optoelectronic semiconductor chip 140 has a lower side 141 and an upper side 142.
- the underside 141 directly adjoins the first metal layer 110.
- the Obersei ⁇ te 142 is by means of an electrically conductive connecting piece 150, in this example, a bonding wire connected to the ers ⁇ th metal layer 110th
- FIG. 4 shows a cross section through the first metal layer 110 and the optoelectronic semiconductor chip 140 of FIG. 3 after the second metal layer 120 has been mechanically detached from the first metal layer 110.
- the detached second Me ⁇ tall Anlagen 120 is shown in phantom.
- FIG. 5 shows a cross section through a temporary carrier 100, comprising a first metal layer 110, a second metal layer 120 and an intermediate view 130.
- An optoelectronic semiconductor chip 140 is mounted on the first metal layer 110.
- the Obersei ⁇ te 142 of the optoelectronic semiconductor chip 140, which forms a second electrical contact point of the optoelectronic semiconductor ⁇ semiconductor chip 140 is connected by means of an electroconducting ⁇ ELIGIBLE connector 150, in this case, a bonding wire with the first metal layer 110th
- the carrier 100 with the light emitting chip 140 and the electrically conductive connector 150 provides a starting point
- Figure 6 shows the temporary support 100 with the lichtemittie ⁇ in power chip 140 and the electrically conductive connection piece 150 of Figure 4.
- an electrically insulating material is on the first metal layer 110,160 is introduced ⁇ .
- the electrically insulating material 160 may be, for example, a plastic, a resin, a lacquer, or another insulating material. Since the electrically isolie ⁇ Rende material 160, the upper surface 142 of the light emitting chip 140 covering the electrically insulating material must be transparent to the radiation of the light emitting chip 140 160th In one embodiment, the electrically insulating material 160 comprises a conversion substance or optical elements.
- Figure 7 shows the next step of manufacture of the optoelectronic device, after the second metal layer 120 was peeled off ⁇ (of Figure 6) of the first metal layer 110th
- the peeling of the second metal layer 120 is a mechanical peeling in which the second metal layer 120 is pulled off, torn off, stripped, or otherwise mechanically released from the first metal layer 110 from the first metal layer 110.
- FIG. 8 shows the optoelectronic component after a next method step, in which the first metal layer 110 has been patterned in the region 170.
- the structuring of the first metal layer 110 in the region 170 can be carried out, for example, by sawing, etching, or by laser ablation.
- the first metal layer 110 is divided into a first area 111 and a second area 112.
- the underside 141 of the light-emitting chip 140 rests directly on the first region 111 of the first metal layer 110.
- the upper side 142 of the light-emitting chip 140 is connected to the second region 112 of the first metal layer 110 by means of an electrically conductive connecting piece 150.
- the electrical contacting of the optoelekt ⁇ tronic semiconductor device 180 may be over the first region 111 and the second region 112 of the first metal tallstoff 110 take place.
- FIG. 9 shows a cross section through a carrier 100 with a first metal layer 110 and a second metal layer 120.
- a first optoelectronic semiconductor chip 145 and a second optoelectronic semiconductor chip 146 are mounted on the first metal layer 110, the first optoelectronic semiconductor chip 145 being connected by means of a first electrically conductive connector 151 is connected to the first metal layer 110.
- the second optoelectronic semiconductor chip 146 is connected to the first metal layer 110 by means of a second electrically conductive connecting piece 152.
- On the first metal layer 110 is a
- electrically insulating material 160 applied, which encloses both the two optoelectronic semiconductor chips 145, 146, and the two electrically conductive connecting pieces 151, 152.
- FIG. 10 shows a cross section through the carrier 100 shown in FIG. 9 with the corresponding semiconductor chips 145, 146 and electrically conductive connecting pieces 151, 152, after the second metal layer 120 has been removed from the first metal layer. tallstoff 110 was replaced.
- the second metal layer 120 is shown in dashed lines.
- FIG. 11 shows the next method step.
- the first metal layer 110 has been patterned, likewise in a second region 172.
- the first metal layer 110 is divided into four regions 111, 112, 113 and 114 divided.
- the two optoelectronic semiconductor chips 145, 146 are respectively connected to two regions of the first metal layer ⁇ 110th
- the first optoelectronic half ⁇ semiconductor chip 145 touches with its underside the first Be ⁇ rich 111 of the first metal layer 110.
- first electrically conductive connecting piece 151 is the upper side of the first light-emitting semiconductor chip 145 is connected to the second portion 112 of the first metal layer 110th
- the second optoelectronic semiconductor chip 146 contacts with its underside the third region 113 of the first metal layer 110.
- the semiconductor chip 146 is connected by means of second electrically leitfähi ⁇ gen link 152 with the fourth area 114 of the first metal layer 110th
- a dashed Tren ⁇ voltage line 175 separation of the two existing on the first metal layer 110 components is indicated.
- the Tren ⁇ voltage line 175 separates and the second region 112, third region 113 of the first metal layer 110.
- the two components, each ⁇ wells hold an optoelectronic semiconductor chip 145, 146 corresponds can be separated from each other by sawing so that independent optoelectronic semiconductor components 180 are Sustainer ⁇ th.
- the first metal layer 110 comprises copper, in particular consisting of copper.
- the second metal layer 120 comprises copper, in particular consisting of copper.
- the intermediate view 130 is made of chrome.
- the copper of the first and / or the second metal layer may be coated with silver, a nickel-silver alloy, a nickel-palladium-gold alloy or with gold.
- FIG. 12 shows a further starting point for a method for producing an optoelectronic semiconductor component.
- a carrier 100 having a first metal layer 110, a second metal layer 120, and an intermediate view 130 is covered with photoresist in three areas 181, 182, and 183.
- FIG. 13 shows the carrier 100 of FIG. 12 after the next method step, in which a further metal has been galvanically applied to the first metal layer 110.
- the galvanic application of a further metal on the first metal layer 110 results in a first body 191 and a second body 192 of the galvanically deposited further metal.
- the thickness of the bodies 191 and 192 is greater than the thickness of the photoresist structures in the three areas 181, 182 and 183.
- the galvanically applied further metal has the same thickness as the Photo ⁇ paint structures in the areas 181, 182 and 183, the further metal forms from there an upper edge region 193, which projects beyond the photoresist structures.
- FIG. 14 shows the optoelectronic semiconductor component after a further method step.
- an optoelectronic semiconductor chip 140 is applied, which is connected by means of electrically conductive connecting piece 150 with the second body 192.
- the photoresist structures are removed so that the bodies 191 and 192 are placed freely on the first metal layer 110.
- FIG. 15 shows the optoelectronic semiconductor component according to further method steps. On the first metal layer
- an electrically insulating material 160 is applied, wherein the electrically insulating material 160 is also mounted below the upper edge regions 193 of the first body 191 and the second body 192.
- the first body 191, and also the second body 192 are also mounted below the upper edge regions 193 of the first body 191 and the second body 192.
- FIG. 15 shows the finished optoelectronic semiconductor component 180.
- the first metal layer 110 is filled in the region 170 with an electrically insulating material.
- This electrically insulating material may be the same as the electrically insulating material 160, but it is also conceivable to use an electrically insulating material deviating from the electrically insulating material 160.
- FIG. 16 shows the starting point for a further method for producing an optoelectronic semiconductor component.
- an intermediate layer 130 is applied, which consists for example of chromium.
- a photoresist layer is vapor ⁇ introduced, which is then patterned so that a ers ⁇ ter portion 181, a second region 182, and a third region 183 formed of the photoresist.
- FIG. 17 shows the next method step.
- a galvanic material is applied to the intermediate layer 130, thereby forming a first body 191 and a second body 192 consisting of the electrodeposited material.
- the galvanically applied material of the bodies 191 and 192 in turn has a greater thickness than the areas 181, 182 and 183 of the photoresist.
- Characterized upper edge protrude ⁇ section 193 of the body 191 and 192 in turn, the areas 181, 182 and 183 of the photoresist.
- FIG. 18 shows the optoelectronic semiconductor component according to further method steps.
- a semiconductor chip 140 is attached on the first body 191 of the further, galvanically deposited material.
- the semiconductor chip 140 is connected by means of electrically conductive connector 150 to the second body 192 of the electrodeposited material.
- an electrically isolie ⁇ rendes material 160 is applied, which in turn may contain Konversi ⁇ onsmaterialien.
- the optoelectronic semiconductor chip 140 is embedded in the electrically insulating material 160.
- the electrically insulating material 160 may be a plastic, a resin, or any other material to be selected by one skilled in the art.
- FIG. 19 shows the optoelectronic semiconductor component according to further method steps.
- the metal layer 120 was brings solves ⁇ from the intermediate layer 130 and the bodies 191 and 192nd Remains of the intermediate layer 130 are still on the component.
- a separation of the remaining chromium residues was achieved by sawing. Instead of the saw cut, in the region 170 the chromium residues can also be separated by means of laser ablation or by means of an etching process.
- the two bodies 191 and 192 of the electrodeposited metal can be interpreted as the first metal layer 110.
- Figure 19 thus shows an embodiment of a finished semiconductor device 180, in which the contact surfaces have remnants of the intermediate layer 130, for example Chromres ⁇ te.
- the finished semiconductor device layer 180 remains of the intermediate 130 on the contact surfaces, caused by the struc tured ⁇ first metal layer 110, are available.
- the electrodeposited material is copper or nickel. In one embodiment, the electro-deposited material to a thickness Zvi ⁇ 's 20 and 60 ym. In one embodiment, the patterning of the first metal layer 110 is done by sawing, laser ablation, or etching.
- Figure 20 shows a cross section through a method ⁇ step for producing an optoelectronic semiconductor component, in which the light-emitting semiconductor chip 140 is a so-called flip-chip.
- the opto-electronic semi-conductor chip ⁇ 140 has its underside 141 two electrical see pads 154 and 155, with the
- the temporary support 100 additionally comprises a second metal layer 120 and an intermediate ⁇ view 130.
- the optoelectronic semiconductor chip 140 is encapsulated by means of electrically insulating material 160. After dissolution, the second metal layer 120 of the first metal layer 110, it is notwen ⁇ dig that the structuring of the first metal layer 110 in Region 170 between the twomaschinetechniksflachen 154 and 155 is carried out.
- FIG. 21 shows an intermediate step in the production of a further exemplary embodiment of an optoelectronic device
- a temporary carrier 100 which consists of a first metal layer 110 and a second metal ⁇ layer 120, an optoelectronic semiconductor chip 140 is disposed, wherein the optoelectronic semiconductor chip 140 adjacent to the first metal layer 110.
- electrically conductive connecting piece 150 By means of electrically conductive connecting piece 150, the upper side 142 of the optoelectronic semiconductor chip 140 is electrically conductively connected to the first metal layer 110.
- a conversion plate 161 is arranged on the upper side 142 of the optoelectronic semiconductor chip 140.
- an electrically insulating material 160 By means of an electrically insulating material 160, the semiconductor component is encapsulated.
- the semiconductor device can now be fertigge ⁇ represents by the further steps are carried out analogously to the figures 7 and 8.
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Abstract
Description
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102015114662.2A DE102015114662A1 (de) | 2015-09-02 | 2015-09-02 | Verfahren zur Herstellung eines optoelektronischen Halbleiter-Bauteils, optoelektronisches Halbleiter-Bauteil, Temporärer Träger |
| PCT/EP2016/070359 WO2017037037A1 (de) | 2015-09-02 | 2016-08-30 | Verfahren zur herstellung eines optoelektronischen halbleiter-bauteils, optoelektronisches; halbleiter-bauteil, und temporärer träger |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP3345223A1 true EP3345223A1 (de) | 2018-07-11 |
Family
ID=56802507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP16757678.4A Withdrawn EP3345223A1 (de) | 2015-09-02 | 2016-08-30 | Verfahren zur herstellung eines optoelektronischen halbleiter-bauteils, optoelektronisches; halbleiter-bauteil, und temporärer träger |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US10483444B2 (de) |
| EP (1) | EP3345223A1 (de) |
| DE (1) | DE102015114662A1 (de) |
| WO (1) | WO2017037037A1 (de) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080115350A1 (en) * | 2006-10-26 | 2008-05-22 | Kerr Roger S | Metal substrate having electronic devices formed thereon |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6750134B2 (en) | 2002-01-09 | 2004-06-15 | Texas Instruments Incorporated | Variable cross-section plated mushroom with stud for bumping |
| DE102005041064B4 (de) * | 2005-08-30 | 2023-01-19 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Oberflächenmontierbares optoelektronisches Bauelement und Verfahren zu dessen Herstellung |
| MX2011002620A (es) * | 2008-09-11 | 2011-05-25 | Albany Int Corp | Banda permeable para la fabricacion de papel de seda, de toalla y materiales no tejidos. |
| DE102009036621B4 (de) | 2009-08-07 | 2023-12-21 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelektronisches Halbleiterbauteil |
| TWI533380B (zh) * | 2011-05-03 | 2016-05-11 | 旭德科技股份有限公司 | 封裝結構及其製作方法 |
| DE202013012470U1 (de) | 2012-09-07 | 2017-01-12 | Seoul Viosys Co., Ltd. | Leuchtdiodenarray auf WAFER-Ebene |
| US9595651B2 (en) | 2012-12-21 | 2017-03-14 | Panasonic Intellectual Property Management Co., Ltd. | Electronic component package and method for manufacturing same |
| DE102013100711B4 (de) | 2013-01-24 | 2021-07-01 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer Vielzahl optoelektronischer Bauelemente |
| DE102013206225A1 (de) | 2013-04-09 | 2014-10-09 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zu seiner Herstellung |
-
2015
- 2015-09-02 DE DE102015114662.2A patent/DE102015114662A1/de not_active Withdrawn
-
2016
- 2016-08-30 US US15/757,141 patent/US10483444B2/en not_active Expired - Fee Related
- 2016-08-30 EP EP16757678.4A patent/EP3345223A1/de not_active Withdrawn
- 2016-08-30 WO PCT/EP2016/070359 patent/WO2017037037A1/de not_active Ceased
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080115350A1 (en) * | 2006-10-26 | 2008-05-22 | Kerr Roger S | Metal substrate having electronic devices formed thereon |
Also Published As
| Publication number | Publication date |
|---|---|
| US20180261742A1 (en) | 2018-09-13 |
| US10483444B2 (en) | 2019-11-19 |
| DE102015114662A1 (de) | 2017-03-02 |
| WO2017037037A1 (de) | 2017-03-09 |
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