EP2985916B1 - Iterative demodulation und decodierung mit reduziertem speicher - Google Patents

Iterative demodulation und decodierung mit reduziertem speicher Download PDF

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EP2985916B1
EP2985916B1 EP15179282.7A EP15179282A EP2985916B1 EP 2985916 B1 EP2985916 B1 EP 2985916B1 EP 15179282 A EP15179282 A EP 15179282A EP 2985916 B1 EP2985916 B1 EP 2985916B1
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data
symbol
symbol data
demodulation
receiver
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EP2985916A1 (de
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Nur Engin
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NXP BV
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3776—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using a re-encoding step during the decoding process
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6325—Error control coding in combination with demodulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6588—Compression or short representation of variables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3082—Vector coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/208—Arrangements for detecting or preventing errors in the information received using signal quality detector involving signal re-encoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Definitions

  • Various exemplary embodiments disclosed herein relate generally to reduced memory iterative baseband processing in communication systems.
  • Baseband processing for wireless receivers mostly includes demodulation, deinterleaving, and forward error correction (FEC) steps.
  • FEC forward error correction
  • various schemes can be introduced to improve (i.e ., decrease) the bit error rate (BER) of the received signal.
  • BER bit error rate
  • Many of these techniques use the knowledge of the transmitted signal characteristics (such as modulation type and pilot data) to detect as accurately as possible the channel characteristics and compensate for them.
  • BICM-ID bit-interleaved coded modulation with soft decision iterative decoding
  • WO 2014/029425 describes a signal method of processing in a receiver a signal that has been encoded and interleaved in a transmitter comprising: receiving a signal, process the signal to obtain a stream of soft metrics representing bit probability of symbols in a predetermined constellation; applying to said soft metric a compression operation that preserves the total length of each group of soft metrics relative to a same constellation symbol; rearranging the stream of compressed soft metrics so as to inverse the interleaving done in the transmitter.
  • ROSATI S ET AL "LLR Compression for BICM Systems Using Large Constellations", IEEE TRANSACTIONS ON COMMUNICATIONS, IEEE SERVICE CENTER, PISCATAWAY, NJ. USA, vol. 61, no. 7, 1 July 2013 (2013-07-01), pages 2864-2875 , describes that digital video broadcasting (DVB-C2) and other modern communication standards increase diversity by means of a symbol-level interleaver that spans over several codewords. Deinterleaving at the receiver requires a large memory, which has a significant impact on the implementation cost. The authors propose a technique that reduces the de-interleaver memory size.
  • Quantizing log-likelihood ratios with bit-specific quantizers and compressing the quantized output can reduce the memory size with a negligible increase in computational complexity.
  • Both the quantizer and compressor are designed via a GMI-based maximization procedure. For a typical DVBC2 scenario, numerical results show that the proposed solution enables a memory saving up to 30%.
  • ARIYOSHI M ET AL "Improvement on turbo code decoder by updating redundant likelihood information"
  • PROC- IEEE 59TH VEHICULAR TECHNOLOGY CONFERENCE
  • VTC 2004-SPRING MILAN MILAN
  • ITALY vol. 2, 17 May 2004 - 19 May 2004, pages 1014-1018
  • a criterion for updating the redundant likelihood values is proposed, which is based on the comparisons of the channel values with the regenerated values by the soft-input and soft output encoders. It is shown that the proposed method can improve the error correcting capabilities, i.e., the improvement of BER/BLER performance and the achievable BER limit.
  • Compressing the symbol data within the receiver as set out in claim 1 may include using one of lossy compression and a combination of lossless and lossy compression.
  • the receiver as set out in claim 1 may further comprise a log likelihood ratio (LLR) compressor/decompressor configured to compress LLR data from the interleaver and store the compressed LLR data in an interleave memory and configured to decompress compressed LLR data stored in the interleave memory.
  • LLR log likelihood ratio
  • Compressing the LLR data may include quantizing the LLR data.
  • Compressing the symbol data within the receiver as set out in claim 6 may include using one of lossy compression and a combination of lossless and lossy compression.
  • the receiver as set out in claim 6 may further comprise a log likelihood ratio (LLR) compressor/decompressor configured to compress LLR data from the interleaver and store the compressed LLR data in an interleave memory and configured to decompress compressed LLR data stored in the interleave memory.
  • LLR log likelihood ratio
  • the non-transitory machine-readable storage medium as set out in claim 11 may further cause the receiver to perform compressing interleaved data and storing the compressed interleaved data in an interleave memory; and decompressing compressed interleaved data stored in the interleave memory. Compressing the interleaved data may include quantizing the interleaved data.
  • the non-transitory machine-readable storage medium as set out in claim 12 may further cause the receiver to perform compressing interleaved data and storing the compressed interleaved data in an interleave memory; and decompressing compressed interleaved data stored in the interleave memory. Compressing the interleaved data may include quantizing the interleaved data.
  • FIG. 1 illustrates a block diagram of a typical digital transmission baseband system.
  • the digital transmission baseband system includes a forward error correction (FEC) encoder 110, an interleaver 120, a modulator 130, and a transmission (TX) filter and digital to analog converter (DAC) 140.
  • FEC forward error correction
  • TX transmission filter and digital to analog converter
  • the encoded bits are interleaved by the interleaver 120 resulting in a reordering of the sequence x k ⁇ x k ' .
  • the bits may be modulated by the modulator 130 according to a single carrier or OFDM modulation method to obtain y k ' .
  • the symbols are converted to analogue signal and transmitted over a wireless channel by the TX filter and DAC 140.
  • FIG. 2 illustrates a block diagram of a typical digital receiver baseband system.
  • the digital receiver baseband system includes a receiver (RX) filter and analog to digital converter (ADC) 210, a synchronizer 220, a demodulator 230, a deinterleaver 240, and an FEC decoder 250.
  • RX receiver
  • ADC analog to digital converter
  • the RX filter and ADC 210 and synchronizer 220 convert the received analog signal to a digital signal including the symbols ⁇ k ' .
  • the symbols ⁇ k ' are received by the demodulator 230.
  • LLR log likelihood ratios
  • the deinterleaver 240 next deinterleaves the LLR values obtained from demodulator 230. Deinterleaving causes the errors to be well-spread out in time. After deinterleaving, the LLR values are used as soft input by the FEC decoder to correct errors such that the number of errors in the received bit stream q ⁇ l may be minimized.
  • the BER resulting depends on the modulation type, channel conditions and the demodulation and decoding method applied at the receiver.
  • Lower BER may be achieved when better reliability information (LLR) is obtained from demodulation.
  • LLR reliability information
  • modulating and coding schemes For various modulation and coding schemes, one way of achieving a lower BER in a given channel condition is iterative demodulation and decoding.
  • modulating and coding schemes include various types of phase shift keying and orthogonal frequency-division multiplexing (OFDM).
  • OFDM orthogonal frequency-division multiplexing
  • the incoming data ⁇ k ' is processed by the full demodulation, deinterleaving, and FEC decoder methods to obtain q ⁇ l . Then the output of the FEC decoder is used to demodulate the signal once again, by correcting the (a-priori) input data using the new (extrinsic) information obtained from the FEC decoder.
  • FIG. 3 illustrates a block diagram of a digital receiver baseband system using iterative demodulation and decoding.
  • the iterative receiver system includes the same basic elements as the receiver system in FIG. 2 , but adds an iterative FEC encoder 360, iterative interleaver 370, interleave memory 372, and symbol buffer 332. Further, the demodulator 230 is replaced with an a posteriori probability demodulator 330. In case of a digital reception system including a hard-output FEC decoder, the output is re-encoded by the iterative FEC encoder 360 and interleaved by the iterative interleaver 370 to produce extrinsic information z ⁇ k .
  • the a posteriori demodulator 330 then performs a second demodulation using the extrinsic information z ⁇ k produce an improved estimate of the received signal.
  • the symbol buffer 332 is needed in order to store the incoming data ⁇ k ' for the second iteration of demodulation processing. This is because of the additional delay introduced by the de-interleaver.
  • the corresponding extrinsic information z ⁇ k needs to later be available.
  • the interleave memory 372 is additional memory needed to store data for use by the iterative interleaver 370.
  • FIG. 4 illustrates a block diagram of a second embodiment of a digital receiver baseband system using iterative demodulation.
  • the second embodiment includes a soft-input-soft-output (SISO) decoder 450.
  • the SISO decoder 450 generates soft output values corresponding to encoded bits so the re-encoding is not needed.
  • This second iterative receive system includes the same basic elements as the receiver system in FIG. 2 , but adds iterative interleaver 370, interleave memory 372, and symbol buffer 332.
  • the demodulator 230 is replaced with an a posteriori probability demodulator 330.
  • the outputs of the SISO decoder are then interleaved by the iterative interleaver 370 and demodulated using a posteriori information in the a posteriori probability demodulator 330.
  • DAB digital audio broadcasting
  • a time (de)interleaving length of 384 ms is required. Assuming a receiver that receives all available services, this translates to about a 330 kbyte deinterleaving memory (assuming 5 bits per LLR value), which is already present in the system for (open-loop) reception.
  • DAB uses DQPSK (differential QPSK) modulation, at the input side each two LLR values correspond to a complex value of a 16 bit real value and a 16 bit imaginary value.
  • the symbol buffer memory becomes 330 * 16 (bits per real/imaginary) / 5 bits per LLR ⁇ 1Mbyte.
  • an iterative baseband receiver it may be possible to use a fraction of the precision in the symbol buffer data for the second iteration.
  • full precision input is used because no storage is required at this stage.
  • full precision extrinsic information z ⁇ k may be converted to a lower precision and stored for use in the next iteration.
  • simulations have been run to verify that high performance may still be obtained by using a reduced precision information from the first iteration.
  • compression may also be applied to data stored in the interleave memory.
  • the embodiments described below may take two measures in order to limit the amount of memory required because of iterative reception: compression of bits in the symbol buffer; and compression of bits at the interleave memory.
  • FIG. 5 illustrates a block diagram of a third embodiment of a digital receiver baseband system using iterative demodulation.
  • the digital receiver baseband system of FIG. 5 is the same as the digital receiver baseband system of FIG. 3 except for the addition of compression of the data stored in the symbol memory 332 and the interleave memory 372.
  • a symbol compressor/decompressor 534 compresses the received symbols that are then stored in the symbol memory 332.
  • the symbol compressor/decompressor 534 may also decompress compressed symbols stored in the symbol memory 332 for use in a later demodulation iteration.
  • the symbol compressor/decompressor 534 may use lossy compression, or a combination of lossy and lossless compression. Some (lossless or almost lossless) compression may already applied as the data is received.
  • the demodulator may tolerate the lowered precision and does not suffer much performance loss versus the situation where the uncompressed symbols are stored.
  • a LLR compressor/decompressor 574 may compress the LLR data that needs to be stored and then deinterleaved. Then when the data is to be deinterleaved, the LLR compressor/decompressor 574 may decompress the interleaved LLR data stored in the interleave memory 372. Again, LLR compressor/decompressor 574 may use lossy compression, lossless compression, or a combination of lossy and lossless compression.
  • Various elements of the digital receiver baseband system of FIG. 5 may be implemented by software running on a processor.
  • any of the a posteriori probability demodulator 330, deinterleaver 240, FEC decoder 250, FEC encoder 360, interleaver 370, symbol compressor/decompressor 534, and LLR compressor/decompressor 574 may be implemented in this way, either individually or in any combination.
  • these elements may be implemented as dedicated circuits that may be implemented in a single integrated circuit or multiple integrated circuits.
  • FIG. 6 illustrates a block diagram of a fourth embodiment of a digital receiver baseband system using iterative demodulation.
  • the digital receiver baseband system of FIG. 6 is the same as the digital receiver baseband system of FIG. 4 except for the addition of compression of the data stored in the symbol memory 332 and the interleave memory 372. Further, the compression of the data stored in the symbol memory 332 and the interleave memory 372 may be accomplished in the same way as described in FIG. 5 .
  • Various elements of the digital receiver baseband system of FIG. 6 may be implemented by software running on a processor.
  • any of the a posteriori probability demodulator 330, deinterleaver 240, SISO decoder 450, interleaver 370, symbol compressor/decompressor 534, and LLR compressor/decompressor 574 may be implemented in this way, either individually or in any combination.
  • these elements may be implemented as dedicated circuits that may be implemented in a single integrated circuit or multiple integrated circuits.
  • the operation of the third embodiment has been modeled with matlab simulations.
  • the simulations are based on a floating point simulation chain of the DAB standard assuming perfect synchronization. To be able to compare the effect of lossy compression in the form of reduced-precision quantization the following simulations have been run for several channel conditions:
  • FIGs. 7 and 8 illustrate the results of the simulation.
  • the results are a plot of bit error rate (BER) versus signal to noise ratio (Eb/N0).
  • the reference case corresponds to floating point matlab simulation.
  • the fixed-point reference case of 16-bit precision is assumed to be same curve or very close.
  • the remaining two curves correspond to 8-bit and 4-bit precision.
  • the performance is measured at the required BER level 10 -4 .
  • decrease of gain due to compression was found to be 0.3dB at most, while the memory requirement for the symbol buffer was decreased by 75% for the 4-bit case.
  • a Cenelec SFN channel is used and 4-bit quantization is applied to the symbol data.
  • the LLR data is kept at 5-bit precision, so here the effect of symbol buffer compression is seen.
  • the multipath model used is based on COST207 channel model and an SFN Cenelec channel is simulated in this case.
  • the plots shown in FIGs. 7 and 8 use two different values for the Doppler frequency Fd.
  • the embodiments described above may be applied to all wireless standards for broadcast, networking, cellular, etc. applications.
  • the advantages are especially seen in case of broadcast standards or other applications which specify long interleavers and therefore require a large buffer memory for closed-loop operation.
  • compression may be used to compress the symbol and LLR data. Also, only the symbol data or only the LLR data may be compressed.
  • processor will be understood to encompass a variety of devices such as microprocessors, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), and other similar processing and computing devices.
  • FPGAs field-programmable gate arrays
  • ASICs application-specific integrated circuits

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Claims (12)

  1. Empfänger, der zum Durchführen einer iterativen Demodulation und zum Entschlüsseln eines Signals in mehreren Iterationen betreibbar ist, mit:
    einem A-posteriori-Wahrscheinlichkeitsdemodulator (330), der dazu konfiguriert ist, ein eingegebenes digitales Signal zu empfangen, das Symboldaten mit voller Genauigkeit, die für eine Demodulation in einer ersten Iteration verwendet werden, und Symboldaten mit reduzierter Genauigkeit aufweist, die für eine Demodulation in einer nachfolgenden Iteration verwendet werden, und demodulierte Daten abzugeben;
    einem Entschachteler (240), der dazu konfiguriert ist, die demodulierten Daten zu entschachteln;
    einem Vorwärtsfehlerkorrekturentschlüsseler (250), der dazu konfiguriert ist, eine Fehlerkorrektur der entschachtelten Daten durchzuführen;
    einem Vorwärtsfehlerkorrekturverschlüsseler (360), der dazu konfiguriert ist, die dekodierten Daten zu verschlüsseln;
    einem Verschachteler (370), der dazu konfiguriert ist, die verschlüsselten Vorwärtsfehlerkorrekturdaten zu verschachteln und die verschachtelten, verschlüsselten Vorwärtsfehlerkorrekturdaten zu dem A-posteriori-Wahrscheinlichkeitsdemodulator abzugeben; und
    einem Symbolkomprimierer/Dekomprimierer (534), der dazu konfiguriert ist,
    die Symboldaten mit voller Genauigkeit, die von dem A-posteriori-Wahrscheinlichkeitsdemodulator empfangen sind, zu komprimieren, wobei das Komprimieren der Symboldaten mit voller Genauigkeit ein Quantisieren mit reduzierter Genauigkeit der Symboldaten mit voller Genauigkeit aufweist;
    die komprimierten Symboldaten in einem Symbolspeicher (332) zu speichern,
    die in dem Symbolspeicher gespeicherten, komprimierten Symboldaten zu dekomprimieren, und
    die dekomprimierten, komprimierten Symboldaten zu dem A-posteriori-Demodulator zum Gebrauch bei der nachfolgenden Iteration zu senden.
  2. Empfänger gemäß Anspruch 1, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit entweder eine verlustbehaftete Komprimierung oder eine Kombination einer verlustfreien und verlustbehafteten Komprimierung aufweist.
  3. Empfänger gemäß Anspruch 1, des Weiteren mit einem Logwahrscheinlichkeitsverhältniskomprimierer/Dekomprimierer (574), der dazu konfiguriert ist, Logwahrscheinlichkeitsverhältnisdaten von dem Verschachteler zu komprimieren und die komprimierten Logwahrscheinlichkeitsverhältnisdaten in einem Verschachtelungsspeicher (372) zu speichern, und der dazu konfiguriert ist, die komprimierten Logwahrscheinlichkeitsverhältnisdaten zu dekomprimieren, die in dem Verschachtelungsspeicher gespeichert sind.
  4. Empfänger gemäß Anspruch 3, wobei ein Komprimieren der Logwahrscheinlichkeitsverhältnisdaten ein Quantisieren der Logwahrscheinlichkeitsverhältnisdaten aufweist.
  5. Empfänger gemäß Anspruch 3, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit entweder eine Verwendung einer verlustbehafteten Komprimierung oder einer Kombination einer verlustfreien und einer verlustbehafteten Komprimierung aufweist.
  6. Empfänger, der zum Durchführen einer iterativen Demodulation und zum Entschlüsseln eines Signals in mehreren Iterationen betreibbar ist, mit:
    einem A-posteriori-Wahrscheinlichkeitsdemodulator (330), der dazu konfiguriert ist, ein eingegebenes Digitalsignal zu empfangen, das Symboldaten mit voller Genauigkeit, die für eine Demodulation in einer ersten Iteration verwendet werden, und Symboldaten mit reduzierter Genauigkeit aufweist, die für eine Demodulation in einer nachfolgenden Iteration verwendet werden, und zum Abgeben von demodulierten Daten;
    einem Entschachteler (240), der dazu konfiguriert ist, die demodulierten Daten zu entschachteln;
    einem Soft-In/Soft-Out-Entschlüsseler (450), der dazu konfiguriert ist, die entschachtelten Daten zu entschlüsseln;
    einem Verschachteler (370), der dazu konfiguriert ist, die entschlüsselten Daten zu verschachteln und die verschachtelten, entschlüsselten Daten zu einem A-posteriori-Wahrscheinlichkeitsdemodulator abzugeben; und
    einem Symbolkomprimierer/Dekomprimierer (534), der dazu konfiguriert ist, die Symboldaten mit voller Genauigkeit, die von dem A-posteriori-Wahrscheinlichkeitsdemodulator empfangen werden, zu komprimieren, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit ein Quantisieren mit reduzierter Genauigkeit der Symboldaten mit voller Genauigkeit aufweist;
    die komprimierten Symboldaten in einem Symbolspeicher (332) zu speichern,
    die komprimierten Symboldaten, die in dem Symbolspeicher gespeichert sind, zu dekomprimieren, und
    die dekomprimierten, komprimierten Symboldaten zu dem A-posteriori-Wahrscheinlichkeitsdemodulator zum Gebrauch bei der nachfolgenden Iteration zu senden.
  7. Empfänger gemäß Anspruch 6, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit entweder eine Verwendung einer verlustbehafteten Komprimierung oder einer Kombination einer verlustfreien und verlustbehafteten Komprimierung aufweist.
  8. Empfänger gemäß Anspruch 6, des Weiteren mit einem Logwahrscheinlichkeitsverhältniskomprimierer/Dekomprimierer (574), der dazu konfiguriert ist, Logwahrscheinlichkeitsverhältnisdaten von dem Verschachteler zu komprimieren und die komprimierten Logwahrscheinlichkeitsverhältnisdaten in einem Verschachtelungsspeicher (372) zu speichern, und der dazu konfiguriert ist, komprimierte Logwahrscheinlichkeitsverhältnisdaten zu dekomprimieren, die in dem Verschachtelungsspeicher gespeichert sind.
  9. Empfänger gemäß Anspruch 8, wobei ein Komprimieren der Logwahrscheinlichkeitsverhältnisdaten ein Quantisieren der Logwahrscheinlichkeitsverhältnisdaten aufweist.
  10. Empfänger gemäß Anspruch 8, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit entweder eine Verwendung einer verlustbehafteten Komprimierung oder eine Kombination einer verlustfreien und verlustbehafteten Komprimierung aufweist.
  11. Nicht-flüchtiges, maschinenlesbares Speichermedium, das mit Befehlen verschlüsselt ist, die, wenn sie durch einen Prozessor in einem Empfänger ausgeführt werden, den Empfänger zum Durchführen einer iterativen Demodulation und zum Entschlüsseln eines Signals in mehreren Iterationen veranlassen, mit:
    einem A-posteriori-Wahrscheinlichkeitsdemodulieren eines empfangenen, eingegebenen digitalen Signals, das Symboldaten mit voller Genauigkeit, die für eine Demodulation in einer ersten Iteration verwendet werden, und Symboldaten mit reduzierter Genauigkeit aufweist, die für eine Demodulation in einer nachfolgenden Iteration verwendet werden, und Abgeben von demodulierten Daten;
    Entschachteln der demodulierten Daten;
    Vorwärtsfehlerkorrekturentschlüsseln der entschachtelten Daten;
    Vorwärtsfehlerkorrekturverschlüsseln der entschlüsselten Daten;
    Verschachteln der verschlüsselten Vorwärtsfehlerkorrekturdaten;
    Komprimieren der Symboldaten mit voller Genauigkeit und Speichern der komprimierten Daten in einem Symbolspeicher, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit ein Quantisieren mit reduzierter Genauigkeit der Symboldaten mit voller Genauigkeit aufweist;
    Dekomprimieren von komprimierten Symboldaten, die in dem Symbolspeicher gespeichert sind; und
    Verwenden der dekomprimierten Symboldaten aus dem Symbolspeicher für eine Demodulation bei der nachfolgenden Iteration.
  12. Nicht-flüchtiges, maschinenlesbares Speichermedium, das mit Befehlen verschlüsselt ist, die, wenn sie durch einen Prozessor in einem Empfänger ausgeführt werden, den Prozessor zum Durchführen einer iterativen Demodulation veranlassen und ein Signal in mehreren Iterationen entschlüsseln, mit:
    einem A-posteriori-Wahrscheinlichkeitsdemodulieren eines empfangenen, eingegebenen digitalen Signals, das Symboldaten mit voller Genauigkeit, die für eine Demodulation in einer ersten Iteration verwendet werden, und Symboldaten mit reduzierter Genauigkeit aufweist, die für eine Demodulation in einer nachfolgenden Iteration verwendet werden, und Abgeben von demodulierten Daten;
    Entschachteln der demodulierten Daten;
    Soft-In/Soft-Out-Entschlüsseln der entschachtelten Daten;
    Verschachteln der entschlüsselten Soft-In/Soft-Out-Daten;
    Komprimieren der Symboldaten mit voller Genauigkeit und Speichern der komprimierten Daten in einem Symbolspeicher, wobei ein Komprimieren der Symboldaten mit voller Genauigkeit ein Quantisieren mit reduzierter Genauigkeit der Symboldaten mit voller Genauigkeit aufweist;
    Dekomprimieren der komprimierten Symboldaten, die in dem Symbolspeicher gespeichert sind; und
    Verwenden der dekomprimierten Symboldaten aus dem Symbolspeicher für eine Demodulation bei der nachfolgenden Iteration.
EP15179282.7A 2014-08-15 2015-07-31 Iterative demodulation und decodierung mit reduziertem speicher Active EP2985916B1 (de)

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US10277448B1 (en) 2017-11-02 2019-04-30 Nxp Usa, Inc. Method for hierarchical modulation with vector processing

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