EP2668575A4 - Procédé et appareil pour compiler des expressions régulières - Google Patents
Procédé et appareil pour compiler des expressions régulièresInfo
- Publication number
- EP2668575A4 EP2668575A4 EP12739626.5A EP12739626A EP2668575A4 EP 2668575 A4 EP2668575 A4 EP 2668575A4 EP 12739626 A EP12739626 A EP 12739626A EP 2668575 A4 EP2668575 A4 EP 2668575A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- regular expressions
- compiling regular
- compiling
- expressions
- regular
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000014509 gene expression Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
- G06F30/343—Logical level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
- G06F30/347—Physical level, e.g. placement or routing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/42—Syntactic analysis
- G06F8/427—Parsing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/443—Optimisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/447—Target code generation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4498—Finite state machines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- Devices For Executing Special Programs (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161436013P | 2011-01-25 | 2011-01-25 | |
PCT/US2012/022435 WO2012103143A2 (fr) | 2011-01-25 | 2012-01-24 | Procédé et appareil pour compiler des expressions régulières |
Publications (3)
Publication Number | Publication Date |
---|---|
EP2668575A2 EP2668575A2 (fr) | 2013-12-04 |
EP2668575A4 true EP2668575A4 (fr) | 2014-07-16 |
EP2668575B1 EP2668575B1 (fr) | 2021-10-20 |
Family
ID=46545129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP12739626.5A Active EP2668575B1 (fr) | 2011-01-25 | 2012-01-24 | Procédé et appareil pour compiler des expressions régulières |
Country Status (7)
Country | Link |
---|---|
US (4) | US8726253B2 (fr) |
EP (1) | EP2668575B1 (fr) |
JP (1) | JP5763783B2 (fr) |
KR (1) | KR101640295B1 (fr) |
CN (1) | CN103547998B (fr) |
TW (1) | TWI506556B (fr) |
WO (1) | WO2012103143A2 (fr) |
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Also Published As
Publication number | Publication date |
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WO2012103143A3 (fr) | 2012-11-15 |
US20170364337A1 (en) | 2017-12-21 |
JP5763783B2 (ja) | 2015-08-12 |
US9792097B2 (en) | 2017-10-17 |
US20160019034A1 (en) | 2016-01-21 |
EP2668575B1 (fr) | 2021-10-20 |
CN103547998A (zh) | 2014-01-29 |
US10089086B2 (en) | 2018-10-02 |
JP2014504767A (ja) | 2014-02-24 |
US9146714B2 (en) | 2015-09-29 |
US8726253B2 (en) | 2014-05-13 |
US20140229925A1 (en) | 2014-08-14 |
CN103547998B (zh) | 2016-11-09 |
TW201246081A (en) | 2012-11-16 |
EP2668575A2 (fr) | 2013-12-04 |
WO2012103143A2 (fr) | 2012-08-02 |
TWI506556B (zh) | 2015-11-01 |
KR20140006913A (ko) | 2014-01-16 |
KR101640295B1 (ko) | 2016-07-15 |
US20120192163A1 (en) | 2012-07-26 |
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