EP2628191A1

EP2628191A1 - Method for producing a semiconductor layer sequence, radiation-emitting semiconductor chip, an optoelectronic component

Info

Publication number: EP2628191A1
Application number: EP11763943.5A
Authority: EP
Inventors: Joachim Hertkorn; Tetsuya Taki; Jürgen OFF
Original assignee: Osram Opto Semiconductors GmbH
Current assignee: Ams Osram International GmbH
Priority date: 2010-10-15
Filing date: 2011-09-30
Publication date: 2013-08-21
Also published as: WO2012049031A1; CN103155180B; TW201234421A; DE102010048617A1; KR20130061182A; CN103155180A; US20130264598A1; US9337388B2; JP2013543265A

Abstract

The invention relates to a method for producing a semiconductor layer sequence, which is based on a nitride compound semiconductor material and which comprises a microstructured outer surface, to a semiconductor chip produced using said method, and to an optoelectronic component comprising such a semiconductor chip. The method has the following steps: A) growing at least one first semiconductor layer of the semiconductor layer sequence on a substrate; B) applying an etch-resistant layer on the first semiconductor layer; C) growing at least one further semiconductor layer on the layer sequence obtained in step B); D) separating the semiconductor layer sequence from the substrate, a separating zone of the semiconductor layer sequence being at least partly removed; E) etching the obtained separating surface of the semiconductor layer sequence by means of an etching means such that a microstructuring of the first semiconductor layer is carried out and the microstructured outer surface is formed.

Description

description

Method for producing a semiconductor layer sequence, radiation-emitting semiconductor chip and

opto-electronic component

The invention relates to a method for producing a semiconductor layer sequence, in particular a

A semiconductor layer sequence for a radiation-emitting semiconductor chip, for example a thin-film light-emitting diode chip, as well as the radiation-emitting semiconductor chip produced by the method and a

Optoelectronic component, such a

radiation-emitting semiconductor chip.

To increase the extraction efficiency of nitride-based LEDs and to produce a microstructured surface of a required semiconductor layer sequence is often after a laser lift-off step at the obtained

Surface of the semiconductor layer sequence performed a Aufrauschritt means of a corrosive medium. However, there is a need to further improve the extraction efficiency of semiconductor layer sequences thus obtained. It is therefore an object of the present invention to provide a method and a patterned fabric produced therewith

Specify a semiconductor layer sequence in which the

Extraction efficiency of the radiation-emitting

Semiconductor layer sequence compared to the prior art is improved and / or less for the desired use or poorly suited semiconductor layer sequences are obtained. This object is solved by the subject matter of the independent claims. Subclaims, description and

Examples teach advantageous embodiments and

Further education.

The method according to the invention relates to the production of a semiconductor layer sequence which has a microstructured outer surface and is based on nitride compound semiconductor material. It includes the following

Steps:

A) First, on a substrate, a first

Semiconductor layer of the semiconductor layer sequence

grew up;

B) subsequently, an etching stop layer is applied to this first semiconductor layer;

C) at least one further semiconductor layer is grown on the layer sequence obtained in step B);

D) the semiconductor layer sequence is separated from the substrate by a separation zone of the semiconductor layer sequence is at least partially removed (that is, in particular decomposed or

gets destroyed;

E) the separation surface of the separation surface produced by the separation step

Semiconductor layer sequence is treated with an etchant

so that the microstructuring of the first semiconductor layer, in particular the outer surface of the first semiconductor layer, takes place, and the microstructured outer surface of the semiconductor layer sequence is formed.

"Based on nitride compound semiconductor material" according to the application means that the semiconductor layer sequence, which is produced in particular epitaxially, and which regularly has a layer sequence of several different individual layers, at least one single layer containing a material of nitride compound semiconductor material. In particular, the

Layer having the microstructured outer surface, this material or consists thereof; Furthermore, an active layer contained in the semiconductor layer sequence can also comprise or consist of a nitride compound semiconductor material. According to an embodiment, all layers of the membrane can also be used, with the exception of the etching stop layer

Semiconductor layer sequence consist of or comprise the nitride compound semiconductor material.

According to the application, microstructured means that on the microstructured surface, i. H. the outer surface of the

Semiconductor layer sequence, at least in some areas

Elevations and subsidence are located. These

In particular, microstructuring is chemically generated, in particular by virtue of the fact that chemical

Reaction structures are introduced into the surface to be structured, or - if in the zu

Structural surface already structures are present - to produce a structural profile, in which there are higher elevations and / or deeper subsidence. The microstructures can be relief or trench-like; in particular, however, it may be a structure based essentially on regular polyhedral structures or structures derived from polyhedra. In particular, such polyhedra in

different sizes (that is, that the individual polyhedra have different volumes) or with im

Essentially the same sizes are present. Under "from

Polyhedron-derived structures "are understood in particular structural elements in which the of the

Semiconductor layer sequence opposite tip in the manner of a Polyeders is trained, but not one of

Etch stop layer facing base surface or the interface with adjacent structural elements.

The application according to the method for microstructuring is based on the idea, after the epitaxial

Growing the semiconductor layer sequence on a

with regard to the growth conditions largely optimized growth substrate and the interim application of the etch stop layer, the semiconductor layer sequence of

Separate growth substrate. This separation takes place in a separation zone of the semiconductor layer sequence which is at least partially removed, in particular decomposed.

This is followed by the microstructuring of the surface obtained during the separation. According to the invention, it has now been recognized that by introducing an etching stop layer which directly adjoins the first semiconductor layer etched in the later microstructuring step, a more efficient implementation of the microstructuring is possible and, moreover, less rejects are produced. According to the state of

For a given semiconductor layer follower system, the technique is first of all to determine the roughening times experimentally in order, on the one hand, to the greatest extent possible, the desired outcoupling structures, in particular crystal facets,

to generate and thus a particularly high

On the other hand, however, to choose the etching time such that the layers which are adjacent to the semiconductor layer provided for the microstructuring are the extraction efficiency

Semiconductor layer sequence adjacent, not also etched by the etching medium. The latter can ultimately - especially if the active zone of

Semiconductor layer sequence by contact with the

Caustic is affected - to short circuits and thus to Total failure of a component or a

Lead semiconductor layer sequence.

The etch stop layer provided according to the invention therefore represents a targeted safeguard against excessively strong etching of the semiconductor layer sequence, with which, in particular, etching of layers other than the first layer of the

Semiconductor layer sequence can be prevented or at least greatly reduced. Consequently, the proportion of non-functional components or semiconductor layer sequences can be significantly reduced, although the length of the roughening time (or the exposure time of the etching medium) can be chosen so that the resulting microstructure (or the radiation decoupling structure)

Extraction efficiency of the component is optimal. Based on the total number of simultaneously produced

Semiconductor layer sequences sets themselves by the lower proportion of non-functional components a better yield, even if the extraction efficiency of the individual radiation-emitting semiconductor layer sequence is not increased compared to a semiconductor layer sequence produced according to the prior art.

According to one embodiment of the application according to the application

Process possesses the nitride compound

Semiconductor material, the chemical formula In _x Al _y Gai- _x - _y N, where 0 <x <1, 0 <y <1 and x + y <1. This material does not necessarily have to be mathematically exact

Having composition according to the above formula. Rather, it may, for example, one or more

Have dopants and additional components. For the sake of simplicity, however, the above formula includes only the essential constituents of the crystal lattice (AI, Ga, In, N), even though these are partly due to lower

Quantities of other substances can be replaced and / or supplemented. For example, one or more layers of the

Semiconductor layer sequence may be formed from the compound semiconductor material AlGalnN. This

Semiconductor material is especially for light emitting diodes

suitable that emit electromagnetic radiation in the ultraviolet to blue spectral range. In order to generate white light, a part of the emitted primary radiation can be converted by means of a luminescence conversion substance into a

Long-wave radiation are converted, so that by mixing of primary radiation and the thus generated

Secondary radiation, for example, gives white light.

The application according to the semiconductor layer sequence can

for example, a conventional pn junction, a

Double heterostructure, a single quantum well structure

(SQW structure) or a multiple quantum well structure (MQW structure). The term quantum well structure encompasses in particular any structure in which

Charge carriers by confinement

Quantization of their energy states.

In particular, the term quantum well structure does not include information about the dimensionality of the quantization.

It thus includes u.a. Quantum wells, quantum wires and

Quantum dots and any combination of these structures.

According to one embodiment, the first layer of the semiconductor layer sequence (ie the layer which is later patterned with the etchant) comprises or consists of In _x Ga _x -x N, where 0 <x <1 and may, for example

Gallium nitride or include this. Gallium nitride GaN and indium gallium nitride In _x Ga _x N are especially so especially good because with these

Materials regarding stress compensation and

subsequent application of the etch stop layer,

For example, a ceramic etch stop layer of silicon nitride, particularly good results can be achieved.

The etch stop layer used according to the invention is in particular formed from a conductive material. In particular, the material is the

Etch stop layer to a material by the etchant, in particular a wet chemical etchant such

for example, KOH solution, essentially not

is attacked. "Essentially unaffected" may mean that the rate at which the etch stop layer is removed by the etchant, in particular a wet-chemical etchant, is at least a factor of 20, but is usually at least 100 times smaller than the speed the semiconductor material of the first layer of

Semiconductor layer sequence is removed. In particular, this is understood to mean the removal rate of In _x Gai- _x N in the region of the crystal defects or amorphous structures (that is to say in particular to the formation of crystal facets), which is approximately in the range of 200 -300 nm per

Minute, but it depends on the temperature. Such a specification can, for example

meet ceramic materials, such as metal or

Semimetal oxides or nitrides. If the thickness of the

Etching stop layer is thin enough, so ceramic materials such. Silicon oxide also the specification of the conductivity (in the lateral direction, ie transversely to

Layer stack of the semiconductor layer sequence). The etch stop layer may comprise, for example, silicon nitride, silicon dioxide and / or magnesium nitride or

consist of it. However, these include not only the materials with exact stoichiometry of silicon,

To understand magnesium, nitrogen and oxygen; Rather, materials are not complete

Stoichiometric structure under the term silicon nitride, silicon oxide and magnesium nitride.

The application of the ceramic etching stop layers can

especially in situ during an epitaxial process to produce the remaining layers of the

Semiconductor layer sequence take place. For example, a silicon nitride layer may be formed by using a

Silane (for example, S1H ₄ ) and ammonia are generated and a magnesium nitride layer by using Cp ₂ Mg and an N ₂ source to which O _{2 is} added. Accordingly, silicon oxide layers as well as layers of other ceramic materials can be obtained.

According to another disclosed embodiment, the

Etch stop layer has a thickness that is less than or equal to 5 nm. In particular, the thickness can be greater or less

be equal to 0.2 nm and be, for example, 0.4 to 2 nm. Frequently, a layer thickness of up to 1 nm will be useful. In particular, by means of such a layer thickness ensures that a "Durchätzen the first

Semiconductor layer of the semiconductor layer sequence "and an adjacent layer can be effectively prevented, while maintaining the lateral conductivity and finally (especially in layers of silicon nitride, silicon oxide and magnesium nitride) a problem Growth of the further semiconductor layer (s) according to step C) of the method according to the application is possible. This can be seen in particular against the background that the "first layer" (before the etching step is performed) can often have a thickness of up to 5 μπι and secondly against the background that the exposure time of the etching medium often about 5 to 20 minutes, for example about 10 minutes. The layer thickness according to this imple mentation form ensures that at places where z. B. due to a particularly high

Crystal defect density, the "first layer" is removed relatively quickly by the etchant, the thickness of the

Etch stop layer can effectively prevent etching of the further layers of the semiconductor layer sequence.

According to the application, the thickness of the etch stop layer is understood to be the average or average thickness of the etch stop layer, which is determined, for example, by evaluation of TEM images (transmission electron micrographs) of a layer sequence segment represented by a lateral

Section through the layer sequence was obtained, can be determined. During the process, the layer thickness can be influenced to such an extent that, on the basis of empirical investigations, the exposure time of the films used for the

Etch stop layer used precursor materials

is adjusted accordingly.

In the obtained by the method according to the application

Semiconductor layer sequence covers the etch stop layer formed on the first layer, the underlying first

Layer usually completely or mostly

Completely. For the most part, it is to be understood in full that at least 70% of the first layer is associated with the Etch stop layer are covered. However, more than 90%, for example more than 98%, of the first layer may also be covered. If there is no complete coverage, the areas of the first layer that are not covered by the etch stop layer are usually distributed irregularly across the interface. The size of the areas not covered by the etching stop layer also varies.

The cause of such a non-completely occluding etch stop layer may be in the deposition process which, when in situ during epitaxy of the

Semiconductor layer sequence takes place (unlike, for example, in a deposition method using Atomic Layer

Deposition) no layers with essentially

produces uniform layer thickness, but allows relatively large fluctuation ranges and, accordingly, with sufficiently small layer thickness also to areas in which no layer is produced, can result. If a complete layer with essentially the same layer thickness is to be produced, this can however be done by means of atomic layers

Deposition (ALD) or by organometallic

Gas phase epitaxy (MOVPE) with correspondingly long

Abscheidedauern be generated. The degree of coverage of the first layer with the

Etch stop layer can be determined, for example, in that, in the case of a finished semiconductor layer sequence, first the (microstructured) first layer is largely removed by means of a mechanical method or

is thinned and subsequently the remaining layer of, for example, 100 nm thickness by means of the etching medium from step E) is completely removed. This can be achieved that the exposure time of the etching medium can be so short on the semiconductor layer sequence, that although the remaining remnants of the first layer of

Semiconductor layer sequence are removed, but the adjacent Ätzstoppschicht is attacked only slightly.

The training in size and arrangement of regular etch stop layer-free areas can by means of

Photolithographic process can be achieved. However, this requires that the application of the etch stop layer or the introduction of the etch stop layer-free areas can not be done in situ with the epitaxial method, but that the corresponding steps must be performed ex situ. Accordingly, such a method is also more complex.

The presence of etch stop layer-free regions can be advantageous, in particular against the background, in that the further layers of the semiconductor layer sequence applied in method step C) are deposited on the surface of the first layer which is exposed in these regions

Semiconductor layer sequence can be epitaxially grown epitaxial and by means of epitaxial lateral overgrowth

(ELO) faster the complete layer following the etch stop layer can be obtained. However, it has been recognized according to the invention that the presence of

Etch stop layer-free areas not required for the growth of the other layers

Semiconductor layer sequence but that succeeds even with a complete coverage of the first layer. The

For example, overgrowth of a completely closed silicon nitride layer can be easily achieved by using AlGaN or AlN or other aluminum-containing layers However, an overgrowth with non-aluminum-containing layers is possible.

As a growth substrate according to the application usually a sapphire substrate is used. This is in a big way

Wavelength range for electromagnetic radiation well-permeable, which, for example, in terms of

Separation step D) and with respect to the decomposition of

Material of the separation zone, for example of gallium nitride or indium gallium nitride, is of importance. Alternatively, as a growth substrate but also from another

Be formed material, for example, silicon carbide or silicon. Before applying the first layer of

Semiconductor layer sequence, a buffer layer can be applied to the substrate. Such a buffer layer may serve to provide an optimal growth surface for subsequent growth of the layers

Produce semiconductor layer sequence. she can

in particular serve differences between the

Lattice constants of the substrate and the

Semiconductor layer sequence as well as crystal defects of the

Balance substrate.

The at least partially removed in step D),

In particular, decomposed separation zone is either a part of the first layer of the semiconductor layer sequence or one between the first layer and the substrate

or an optional buffer layer disposed ^¬ own release layer. They can also form at least part of the buffer layer. As a rule, the separation zone comprises nitride compound semiconductor material or consists thereof, wherein the nitride compound semiconductor material is usually decomposed such that gaseous nitrogen is formed. As a separation method, this is particularly preferably a laser Abhebe method (also called laser Liftoff short). Also an ion implantation, in which in

Separation zone, for example, H ⁺ ions or noble gas ions are introduced, which subsequently form small gas bubbles and after heat treatment larger bubbles, which allow separation of the substrate, is possible. Anisotropic residues of a constituent of the separating layer, in particular of a metallic constituent, often remain at the separating surface during the separation processes

Separation layer.

According to one embodiment, the semiconductor layer sequence at the separating surface may be a part of the substrate downstream of the separating surface as viewed from the substrate

Semiconductor layer sequence have increased defect density.

The separation zone is often gallium nitride or essentially comprises only gallium nitride. On the separation surface of the semiconductor layer sequence then often remain anisotropic

Residues of metallic Ga back.

If residues remain on the separating surface of the semiconductor layer sequence, they can be completely or at least largely removed by means of a pre-etching step carried out before step E). Such a Vorätzschritts, for example, using the residues as

Etching mask for a dry etching by means of a

gaseous etchant or by means of a wet-chemical Corrosive material to be performed erosion.

Preferably, at the same time the residues are at least largely eliminated. These residues remain after the separation step first on the

Separation surface as a continuous, island-like or reticulate layer or structures.

In such an optional pre-etching step, depending on the layer thickness of the residues, regions of the semiconductor layer sequence can also already be etched to different extents, so that a roughening of the separating surface of the semiconductor layer sequence already results from this. The method according to the invention now has the advantage that even in the region in which residues are initially present, an optimum formation of an etching structure can be obtained without the etching being so extensive in the regions in which no residues existed from the beginning in that the first semiconductor layer is the

Semiconductor layer sequence is completely removed and therefore the subsequent layer is affected by the etching medium.

The pre-etching step can also be omitted if, during the separation of the semiconductor layer sequence from the growth substrate, only insignificant residues remain on the separation surface or these can be removed anyway with the etchant according to step E) without the intention thus intended

Significantly influence microstructuring.

According to one embodiment, in method step E), the first layer is etched by etching

Semiconductor layer sequence exposed different crystal facets. This can be done in particular if an attack of the etchant predominantly on crystal defects takes place and thus different crystal facets

be selectively etched. The etchant can thereby

especially wet-chemical or gaseous and comprise an acid or a base. The gaseous etchant may be a corrosive gas such as hydrogen or chlorine, which may be used at elevated temperatures, for example. As a wet-chemical etchant comes

especially aqueous alkali metal hydroxide,

for example KOH. Alkali hydroxides are particularly preferred as the etchant.

The crystal facets formed can in particular form a pyramid-like structure. The outer surface of the

Semiconductor layer sequence then has a structure which is formed by a plurality of pyramid-like elevations. A pyramid-like elevation is a polyhedron bounded by a mantle, a bottom and a top surface. The lateral surface has at least three

Side surfaces that converge and limit the top surface laterally. Often there are structures derived from ideal pyramids, which have no top surfaces and only consist of shell and bottom surfaces. Furthermore, the bottom surface of the pyramids is often hexagonal. The side surfaces of the pyramidal survey thus run towards the bottom surface, which in turn faces the Ätzstoppschicht. The pyramid-like structure is usually also characterized in that although the tip is formed in the manner of a pyramid, but not the

Etch stop layer facing base surface or the interface with adjacent pyramids.

According to one embodiment, the method can be carried out in particular such that the nitride compound Semiconductor material is consumed so that the 000-1- crystal face, ie the N-face of the nitride grating faces the substrate. In the etching step, therefore, the N-face of the semiconductor layer sequence is etched, which is possible for example by means of alkali metal hydroxide. The Ga-face of the grating does not or only in such an etching step

insignificantly affected.

According to a further disclosed embodiment can on the

epitaxially grown semiconductor layer sequence a

Mirror layer are applied. At a

By means of such a mirror layer, at least part of the electromagnetic radiation generated in the radiation-emitting semiconductor layer sequence can be injected into the

Semiconductor layer sequence are reflected back. By means of such a mirror layer, therefore, the efficiency of a radiation-emitting semiconductor layer sequence can be increased by radiation in the direction of

Light extraction surface, d. H. the microstructured outer surface is deflected. The application of the

Mirror layer can be done before or after the microstructuring and before or after the separation of the substrate.

An electromagnetic radiation emitting semiconductor chip manufactured according to the method according to the invention has at least one epitaxially produced one

Semiconductor layer sequence, which is an n-type

Semiconductor layer, a p-type semiconductor layer and a region disposed between these layers, which can generate electromagnetic radiation in operation on. The semiconductor layer sequence also has a

microstructured outer surface on and adjacent to the electromagnetic radiation generating area facing surface of the radiation decoupling layer on an etch stop layer. At least one of the

Semiconductor layers contains a nitride compound semiconductor material.

The radiation-emitting semiconductor chip may further comprise one or more features described above with respect to the method. As a radiation-emitting semiconductor chip comes

in particular a thin-film LED chip into consideration. A thin-film light-emitting diode chip is characterized in particular by the following characteristic features:

on a first main surface of a radiation-generating end facing towards a carrier element

Epitaxial layer sequence is applied or formed a reflective layer, which reflects back at least a part of the electromagnetic radiation generated in the epitaxial layer sequence;

- The epitaxial layer sequence has a thickness in the range of 20μπι or less, in particular in the range of 10 μπι on; and

the epitaxial layer sequence contains at least one semiconductor layer having at least one surface which has a mixing structure which, in the ideal case, results in an approximately ergodic distribution of the light in the

epitaxial epitaxial layer sequence, ie it has a possible ergodisch stochastic scattering behavior. A basic principle of a thin-film light-emitting diode chip is described, for example, in I. Schnitzer et al. , Appl. Phys. Lett. 63 (16), 18 October 1993, 2174 - 2176, the Revelation content hereby by reference

is recorded.

A thin-film LED chip is a ^Lambertian surface emitter to a good approximation and is therefore suitable particularly well for the application in a headlight.

The invention is basically not restricted to the use of the semiconductor layer sequence in a thin-film light-emitting diode chip, but can basically be used wherever epitaxially produced and detached from the growth substrate

Semiconductor layer sequence microstructured surfaces are needed.

The radiation-emitting semiconductor chip according to the application, which may, for example, be a thin-film light-emitting diode chip, may be contained in particular in an optoelectronic component.

For contacting the semiconductor chip, the latter may have a contact pad on the microstructured outer surface,

in particular a contact metallization for the electrical connection of the semiconductor layer sequence. For this purpose, conventionally known metallization layers are suitable. Alternatively, however, a contacting of the microstructured side opposite side of the semiconductor layer sequence can take place, which then allows a flip-chip design.

Next advantages and advantageous embodiments and embodiments of the invention will become apparent from the im

Described below in conjunction with the figures Execution forms. Same or equal acting

Components are provided with the same reference numerals. The sizes of the components as well as the

Size ratios of the constituents and in particular of the layers with one another are not to be regarded as true to scale.

In the figures: FIGS. 1A to 1F show a schematic representation of a

Procedure for producing a

radiation-emitting semiconductor chips,

FIG. 2: an SEM image of a microstructured one

Semiconductor surface,

FIGS. 3A and 3B: SEM images of a microstructured one

Semiconductor surface with an acceptance angle of 90 ° and 60 °.

In the method sequence shown schematically in FIGS. 1A to 1F, a GaN buffer layer 2, which can optionally also be Si-doped, is initially provided on a growth substrate 1, for example made of sapphire, Sic or Si, by means of MOVPE, and a Si-doped GaN. Contact layer 3 grown.

When growing the epitaxial layer sequence by means of MOVPE, the 000-1 crystal face (N face of the hexagonal nitride lattice) is usually turned towards the sapphire growth substrate. On the contact layer 3, which is generally in the context of the present application as "first

Layer of the semiconductor layer sequence "is called, then by MOVPE of silane and ammonia a

Silicon nitride layer as etch stop layer 4 with a Thickness of 0.5 nm generated (see Figure 1A). Alternatively, for example, a silica or

Magnesium nitride layer are deposited. Subsequently, further semiconductor layers are applied to the etch stop layer 4 by means of MOVPE. These are in particular (a) a Si-doped GaN cover layer 5, (b) a

electromagnetic radiation (in particular green or blue light) generating layer 6 having a multi-quantum well structure with a plurality of InGaN quantum wells and GaN barriers between them and (c) a p-doped AlGaN capping layer 7 (see FIG. 1B). A further p-doped GaN layer may follow the cover layer 7 (not shown). A metallic mirror layer 8 is subsequently applied to the semiconductor layer sequence 10, and the electromagnetic radiation generated in the active layer 6 is returned to the semiconductor layer sequence 10 or toward the later microstructured outer surface

can reflect. As mirror material is suitable

For example, silver or aluminum (see Figure 1B).

The semiconductor layer sequence will be described below with the

Mirror side connected to an electrically conductive carrier body 9, which may be formed for example of silicon, gallium arsenide, germanium or molybdenum. This can be done for example by eutectic bonding, soldering or gluing. Subsequently, the sapphire substrate 1 by means of a laser lift-off process, which is indicated in Figure IC by the arrows 20, are separated. The buffer layer 2 is decomposed in such a way that

gaseous nitrogen is produced; if necessary, residues of metallic gallium on the Surface remain (not shown). A corresponding laser lift-off method is for example in the

W098 / 14986A1, to the disclosure of which reference is made in this regard in its entirety. When

Radiation source for the laser lift-off method, for example, a laser radiation source with a

Wavelength can be used in the range between 350 nm and 360 nm or shortwave. The remaining contact layer 3 is subsequently exposed to an etchant 30 which etches away the GaN material (compare FIG. 1D). In this case, alkali metal hydroxide is preferably used as etchant. For example, can be etched with KOH in 30% solution at a temperature of about 70 ° C, wherein the etching time is about 10 minutes.

With this etchant also gallium residues are usually removed. If appropriate, however, a pre-etching step with, for example, KOH in substantially more dilute form than etchant can also be used for this purpose.

The etching step becomes different

Crystal facets of the contact layer 3 exposed

(compare Figure IE). The etchant etches primarily on the crystal defects. In this respect, at the transition between two structural elements produced by the etching

microstructured outer surface, in particular on formed polyhedra, corresponding etching traces are detected. These etching traces result from the different

Etching behavior of the 000-1 crystal faces and thereon

adjacent crystal surfaces that occur especially in the range of such transitions. The presence of 000-1- crystal surfaces or the N-face can by means of X-ray spectroscopy can be detected. In contrast to polyhedra grown by epitaxy, the structuring obtained with the method according to the application therefore has etching traces, in particular in the area of the surfaces which are not 000-1 crystal surfaces.

In the example described, the entire buffer layer 2 is decomposed during the laser lifting process, so that it represents a separation zone or separation layer. Alternatively, the buffer layer 2 and the laser lift-off method can be coordinated so that only a part of the

Buffer layer 2 or a part of the contact layer 3 are decomposed. The microstructuring of the contact layer 3 produces a roughening on a scale which corresponds to the blue spectral range of the visible spectrum

electromagnetic radiation corresponds. The

Roughening structures are particularly in the

Magnitude of half an internal wavelength of the electromagnetic radiation generated in the active semiconductor layer.

Figure 2 shows a surface of a contact layer 3 of GaN after an etching step with 30% KOH solution at about 70 ° C, in which the exposure time is 10 minutes optimally matched to the thickness of the cover layer, so that a substantially complete coverage of the Surface with crystal facets results and lying under the microstructured surface etching stop layer 4 is not visible. For comparison, the etching step was carried out much longer under the same conditions as mentioned above, for example, about 14 Minutes. It turns out that by longer etching between microstructured surface regions of the contact layer 3, the etch stop layer 4 can be partially recognized. Even more clearly than FIG. 3A, this shows the SEM image in FIG. 3B, in which the individual polyhedra of FIG

Microstructuring are clearly visible and there are unstructured areas between them, in which thus the etch stop layer 4 is visible. To improve the roughening effect, the

Contact layer 3, at least in the area adjacent to the buffer layer 2 region in comparison to the subsequent layers 5, 6 and 7 have increased defect density. Furthermore, the contact layer 3 at least at the

Buffer layer side facing a silicon

Dopant concentration of 1 x 10 cm to 1 x 10 cm have. This allows a simple production of an ohmic contact on the contact layer 3. An electrical connection can subsequently be applied to the semiconductor layer sequence having a microstructured surface, in particular of (GaN) polyhedra, shown in FIG. 1C (FIG. 1F). For example, this is a bond pad 11, in particular a bond pad metallization for electrically connecting the n-side of

Semiconductor layer sequence 10 applied.

On the side of the carrier body 9 facing away from the semiconductor layer sequence 10, a contact layer 12 for the electrical connection of the light-emitting diode chip is applied before or after its connection to the semiconductor layer sequence 10. The imple mentation form shown in Figure 1F may alternatively also by a for a flip-chip mounting

suitable form of execution. In this case, there is no contact 11 on the cover layer; the n-contact is rather by means of vias, d. H. of the

Carrier side 10 ago.

The invention is not limited by the description based on the embodiments of these. Rather, it encompasses any new feature as well as any combination of features, even if that feature or combination is included in the

Embodiments or claims is not explicitly stated. This patent application claims the priority of

German Patent Application 10 2010 048 617.5, whose

The disclosure is hereby incorporated by reference.

Claims

claims

1. A method for producing a

Semiconductor layer sequence (10) based on nitride compound semiconductor material and with a

microstructured outer surface with the following steps:

A) growing at least a first semiconductor layer (3) of the semiconductor layer sequence (10) on a substrate (1);

B) applying an etch stop layer (4) on the first

Semiconductor layer (3);

C) growing at least one further semiconductor layer on the layer sequence obtained in step B);

D) separating the semiconductor layer sequence (10) from the substrate (1) by at least partially removing a separation zone of the semiconductor layer sequence;

E) etching the resulting interface of the

Semiconductor layer sequence (10) by means of an etchant (30), so that a microstructuring of the first

Semiconductor layer (3) takes place and the microstructured outer surface is formed.

2. Method according to the preceding claim, wherein at least one layer of the semiconductor layer sequence (10) comprises a material of the formula In _x Al _y Gai _x - _y N with 0 <x <1, 0 <y <1 and x + y <1 or consists of.

3. The method according to any one of the preceding claims, wherein the first layer (3) of the semiconductor layer sequence (10) In _x Gai- _x N with 0 <x <1 comprises or consists thereof.

4. The method according to any one of the preceding claims, wherein the Ätzstoppschicht (4) comprises a ceramic material or consists thereof.

5. Method according to the preceding claim, wherein the etch stop layer (4) comprises or consists of silicon nitride, silicon oxide and / or magnesium nitride.

6. The method according to any one of the preceding claims, wherein the thickness of the Ätzstoppschicht (4) is less than or equal to 5 nm and in particular 0.4 to 2 nm.

7. The method according to any one of the preceding claims, wherein the etchant (30) is a base, in particular a

Alkali hydroxide, or an acid.

8. The method according to any one of the preceding claims, wherein in step E) different crystal facets are exposed.

9. The method according to any one of the preceding claims, wherein the semiconductor material is grown on the substrate (1), that the N-face of the nitride lattice facing the substrate (1).

10. The method according to any one of the preceding claims, wherein the separating of the semiconductor layer sequence (10) by means of a lift-off method, in particular by means of a laser Abhebe method (20).

11. The method according to any one of the preceding claims, wherein before or after step E), a mirror layer (8) is applied to the semiconductor layer sequence (10), the at least a portion of a in the semiconductor layer sequence (10) generated in operation and the mirror layer (8). down directed electromagnetic radiation back into the semiconductor layer sequence (10).

12. A radiation-emitting semiconductor chip, in particular produced according to one of the preceding claims, comprising an epitaxially produced

Semiconductor layer sequence (10), which is an n-type

Semiconductor layer (5), a p-type semiconductor layer (7) and arranged between these layers

Radiation generating area (6), wherein the

Radiation decoupling layer of the semiconductor chip has a microstructured outer surface and is formed adjacent to the radiation decoupling layer, an etching stop layer (4), wherein at least one of

Semiconductor layers comprises a nitride compound semiconductor material.

13. Radiation-emitting semiconductor chip after the

previous claim, wherein

the etch stop layer (4) at least 70%, in particular 80-90%, of the interface between the radiation-outcoupling layer and the second semiconductor layer, which is applied to the

Etch stop layer (4) follows, occupies.

14. Radiation-emitting semiconductor chip after the

previous claim, wherein

Interfacial areas in which the

Radiation decoupling layer and the second

Semiconductor layer directly adjoin one another

have different size and are distributed irregularly over the interface.

15. An optoelectronic component comprising a radiation-emitting semiconductor chip according to any preceding claim.