EP2564677A4 - Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies - Google Patents
Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassembliesInfo
- Publication number
- EP2564677A4 EP2564677A4 EP10850903.5A EP10850903A EP2564677A4 EP 2564677 A4 EP2564677 A4 EP 2564677A4 EP 10850903 A EP10850903 A EP 10850903A EP 2564677 A4 EP2564677 A4 EP 2564677A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- subassemblies
- interconnect
- methods
- printed circuit
- circuit boards
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
- H05K2201/09527—Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2010/033295 WO2011136817A1 (en) | 2010-04-30 | 2010-04-30 | Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2564677A1 EP2564677A1 (en) | 2013-03-06 |
EP2564677A4 true EP2564677A4 (en) | 2015-06-24 |
Family
ID=44861849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10850903.5A Withdrawn EP2564677A4 (en) | 2010-04-30 | 2010-04-30 | Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP2564677A4 (en) |
KR (1) | KR101694575B1 (en) |
CN (1) | CN103026805A (en) |
WO (1) | WO2011136817A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102172678B1 (en) * | 2014-02-17 | 2020-11-02 | 엘지이노텍 주식회사 | Printed circuit board and method for manufacturing the same |
WO2015129061A1 (en) * | 2014-02-27 | 2015-09-03 | 京セラ株式会社 | Piezoelectric actuator, and piezoelectric vibration device, portable terminal, acoustic generator, acoustic generation device, and electronic device provided therewith |
TWI657721B (en) | 2018-04-02 | 2019-04-21 | 欣興電子股份有限公司 | Circuit board, package structure and method of manufacturing the same |
CN110349934B (en) * | 2018-04-02 | 2021-08-03 | 欣兴电子股份有限公司 | Circuit board, packaging structure and manufacturing method thereof |
CN112839451B (en) * | 2019-11-25 | 2022-09-20 | 鹏鼎控股(深圳)股份有限公司 | Manufacturing method of rigid-flex board and rigid-flex board |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020117743A1 (en) * | 2000-12-27 | 2002-08-29 | Matsushita Electric Industrial Co., Ltd. | Component built-in module and method for producing the same |
JP2004327510A (en) * | 2003-04-22 | 2004-11-18 | Matsushita Electric Works Ltd | Copper-plated laminated board for multilayered printed wiring board, multilayered printed wiring board and method of manufacturing the same |
US20080016685A1 (en) * | 2005-04-07 | 2008-01-24 | Fujikura Ltd. | Wiring board, multilayer wiring board, and method for manufacturing the same |
US20100018758A1 (en) * | 2008-07-28 | 2010-01-28 | Fujitsu Limited | Printed wiring board |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5613033A (en) * | 1995-01-18 | 1997-03-18 | Dell Usa, Lp | Laminated module for stacking integrated circuits |
DE19756818A1 (en) * | 1997-12-19 | 1999-06-24 | Bosch Gmbh Robert | Multi-layer circuit board |
JP2004186235A (en) * | 2002-11-29 | 2004-07-02 | Ibiden Co Ltd | Wiring board and method for manufacturing the same |
US6972382B2 (en) * | 2003-07-24 | 2005-12-06 | Motorola, Inc. | Inverted microvia structure and method of manufacture |
US7250675B2 (en) * | 2005-05-05 | 2007-07-31 | International Business Machines Corporation | Method and apparatus for forming stacked die and substrate structures for increased packing density |
KR100716826B1 (en) * | 2005-05-10 | 2007-05-09 | 삼성전기주식회사 | Manufacturing method of printed circuit board with embedded Electronic Component |
US7523545B2 (en) * | 2006-04-19 | 2009-04-28 | Dynamic Details, Inc. | Methods of manufacturing printed circuit boards with stacked micro vias |
-
2010
- 2010-04-30 WO PCT/US2010/033295 patent/WO2011136817A1/en active Application Filing
- 2010-04-30 EP EP10850903.5A patent/EP2564677A4/en not_active Withdrawn
- 2010-04-30 CN CN2010800678433A patent/CN103026805A/en active Pending
- 2010-04-30 KR KR1020127031290A patent/KR101694575B1/en active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020117743A1 (en) * | 2000-12-27 | 2002-08-29 | Matsushita Electric Industrial Co., Ltd. | Component built-in module and method for producing the same |
JP2004327510A (en) * | 2003-04-22 | 2004-11-18 | Matsushita Electric Works Ltd | Copper-plated laminated board for multilayered printed wiring board, multilayered printed wiring board and method of manufacturing the same |
US20080016685A1 (en) * | 2005-04-07 | 2008-01-24 | Fujikura Ltd. | Wiring board, multilayer wiring board, and method for manufacturing the same |
US20100018758A1 (en) * | 2008-07-28 | 2010-01-28 | Fujitsu Limited | Printed wiring board |
Non-Patent Citations (1)
Title |
---|
See also references of WO2011136817A1 * |
Also Published As
Publication number | Publication date |
---|---|
KR20130059356A (en) | 2013-06-05 |
EP2564677A1 (en) | 2013-03-06 |
CN103026805A (en) | 2013-04-03 |
WO2011136817A1 (en) | 2011-11-03 |
KR101694575B1 (en) | 2017-01-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20121120 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR |
|
DAX | Request for extension of the european patent (deleted) | ||
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: VIASYSTEMS TECHNOLOGIES CORP., L.L.C. |
|
RA4 | Supplementary search report drawn up and despatched (corrected) |
Effective date: 20150527 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H05K 3/46 20060101AFI20150519BHEP |
|
17Q | First examination report despatched |
Effective date: 20180222 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN WITHDRAWN |
|
18W | Application withdrawn |
Effective date: 20190603 |