CN113937072A

CN113937072A - Component carrier and method for producing the same

Info

Publication number: CN113937072A
Application number: CN202010671119.7A
Authority: CN
Inventors: 米凯尔·图奥米宁; 郑惜金
Original assignee: AT&S Austria Technologie und Systemtechnik AG
Current assignee: AT&S Austria Technologie und Systemtechnik AG
Priority date: 2020-07-13
Filing date: 2020-07-13
Publication date: 2022-01-14

Abstract

The present application provides a component carrier (100), the component carrier (100) comprising a layer stack (102), the layer stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106), a component (108) located on the layer stack (102) and/or in the layer stack (102), and at least one continuous vertical through-connection (110), the at least one continuous vertical through-connection (110) extending between two opposite main surfaces of the component (108) and extending straight through the component (108) and continuing to extend straight through at least one further structure (112) of the component carrier (100). The present application also provides a method of manufacturing a component carrier (110).

Description

Component carrier and method for producing the same

Technical Field

The invention relates to a component carrier. Furthermore, the invention relates to a method of manufacturing a component carrier.

Background

Against the background of the ever increasing product functionality of component carriers equipped with one or more electronic components, the miniaturization of such components, and the increasing number of components to be mounted on the component carriers, such as printed circuit boards, more powerful array-like components or packages with components are employed, which have a plurality of contact portions or connection portions, the spacing between which is increasingly smaller. The removal of heat generated by these components and the component carriers themselves during operation becomes an increasingly serious problem. At the same time, the component carrier should have mechanical strength and electrical reliability in order to be able to operate even under severe conditions.

However, the integration density of such component carriers may still be increased.

Disclosure of Invention

It may be desirable to provide a component carrier and a method of manufacturing the same, whereby the integration density of the component carrier may be increased.

According to an exemplary embodiment of the invention, a component carrier is provided, wherein the component carrier comprises at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component on and/or in the layer stack, and at least one continuous vertical through-connection extending between two opposite main surfaces of the component and extending straight through the component and continuing straight through at least one further structure of the component carrier.

According to another exemplary embodiment of the invention, a method of manufacturing a component carrier is provided, wherein the method comprises: the method comprises the steps of forming a stack comprising at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, assembling the component on and/or in the stack of layers, and forming at least one continuous vertical through-connection extending between two opposite main surfaces of the component and extending straight through the component and continuing straight through at least one further structure of the component carrier.

In the context of the present application, the term "component carrier" may particularly denote any support structure capable of accommodating one or more components thereon and/or therein for providing mechanical support and/or electrical connection. In other words, the component carrier can be configured as a mechanical and/or electronic carrier for the component. In particular, the component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid board combining different ones of the above-mentioned types of component carriers.

In the context of the present application, the term "layer stack" may particularly denote an arrangement of a plurality of planar layer structures mounted in parallel on top of each other.

In the context of the present application, the term "layer structure" may particularly denote a continuous layer, a patterned layer or a plurality of discontinuous islands (island) within a common plane.

In the context of the present application, the term "component" may particularly denote a Surface Mounted Device (SMD) type or inlay type component. Such components may be arranged on and/or in the interior of the stack. The component may in particular have an electronic function and may therefore be a heat source, taking ohmic losses into account. Such a component may be, for example, a semiconductor wafer. Embedding the component may result in the component being completely embedded in the overlying material. However, embedding the components in the stack may also be achieved by inserting the components into cavities in the stack so that the components still have surface contact. Surface mounting the component on the layer stack means that the component extends vertically beyond the layer stack.

In the context of the present application, the term "continuous vertical through-connection" may particularly denote an integrally formed element which extends in an uninterrupted manner perpendicularly or substantially perpendicularly to the stacked layer structure. In particular, the continuous vertical through-connection may be an electrically (and/or thermally and/or optionally electrically) conductive z-axis connection extending in a uniform manner through the component carrier and the further structure (such as the one or more layer structures and/or the further component), in particular having a constant or substantially constant cross-sectional shape and size. For example, the continuous vertical through-connections may be configured as one or more vertical through-silicon vias and/or through-mold vias. The vertical through-connection may be made of an electrically conductive material, for example a metal, such as copper.

According to an exemplary embodiment of the invention, a component carrier (such as a printed circuit board) is provided having a layer stack and components connected to the layer stack. Advantageously, the vertical through-connection extends continuously through the component of the component carrier and through at least one connected further structure (such as a part of the layer stack and/or at least one further component of the component carrier). As a result, a highly compact electrically conductive z-connection can be formed, wherein, in particular, functionally inactive areas of the component can be used for the interconnection within the component carrier. This keeps the entire component carrier compact and lightweight. Furthermore, this results in a short electrically conductive path and is therefore less prone to signal distortion. In particular, the one or more continuous vertical through connections extending through the component of the component carrier and the further structure may make it unnecessary for the electrically conductive connection path to bypass the embedded component, which saves space consumption and shortens the length of the electrical path. Furthermore, such a vertical through-connection which passes through the component carrier and the at least one further structure in the vertical direction can be produced in a relatively simple manner, in particular by a process in which laser drilling is carried out directly and filling is carried out by plating. Highly advantageously, the vertical through-connections extending through the components of the component carrier and the further structure can establish short z-connections at a very small spacing and can transmit electrical, optical and/or electromagnetic signals from top to bottom or from bottom to top. Furthermore, the one or more vertical through connections may also facilitate heat removal from the component during the operating process.

In the following, further exemplary embodiments of the method and component carrier will be explained.

In an embodiment, the at least one further structure is a further component. In this embodiment, a plurality of components may be provided with at least one common continuous vertical through-connection extending straight and uninterrupted through the two or more components. This enables a simple and low-loss connection between the components and ensures a compact design of the component carrier.

In an embodiment, the component and the further component are stacked vertically above each other. In particular, the component and the further component may be directly connected to each other (e.g. by gluing the component and the further component together), i.e. without one or more layers of a laminate between the component and the further component. This design keeps the component carrier compact in the vertical direction and provides a basis for vertical connections between the components and through very short paths of the components. Alternatively, the component and the further component may be indirectly connected to each other by the material of the laminated stack.

In an embodiment, the component and the further component are electrically coupled to each other to functionally cooperate, for example to communicate with each other through at least one interconnected vertical through-connection. When functionally cooperating components are stacked and one or more common vertical through connections are guided through these components, a very fast signal communication between these components can be achieved, in particular based on control signals transmitted by at least one vertical through connection. For example, one of the components may control the other of the components using control signals propagating along at least one vertical through-connection extending through and connecting the components. In one embodiment, one of these components may be a controller chip and another of these components may be a memory chip.

In an embodiment, the component carrier comprises an adhesive structure holding the component and the further component together, in particular the adhesive structure is a dielectric adhesive structure. The direct adhesive connection of adjacent components enables the connection of the components already before embedding them in the layer stack, which simplifies the manufacturing process. Preferably, the adhesive structure used may be electrically insulating, so that the adhesive structure does not interfere with the electrical function of at least one vertical through-connection extending through the component, for example a through-silicon-perforation.

In an embodiment, the component and the further component are a combination of: two memory chips, a memory chip and a processor, and a controller and a sensor chip. The memory chip may be a chip capable of storing data. Multiple stacked memory chips can provide a compact memory array with extended storage capability. The processor chip may be a chip having processing resources, such as a Central Processing Unit (CPU). The controller chip may be a chip controlling another chip (i.e. a controlled chip), in particular by control signals transmitted along one or more vertical through connections extending through at least one of the assigned components. The sensor chip is capable of sensing at least one property from the environment, such as temperature, pressure, electromagnetic radiation (e.g., visible light, high frequency radiation, etc.), acoustic signals, and chemical substances (such as a particular gas). The sensor may operate under the control of a controller.

In an embodiment, the at least one further structure comprises two further members stacked on top of each other and on top of the component. Thus, a component stack with three or more components is also possible, which may be passed together by a respective common vertical through-connection.

In an embodiment, the at least one further structure comprises at least one of the at least one electrically insulating layer structure of the layer stack. Thus, the vertical through-connections may also extend through the components and through the connected electrically insulating (and/or electrically conductive) layer structure of the layer stack. In this configuration, the common vertical through-connection may establish a direct electrically conductive connection between the stack and the component, or may extend through the component to connect different electrically conductive layer structures of the layer stack.

In an embodiment, the component is embedded inside the layer stack to be completely surrounded by the material of the layer stack in the circumferential direction. Alternatively, the component may be inserted and accommodated in a cavity of the layer stack to extend up to a main surface of the layer stack, i.e. with surface access. Thus, the embedded component may have surface access or the embedded component may be completely surrounded by the material of the laminated layer stack. Interconnecting the embedded component of the component carrier with another (surface mounted or embedded) component and/or with (at least a part of) the layer stack by means of a common vertical through-connection may allow for the formation of a component carrier with a smaller thickness and high performance electrical coupling logic.

In the following, a number of processes of embedding a component into a layer stack (without or with access to the surface of the layer stack) according to different embodiments of the invention will be described:

in one embedded embodiment, the method comprises embedding the component into an opening (e.g. a through hole) of the stack, wherein during embedding the opening is at least temporarily closed at the bottom side by the adhesive layer. In the context of the present application, the term "adhesive layer" may particularly denote a tape, film, foil, sheet or plate having an adhesive surface. In use, the adhesive layer may be used to be attached to a major surface of the stack for closing an opening extending through the stack. The component may be attached to the adhesive layer for defining the position of the component in the opening and thus the position of the component relative to the stack. When the adhesive layer is removed from the stack before the manufacturing of the component carrier is completed, the adhesive layer may be denoted as a temporary carrier. However, in other embodiments, the adhesive layer may form part of a component carrier that is easy to manufacture. By attaching the component to the tape during the embedding process, the spatial accuracy of the embedding of the component may be excellent. Thus, a compact component carrier with high alignment accuracy can be obtained.

In another embedded embodiment, the method comprises mounting the component on at least one of the layer structures and then covering the assembled component with a further layer structure of the layer structure, wherein at least one of the further layer structures is provided with an opening for accommodating the component. For example, the openings of the respective layer structure may be cut as through-holes in the respective layer structure.

In yet another embedded embodiment, the method comprises: the release layer is embedded in the layer stack, an opening is then formed in the layer stack by removing a portion of the layer stack bounded by the release layer at the bottom side, and the component is then received in the opening. For example, such a release layer may be made of a material that exhibits poor adhesion properties with respect to the surrounding layer stack material. Suitable materials for the release layer are, for example, polytetrafluoroethylene (PTFE, teflon), or a waxy compound. For example, the method includes forming a circumferentially cut groove in the stack extending to the release layer, thereby separating the portion from the remaining layers of the stack. Cutting the groove may be accomplished, for example, by laser drilling or mechanical drilling.

In yet another embedded embodiment, the method includes forming an opening in the stack by milling (preferably depth milling) and then receiving the component on a bottom surface in the milled opening of the stack. Milling is a suitable and simple mechanism for accurately defining a blind type opening for subsequently receiving a component.

In another embodiment, the component is surface mounted on the layer stack. For example, multiple components may be stacked and may be mounted as a unit on a layer stack. In this case, the vertical through-connection may extend through at least two of the stacked components. However, it is also possible that a component surface mounted on the layer stack is connected with the layer stack by a vertical through-connection extending through the component and into the layer stack.

In an embodiment, the component carrier may comprise a plurality of continuous vertical through-connections extending parallel to each other between two opposite main surfaces of the component and extending straight through the component and continuing straight through the at least one further structure. Providing a plurality of vertical through connections extending parallel to each other through the component and the further structure may further increase the integration density of the component carrier. This may improve performance and reduce the volume of the component carrier.

In an embodiment, the center distance between two parallel adjacent vertical through connections extending through the component and the at least one further structure is less than 250 μm, in particular less than 200 μm, more in particular less than 150 μm. Thus, a plurality of (in particular parallel) vertical through-connections can be manufactured with high precision and very small mutual distances, for example by laser drilling and subsequent copper plating. This may allow for the formation of a high density electrical connection structure extending at least partially vertically through at least a portion of one or more components and/or layer stacks of the component carrier.

In an embodiment, the diameter of the at least one vertical through-connection is in the range of 20 μm to 200 μm, in particular in the range of 40 μm to 150 μm. Such a small diameter also contributes to a compact configuration and makes it possible to establish a high density of connections. In particular, such small diameters may be formed by laser drilling through the components and through the connected further structures as a whole.

In an embodiment, the component is a semiconductor component, in particular a silicon chip. The semiconductor component may have a semiconductor body (e.g., being a portion of a semiconductor wafer) and an active region in which at least one monolithically integrated circuit structure is formed. The integrated circuit structure may for example be a transistor (e.g. a field effect transistor, in particular a MOSFET), a diode, a capacitor, an inductor, etc. The portion of the semiconductor component other than the active region may remain conventionally unused and may be used to accommodate vertical through connections according to an exemplary embodiment of the present invention.

In one embodiment, the semiconductor component is a bare semiconductor wafer. In other words, the semiconductor component may consist essentially of a semiconductor material and may be unpackaged. In such an embodiment, the at least one continuous vertical through-connection may extend completely through the semiconductor material of the semiconductor component in the vertical direction. Alternatively, the semiconductor component may be a molded wafer, i.e. a semiconductor wafer, at least partially surrounded by a mold compound formed by molding, such as injection molding. In such an embodiment, the at least one continuous vertical through-connection may extend in a vertical direction partially through the semiconductor material of the semiconductor component and partially through the encapsulated molding compound of the semiconductor component.

In an embodiment, the at least one continuous vertical through-connection is a through-silicon-via (TSV) extending through a silicon material of the component and/or a through-mold-via (TMV) extending through a mold compound of the component. In particular, at least one of the TSVs and TMVs may additionally pass through a layer structure of the laminated layer stack, i.e., a PCB (printed circuit board) layer.

The through-silicon vias or through-chip vias may be vertical electrical connections that pass completely through the silicon wafer. TSVs may be high-performance interconnects capable of forming three-dimensional packages with high interconnect density and shorter connection length. In particular, when combined with another structure adjacent to a component having TSVs, the integration density and performance of the resulting component carrier may be significantly improved.

When the component is a molded semiconductor chip, the vertical through connections may also extend through the molding material encapsulating the semiconductor material of the chip. In such an embodiment, the vertical through-connections may be configured as through-molded perforations.

In an embodiment, the shape and area of the horizontal cross section of at least one vertical through-connection is constant along the entire extension of the vertical through-connection. For example, the shape may be a circular shape and the region may be a circular region. The shape and area may remain the same at each location from the upper end to the lower end and between the upper and lower ends of the continuous vertical through connection.

In an embodiment, the at least one vertical through-connection is an integral, uniform structure, in particular the at least one vertical through-connection is a single body of material. In particular, the at least one continuous vertical through-connection may be free of material bridges along the vertical through-connection.

In an embodiment, the aspect ratio of the at least one vertical through-connection is at least three, in particular at least five, more in particular at least ten. The term "aspect ratio" may denote the ratio between the vertical length and the horizontal diameter of the respective vertical through connection. The vertical through-connection may be long and thin in description. This may allow establishing electrically conductive connections over a large spatial range and with low volume consumption.

In an embodiment, at least one continuous vertical through-connection has a cylindrical shape. In other words, the cross section of the vertical through-connection may have a circular shape. The circular shape and size of the vertical through-connection may be constant or substantially constant along the entire vertical extension of the vertical through-connection.

In an embodiment, the diameter of the at least one continuous vertical through-connection is smaller than the diameter of the vertical connection of the at least one electrically conductive layer structure. In particular, the vertical through-connections may be formed smaller than copper-filled laser perforations extending through the layer stack or a portion of the layer stack.

In an embodiment, the vertical through-connections are connected at the upper and/or lower end by copper-filled laser perforations, in particular with a stacked array of copper-filled laser perforations of the electrically conductive layer structures of the layer stack. Thus, an uninterrupted electrical connection path may be established through the electrically conductive layer structure of the stack and through the vertical through-connections extending through, but not only through, at least one component of the component carrier.

In an embodiment, the method comprises: the component and a further component, which is provided as at least one further structure, are stacked and connected, and the stacked components are then arranged on and/or in the stack. This can significantly simplify the manufacturing process to: a plurality of components are first stacked on top of each other and connected, and then the integrally connected component stack is embedded as a whole in the layer stack or the component stack is surface-mounted on the layer stack. Thus, the number of parts to be handled and processed when assembling the layer stack and the obtained component is reduced. Furthermore, alignment problems can be significantly suppressed when first connecting components outside the layer stack and then assembling the obtained component stack as a whole with a stack of component carriers.

In an embodiment, the method comprises: before the stacked component is arranged as one piece on and/or in the stack, at least one vertical through-connection is formed, which extends vertically through the stacked component and the further component. It is also possible in a very simple manner to form laser through-holes before embedding or surface mounting the component stack in and/or on the layer stack, and then to fill the obtained through-holes with copper material or the like.

In another embodiment, the method comprises: after the component is arranged on and/or in the layer stack, the component and a further component, as at least one further structure, are stacked and connected. For example, a first component may be inserted into a cavity or through-hole formed in the layer stack, and then additional components may be attached on top of the previously inserted component.

In an embodiment, the method comprises: after arranging the stacked components on and/or in the stack, at least one vertical through-connection is formed extending vertically through the stacked and further components. In particular, the vertical through-connections may also be laser drilled and plated after assembly of the stacked components with the laminated stack, when at least one of the stacked components still has a surface contact after being inserted into the cavity of the stack. This approach may also be advantageous when the common vertical through-connection is formed as at least one layer structure extending through the assembled components and underneath the components of the layer stack.

In an embodiment, the method comprises forming at least one vertical through-connection by forming at least one straight through-hole in the component and the at least one further structure, in particular by means of laser drilling, followed by filling the at least one through-hole, in particular with an electrically conductive material, in particular by means of plating. Laser drilling is particularly suitable for forming small and long vertical through-holes with high accuracy and small size in organic layer laminated materials as well as in silicon materials, molded materials, and the like. In an alternative embodiment, mechanical drilling may also be performed for this purpose. Filling the bore hole with an electrically conductive material may advantageously be carried out by plating, in particular by water plating, wherein a seed layer may optionally be preformed (for example by electroless deposition).

In an embodiment, the component carrier comprises a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure(s) and electrically conductive layer structure(s), which is formed in particular by applying mechanical pressure and/or thermal energy. The mentioned stack may provide a plate-like component carrier which is capable of providing a large mounting surface for further components and which is still very thin and compact.

In an embodiment, the component carrier is shaped as a plate. This contributes to a compact design, wherein the component carrier nevertheless provides a large base plate for mounting components on the component carrier. Further, in particular, a bare chip as an example of an electronic component about embedding can be conveniently embedded in a thin plate such as a printed circuit board due to its small thickness.

In an embodiment, the component carrier is configured as one of a printed circuit board, a substrate (in particular an IC substrate) and an interposer.

In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-like component carrier formed by laminating a plurality of electrically conductive layer structures with a plurality of electrically insulating layer structures, for example by applying pressure and/or by supplying thermal energy. As a preferred material for PCB technology, the electrically conductive layer structure is made of copper, while the electrically insulating layer structure may comprise resin and/or glass fibres, so-called prepreg or FR4 material. The electrically conductive layer structures can be connected to each other in a desired manner by forming through-holes through the laminate, for example by laser drilling or mechanical drilling, and by filling the through-holes with an electrically conductive material, in particular copper, so as to form through-holes as through-hole connections. In addition to one or more components that may be embedded in a printed circuit board, printed circuit boards are typically configured to receive one or more components on one surface or two opposing surfaces of a plate-like printed circuit board. The one or more components may be attached to the respective major surfaces by welding. The dielectric portion of the PCB may include a resin with reinforcing fibers, such as glass fibers.

In the context of the present application, the term "substrate" may particularly denote a smaller component carrier. The substrate may be a relatively small component carrier with respect to the PCB, on which one or more components may be mounted, and which may serve as a connection medium between one or more chips and another PCB. For example, the substrate may have substantially the same size as a component (e.g., an electronic component) to be mounted on the substrate (e.g., in the case of a Chip Scale Package (CSP)). More specifically, a substrate may be understood as a carrier for electrical connections or electrical networks and a component carrier comparable to a Printed Circuit Board (PCB) but with a relatively high density of laterally and/or vertically arranged connections. The transverse connections are, for example, conductive paths, while the vertical connections may be, for example, boreholes. These lateral and/or vertical connections are arranged within the base plate and may be used to provide electrical, thermal and/or mechanical connection of a housed or unreceived component (such as a bare wafer), in particular an IC chip, to a printed circuit board or an intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". The dielectric part of the substrate may comprise a resin with reinforcing particles, such as reinforcing spheres, in particular glass spheres.

The substrate or the interposer may comprise or consist of: at least one layer of glass, silicon (Si), a photoimageable or dry-etchable organic material such as an epoxy-based build-up material (e.g., an epoxy-based build-up material film), or a polymer composite such as a polyimide, polybenzoxazole or benzocyclobutene functionalized polymer.

In an embodiment, the at least one electrically insulating layer structure comprises at least one of: resins (such as reinforced or non-reinforced resins, for example epoxy or bismaleimide-triazine resins), cyanate esters, polyphenylene derivatives, glass (especially fiberglass, multiple layer glass, glassy materials), prepregs (such as FR-4 or FR-5), polyimides, polyamides, Liquid Crystal Polymers (LCP), epoxy laminates, polytetrafluoroethylene (PTFE, teflon), ceramics and metal oxides. Reinforcing structures, such as meshes, fibers or spheres, for example made of glass (multiple layers of glass) may also be used. While prepreg, and in particular FR4, is generally preferred for rigid PCBs, other materials, in particular epoxy based laminates or photoimageable dielectric materials, may be used. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers and/or cyanate ester resins, low temperature co-fired ceramics (LTCC) or other lower, ultra-low or ultra-low DK materials can be implemented as an electrically insulating layer structure in the component carrier.

In an embodiment, the at least one electronically conductive layer structure comprises at least one of: copper, aluminum, nickel, silver, gold, palladium, and tungsten. Although copper is generally preferred, other materials or other types of coatings thereof are possible, in particular electrically conductive layer structures coated with a superconducting material such as graphene.

The at least one component that may be embedded in the stack and/or surface mounted on the stack may be selected from the following: a non-conductive inlay, a conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (e.g. a heat pipe), a light guiding element (e.g. a light guide or a light guide connector), an optical element (e.g. a lens), an electronic component or a combination thereof. For example, the component may be an active electronic component, a passive electronic component, an electronic chip, a storage device (e.g., DRAM or another data storage), a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a light emitting diode, an opto-coupler, a voltage converter (e.g., a DC/DC converter or an AC/DC converter), a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, a sensor, an actuator, a micro-electro-mechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may also be embedded in or surface mounted on the component carrier. For example, a magnetic element may be used as the component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, e.g. a ferrite core) or may be a paramagnetic element. However, the component may also be a substrate, an insert or another component carrier, for example in a plate-in-plate configuration.

In an embodiment, the component carrier is a laminated component carrier. In such an embodiment, the component carrier is an assembly of multiple layers stacked and connected together by the application of pressure and/or heat.

After the treatment of the inner layer structure of the component carrier, one main surface or both opposite main surfaces of the treated layer structure may be covered (in particular by lamination) symmetrically or asymmetrically with one or more further electrically insulating layer structures and/or electrically conductive layer structures. In other words, lamination may be continued until the desired number of layers is obtained.

After the formation of the stack of electrically insulating layer structures and electrically conductive layer structures is completed, a surface treatment of the obtained layer structure or component carrier may be performed.

In particular, in terms of surface treatment, an electrically insulating solder resist may be applied to one main surface or both opposite main surfaces of the layer stack or the component carrier. For example, a solder resist, for example, may be formed over the entire major surface and the solder resist layer subsequently patterned to expose one or more electrically conductive surface portions that will be used to electrically couple the component carrier to the electronic periphery. The surface portion of the component carrier which remains covered by the solder resist, in particular the surface portion comprising copper, can be effectively protected against oxidation or corrosion.

In the case of surface treatment, it is also possible to selectively apply a surface finish to the exposed electrically conductive surface portions of the component carrier. Such a surface finish may be an electrically conductive covering material on exposed electrically conductive layer structures (such as pads, electrically conductive traces, etc., in particular comprising or consisting of copper) on the surface of the component carrier. Without protecting such exposed electrically conductive layer structures, the exposed electrically conductive component carrier material (particularly copper) may oxidize, thereby rendering the component carrier less reliable. The surface finish may then be formed, for example, as a joint between the surface mount component and the component carrier. The surface finishing has the function of protecting the exposed electrically conductive layer structure (in particular the copper circuit) and of carrying out the bonding process with one or more components, for example by soldering. Examples of suitable materials for surface finishing are Organic Solderability Preservative (OSP), Electroless Nickel Immersion Gold (ENIG), gold (especially hard gold), electroless tin, nickel gold, nickel palladium, electroless nickel immersion palladium gold (ENIPIG) and the like.

The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

Drawings

Fig. 1 illustrates a cross-sectional view of a component carrier with a laminated layer stack having three stacked embedded components with a common continuous vertical through-connection according to an exemplary embodiment of the invention.

Fig. 2 illustrates a cross-sectional view of a component carrier with a laminated layer stack having two superimposed embedded components with a common continuous vertical through-connection according to an exemplary embodiment of the invention.

Fig. 3 illustrates a cross-sectional view of a component carrier with a laminated layer stack according to an exemplary embodiment of the invention with two vertically spaced embedded components, one of the components having a continuous vertical through-connection common with a portion of the layer stack.

Fig. 4 illustrates a cross-sectional view of a component carrier with a laminated layer stack according to an exemplary embodiment of the invention with three vertically or laterally spaced embedded components, two of which have a continuous vertical through-connection common to each other and to portions of the layer stack.

Fig. 5 illustrates a cross-sectional view of a component carrier with a laminated layer stack according to an exemplary embodiment of the invention with three embedded components, one of which has a continuous vertical through-connection common with a part of the layer stack.

Fig. 6 illustrates a cross-sectional view of a component carrier with a laminated stack having two stacked surface mounted components with a common continuous vertical through-connection according to an exemplary embodiment of the invention.

Fig. 7 illustrates a cross-sectional view of a component carrier with a laminated stack having a component embedded in a cavity of the stack, wherein a common continuous vertical through-connection extends through the component and the stack, according to an exemplary embodiment of the invention.

Fig. 8 to 12 show structures obtained during implementation of a method of manufacturing a component carrier according to an exemplary embodiment of the invention.

Detailed Description

The illustration in the drawings is schematically. In different drawings, similar or identical elements are provided with the same reference signs.

Before describing exemplary embodiments in more detail with reference to the accompanying drawings, some basic considerations upon which exemplary embodiments of the present invention may be developed will be outlined.

According to an exemplary embodiment of the invention, a component carrier with assembled components may be provided, which component carrier has a continuous vertical connection extending through the entire component and through at least one further structure of the component carrier. This ensures a compact construction and a low-ohmic and low-loss signal path which can be produced in a simple manner.

In particular, exemplary embodiments may provide an embedded package in which multiple components are stacked prior to or during the embedding process. The embedded components may be packaged (e.g., embedded in a laminate, molding, etc.) prior to embedding in the packaging system. Further alternatively, the components may also be superimposed on the package, for example using an organic PCB material or a layer of moulding material separating the packages. The components may be connected by suitable contact methods before, during, or after the embedding process.

Advantageously, the drop-in plate may serve as a carrier for further attachment of the component to a surface and further packaging. By selecting such a laminate, a fully integrated package with a moulding like further encapsulation and connection can be obtained.

Advantageously, a stacked wafer configuration may be used for embedding. In other words, the embedded package may incorporate multiple wafers in a stacked system configuration. In particular, the wafers may be pre-stacked prior to the embedding process and may be placed in the stack as a stacking system. The wafers may also be stacked and assembled as a single wafer during the embedding process. Further, a first placed die may be packaged and then a second placed die may be bonded or soldered to the board. Thereafter, the entire system may be packaged.

Fig. 1 illustrates a cross-sectional view of a component carrier 100 according to an exemplary embodiment of the present invention.

The component carrier 100 according to fig. 1 comprises a laminated stack 102, the stack 102 comprising an electrically conductive layer structure 104 and an electrically insulating layer structure 106. Lamination may particularly denote joining the

layer structures

104, 106 by applying pressure and/or heat. For example, the electrically-conductive layer structure 104 may include a patterned copper foil and a stacked multi-element vertical through-connection, such as a copper-filled laser via that may be formed by plating. The electrically insulating layer structure 106 may comprise a corresponding resin, such as a corresponding epoxy resin, optionally including reinforcing particles (e.g. glass fibers or glass spheres) therein. For example, the electrically insulating layer structure 106 may be made of prepreg or FR 4.

As also shown in fig. 1, the preformed stack of three vertically stacked

components

108, 118, 122 is embedded inside the stack 102, more specifically in the central core 150 of the stack 102. The core 150 may be a fully cured dielectric sheet or plate made of, for example, epoxy and fiberglass. However, the central core 150 may also be a laminated stack comprising a plurality of electrically conductive and/or dielectric layers. The three (and possibly any other number) of

components

108, 118, 122 may be, for example, semiconductor chips, such as at least one processor and/or at least one memory. The embedded

components

108, 118, 122 are completely surrounded by the material of the laminated stack 102 without exposing surface portions of the

components

108, 118, 122 on the top, bottom and lateral sides.

As also shown in fig. 1, a plurality of consecutive vertical through connections 110 are provided, said plurality of consecutive vertical through connections 110 extending parallel to each other between two opposite main surfaces of the entirety of the three

components

108, 118, 122 and passing straight through all three

components

108, 118, 122. Since the semiconductor chip-

type components

108, 118, 122 may be silicon chips, each continuous vertical through-connection 110 may be a through-silicon-via (TSV). Each of the vertical through-connections 110 constitutes an integral uninterrupted and uniform tubular metal structure having a constant diameter and a circular shape along the entire extension of the vertical through-connection. The vertical through-connection 110 extends not only through the component 108 but additionally also through one or more further structures 112 of the component carrier 100, which further structures 112 are in this

example components

118, 122. Each of the vertical through connections 110 extends perpendicularly to the main surface of the component carrier 100, starting from the uppermost component 122, through the vertical central component 118 and through the entire lowermost component 108.

By means of the vertical through-connections 110, the

components

108, 118, 122 of the stack 102 and the electrically conductive layer structure 104 may be effectively connected by short electrical paths extending substantially only along the z-direction. Furthermore, the vertical through connections 110 extending through the entire

stacked components

108, 118, 122 may also establish an electrical coupling between the

different components

108, 118, 122, thereby establishing a functional coupling. In other words, the

various components

108, 118, 122 may be electrically coupled through the vertical through connections 110 to functionally mate. For example, the functional fit may be established between one or more processor chips and one or more memory chips in the stacked

components

108, 118, 122 by transmitting signals via the electrically conductive vertical through connections 110.

Advantageously, a dielectric adhesive structure 120 may be provided between adjacent major surfaces of the

interconnected components

108, 118, 122 for holding the

components

108, 118, 122 together without interfering with the electrical connection established by the vertical through connections 110. More specifically, dielectric adhesive structure 120 is disposed between the facing, connected major surfaces of

components

108 and 118 and between the facing, connected major surfaces of

components

118 and 122.

The center distance D between two adjacent vertical through-connections 110 extending through the

components

108, 118, 122 may be, for example, less than 150 μm. Further, the diameter d of a corresponding one of the vertical through connections 110 may be, for example, 50 μm or even less. The mentioned design rules may allow to build even highly miniaturized and highly concentrated z-axis connections for providing a compact component carrier 100 with high reliability and high performance. As also shown in fig. 1, each successive vertical through-connection 110 has a diameter d that is less than the diameter L of the perforated vertical connection 124 of the electrically conductive layer structure 104. The vertical connection 124 is implemented as a laser perforation filled with copper. A respective one of the vertical connection structures 124 may be electrically connected with a respective one of the vertical vias 110. More specifically, each vertical through-connection 110 may be connected at the upper end and/or at the lower end with a copper-filled laser perforation, or even with an array of stacked copper-filled laser perforations in the form of vertical connection structures 124.

The diameter d may be constant along the entire vertical extension of the respective continuous vertical through connection 110. For example, each continuous vertical through connection 110 may have a cylindrical shape. The corresponding vertical through-connection 110 can be formed in a simple manner by drilling, in particular laser drilling or mechanical drilling, and then performing a deposition process in which an electrically conductive material, such as copper, is deposited in the drilling. The deposition may be accomplished, for example, by plating.

Referring to detail 199 in fig. 1, the circular shape and area a of the horizontal cross-section of the vertical through-connection 110 may be constant along the entire extension of the vertical through-connection 110. As shown in detail 197 in fig. 1, the vertical through-connection 110 may have a high aspect ratio (i.e., the ratio between the vertical length B and the horizontal diameter d) of, for example, at least five. The center of the tubular vertical through-connection 110 is shown as a dashed line and is indicated by reference number 189 in detail 197.

To manufacture the component carrier 100 according to fig. 1, the

components

108, 118, 122 may first be stacked and connected before the stack of

pre-connected components

108, 118, 122 is arranged in the layer stack 102. This simplifies the manufacturing process. Furthermore, the vertical through connections 110 extending parallel to each other and vertically through the stacked

components

108, 118, 122 may be formed prior to embedding the

components

108, 118, 122. Moreover, the manufacturing process is particularly simple.

Alternatively, however, the

components

108, 118, 122 may be stacked and connected only after the stacked

components

108, 118, 122 are disposed in the stack 102. Accordingly, the vertical through-connections 110 extending parallel to each other and vertically through the stacked

components

108, 118, 122 may also be formed after the stacked

components

108, 118, 122 are arranged in the stack 102. The advantages of this configuration may be: the vertical through-connections 110 may be automatically connected to the underlying electrically conductive layer structure 104 after embedding by drilling and plating.

As already mentioned, the vertical through connections 110 may be formed by forming respective through holes in the

components

108, 118, 122, preferably via laser drilling, and subsequently filling the respective through holes with an electrically conductive material, such as copper, preferably by plating. Laser drilling may be particularly preferred when processing

components

108, 118, 122 comprising silicon materials. The brittle silicon material can be reliably prevented from being broken by laser processing.

The embodiment of fig. 1 shows an inset structure of stacked wafers used to form an inset package that incorporates multiple wafers in a stacked configuration. The plurality of

components

108, 118, 122 may be stacked in a clustered configuration and may be internally connected to each other and/or to the layer stack 102 by TSVs (through silicon vias), TMVs (through mold vias), ACFs (anisotropic conductive films), ACPs (anisotropic conductive glues), solder connections (e.g., solder balls), and/or copper pillars. The connection to the embedded substrate (i.e. the layer stack 102) may be formed by the packaging component carrier 100.

Fig. 2 illustrates a cross-sectional view of a component carrier 100 according to another exemplary embodiment of the invention.

The embodiment of fig. 2 differs from the embodiment of fig. 1 in particular in that: according to fig. 2, only two (instead of three)

components

108, 118 are connected and embedded in the stack 102 and are vertically crossed by the vertical through connections 110.

Fig. 3 illustrates a cross-sectional view of a component carrier 100 according to yet another exemplary embodiment of the present invention.

The embodiment of fig. 3 differs from the embodiment of fig. 2 in particular in that: according to fig. 3, the vertically connected

components

108, 118 are electrically connected by means of a solder structure 152. Furthermore, the dielectric material of the electrically insulating layer structure 106 of the stack 102 is arranged between the

components

108, 118, whereby the

components

108, 118 are vertically separated. In addition to this, the embodiment of fig. 3 has the following continuous vertical through-connections 110: the continuous vertical through-connection 110 extends through the uppermost electrically insulating layer structure 106 of the stack 102 and through the embedded component 108. In other words, the above-mentioned further structure 112, which is traversed by the continuous vertical through-connection 110, is implemented in the embodiment of fig. 3 as some of the electrically insulating layer structures 106 of the layer stack 102. According to fig. 3, the

parts

108, 118 have different lateral extensions.

According to fig. 3, the embedding is carried out by means of stacked wafer packages, wherein the upper part 108 is directly welded, bonded, connected by means of copper cylinders, while the upper part 108 is connected to the lower part 118 by means of welded spheres or the like, in particular before or during the embedding process.

Fig. 4 shows a cross-sectional view of a component carrier 100 according to a further exemplary embodiment of the present invention.

In the embodiment of fig. 4, three (or any other number) of

components

108, 118, 122 are embedded in the stack 102 independently of each other. Component 118 is located below

components

108, 122, where

components

108, 122 are located at the same vertical level, but at different lateral dimensions. The component 118 is connected to each of the

components

108, 122 by a solder structure 152 and an electrically-conductive layer structure 104, here implemented as copper-filled laser vias and patterned copper foil.

Furthermore, an integral and continuous vertical through-connection 110 is provided, which integral and continuous vertical through-connection 110 extends with a constant diameter and shape through both

components

108, 118, through the electrically insulating layer structure 106 between the

components

108, 118 of the stack 102 and through the electrically insulating layer structure 106 above the component 108 of the layer stack 102. At upper and lower ends of the vertical through-connections 110, the vertical through-connections 110 are electrically connected to a respective one of the electrically-conductive layer structures 104 of the layer stack 102.

In fig. 4, the embedded board may be used as a carrier to further attach the components on a surface and for further packaging. By selecting such a laminate, a completely integrated package can be achieved with further encapsulation and connectivity like a molded piece.

Fig. 5 illustrates a cross-sectional view of a component carrier 100 according to yet another exemplary embodiment of the present invention.

The embodiment of fig. 5 differs from the embodiment of fig. 4 in particular in that: according to fig. 5, a vertically electrically conductive connection without a solder ball (reference 152 in fig. 4) is established between the component 118 on the one hand and the

components

108, 120 on the other hand. In fig. 5, the connection structure 154 may represent an ACF (anisotropic conductive film), a DAF (wafer attachment film) adhesive, or the like.

Furthermore, the embodiment of fig. 5 has two integral continuous vertical through-connections 110 extending parallel to one another. In addition, each of the vertical vias 110 of fig. 5 extends vertically through not only the entire vertical extension of the component 108, but also through the electrically insulating layer structure 106 above the component 108 of the stack 102.

Fig. 6 illustrates a cross-sectional view of a component carrier 100 according to another exemplary embodiment of the invention.

The embodiment of fig. 6 differs from the embodiment of fig. 2 in particular in that: according to fig. 6, the stacked

components

108, 118 vertically traversed by the common integral continuous vertical through-connection 110 are surface mounted on the laminated layer stack 102 (instead of being embedded in the layer stack 102).

More than two

components

108, 118 may be stacked prior to or during surface mounting on the stack 102. It is also possible to surface mount only a single component 108 on the stack 102 and form a common integral vertical through-connection 110 that extends completely through the surface mounted component 108 and through at least one adjacent layer structure 104 and/or layer structure 106 (not shown) of the stack 102.

According to fig. 6, each of the

semiconductor components

108, 118 is a bare or unpackaged semiconductor wafer, i.e. may consist essentially of a semiconductor material such as silicon. The continuous vertical through-connection 110, which is here made of copper, extends as a through-silicon-via (TSV) through the semiconductor material of the bare, i.e. unpackaged,

semiconductor components

108, 118.

Fig. 7 illustrates a cross-sectional view of a component carrier 100 according to yet another exemplary embodiment of the present invention.

In the embodiment of fig. 7, the component 108 is embedded in a cavity in a surface portion of the layer stack 102, such that the embedded component 108 has an exposed upper major surface. In other words, the embedded component 108 is only partially surrounded on the bottom side and lateral sides by the material of the laminated stack 102, while the upper main surface of the component 108 remains exposed to the environment.

As also shown, the embodiment of figure 7 has a continuous vertical through-connection 110 that extends through the entire stack 102 and through the entire embedded component 108. Advantageously, the vertical through connections 110 may be formed in a single manner by laser drilling and then copper plating after the components 108 are embedded in the stack 102.

According to fig. 7, the semiconductor component 108 is a molded component, i.e. the semiconductor component 108 has a semiconductor die 191 encapsulated by a mold compound 193. A continuous vertical through-connection 110, here made of copper, extends through the semiconductor material of the bare wafer 191 and through the molding compound 193.

Fig. 8 to 12 show structures obtained during implementation of a method of manufacturing a component carrier 100 according to an exemplary embodiment of the invention.

Referring to fig. 8, two

components

108, 118 are provided.

Referring to fig. 9, the

components

108, 118 are connected in a vertically stacked configuration by a bonding structure 120 between the

components

108, 118. For example, the bonding structure 120 may have dielectric properties and may be, for example, a wafer attachment film. Thus, the

components

108, 118 may be connected prior to embedding the

components

108, 118.

Referring to fig. 10, a vertical through-hole 158 is formed by laser drilling, the vertical through-hole 158 extending vertically through the

connected components

108, 118 and the adhesive structure 120 between the

components

108, 118. For example, UV (ultraviolet) laser may be used for this purpose. Laser drilling is highly preferred over mechanical drilling when the brittle silicon material of the

components

108, 118 needs to be drilled.

Referring to fig. 11, the vertical through-holes 158 are filled with an electrically conductive material such as copper. This can be achieved, for example, by sputtering or plating. As a result, the illustrated continuous vertical through-connection 110 is obtained, the vertical through-connection 110 extending straight through the two

components

108, 118 and through the adhesive structure 120 between the

components

108, 118. Thus, electrically conductive vertical through connections 110 may be formed in the

component

108, 118 before embedding the

component

108, 118.

Referring to fig. 12, the electrically conductive pads 160 (or any redistribution layer) may be formed on one major surface or both opposing major surfaces of the stacked component configuration of fig. 11. This can be achieved by forming a metal layer, in particular a copper layer, on the two opposite main surfaces of the stacked component configuration of fig. 11. The metal layer may then be patterned to form pads 160. The resulting stacked component configuration of fig. 12 may then be inserted into a cavity or through-hole formed in the stack 102 (not shown) for completing the manufacture of the component carrier 100.

It should be noted that the term "comprising" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Also elements described in association with different embodiments may be combined.

It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

The implementation of the invention is not limited to the preferred embodiments shown in the drawings and described above. On the contrary, many variants are possible using the illustrated solution and the principle according to the invention, even in the case of fundamentally different embodiments.

Claims

1. A component carrier (100), wherein the component carrier (100) comprises:

a layer stack (102), the layer stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106);

a component (108) located on the layer stack (102) and/or in the layer stack (102); and

at least one continuous vertical through-connection (110), the at least one continuous vertical through-connection (110) extending between two opposite main surfaces of the component (108) and extending straight through the component (108) and continuing straight through at least one further structure (112) of the component carrier (100).

2. The component carrier (100) according to claim 1, wherein the at least one further structure (112) comprises a further component (118).

3. The component carrier (100) according to claim 2, wherein the component (108) and the further component (118) are vertically stacked on each other.

4. The component carrier (100) according to claim 2 or 3, wherein the component (108) and the further component (118) are electrically coupled to functionally cooperate.

5. The component carrier (100) according to any of claims 2 to 4, comprising an adhesive structure (120), the adhesive structure (120) fixing the component (108) and the further component (118) to each other, in particular the adhesive structure (120) is a dielectric adhesive structure.

6. The component carrier (100) according to any of claims 2 to 5, wherein the component (108) and the further component (118) are a combination of: two memory chips, a memory chip and a processor, and a controller and a sensor.

7. The component carrier (100) according to any of claims 2 to 6, wherein the at least one further structure (112) comprises a further component (122) overlapping the component (108) and the further component (118).

8. The component carrier (100) according to any of claims 1 to 7, wherein the at least one further structure (112) comprises at least one of the at least one electrically insulating layer structure (106) of the layer stack (102).

9. The component carrier (100) according to any of claims 1 to 8, comprising one of the following features:

wherein the component (108) is embedded in the interior of the layer stack (102) to be completely circumferentially surrounded by the material of the layer stack (102);

wherein the component (108) is received in a cavity of the layer stack (102) to extend up to a major surface of the layer stack (102);

wherein the component (108) is surface mounted on the layer stack (102).

10. The component carrier (100) according to any of claims 1 to 9, comprising a plurality of continuous vertical through connections (110), the plurality of continuous vertical through connections (110) extending parallel to each other between two opposite main surfaces of the component (108) and extending straight through the component (108) and continuing to extend straight through the at least one further structure (112).

11. The component carrier (100) according to claim 10, wherein a center distance (D) between two adjacent vertical through connections (110) is less than 250 μ ι η, in particular wherein a center distance (D) between two adjacent vertical through connections (110) is less than 200 μ ι η, more particularly wherein a center distance (D) between two adjacent vertical through connections (110) is less than 150 μ ι η.

12. The component carrier (100) according to any of claims 1 to 11, wherein the diameter (d) of the at least one vertical through-connection (110) is in the range of 20 μ ι η to 200 μ ι η, in particular the diameter (d) of the at least one vertical through-connection (110) is in the range of 40 μ ι η to 150 μ ι η.

13. The component carrier (100) according to any of claims 1 to 12, wherein the shape and the area (a) of the horizontal cross section of the at least one vertical through-connection (110) is substantially constant along the entire vertical extension of the at least one vertical through-connection (110).

14. The component carrier (100) according to any of claims 1 to 13, wherein the at least one vertical through-connection (110) is an integral, uniform structure.

15. The component carrier (100) according to any of claims 1 to 14, wherein the aspect ratio of the at least one vertical through-connection (110) is at least three, in particular the aspect ratio of the at least one vertical through-connection (110) is at least five, more in particular the aspect ratio of the at least one vertical through-connection (110) is at least ten.

16. The component carrier (100) according to any of claims 1 to 15, wherein the component (108) is a semiconductor component, in particular wherein the component (108) is a silicon chip.

17. The component carrier (100) according to claim 16, wherein the semiconductor component is a bare semiconductor wafer or a molded semiconductor wafer.

18. The component carrier (100) according to any of claims 1 to 17, wherein the at least one continuous vertical through-connection (110) is at least one of a through-silicon-perforation and/or a through-mold-perforation.

19. The component carrier (100) according to any of claims 1 to 18, wherein the at least one continuous vertical through-connection (110) has a cylindrical shape.

20. The component carrier (100) according to any of claims 1 to 19, wherein the diameter (d) of the at least one continuous vertical through-connection (110) is smaller than the diameter (L) of a vertical connection (124) of the at least one electrically conductive layer structure (104), in particular the vertical connection (124) is a plated laser perforation.

21. The component carrier (100) according to any of claims 1 to 20, wherein at least one of an upper end and a lower end of the vertical through-connections (110) is connected to at least one of the at least one electrically conductive layer structure (104), in particular at least one of an upper end and a lower end of the vertical through-connections (110) is connected to copper filled laser perforations, more particularly at least one of an upper end and a lower end of the vertical through-connections (110) is connected to a stacked array of copper filled laser perforations.

22. The component carrier (100) according to any of claims 1 to 21, comprising at least one of the following features:

wherein the at least one electronically conductive layer structure (104) comprises at least one of: copper, aluminum, nickel, silver, gold, palladium and tungsten, any of the mentioned materials optionally being coated with a superconducting material, such as graphene;

wherein the at least one electrically insulating layer structure (106) comprises at least one of: resins, FR-4, FR-5, cyanate esters, polyphenylene derivatives, glass, prepregs, polyimides, polyamides, liquid crystal polymers, epoxy laminates, polytetrafluoroethylene, ceramics and metal oxides, in particular reinforced or non-reinforced resins, such as epoxy resins or bismaleimide-triazine resins;

wherein the component carrier (100) is shaped as a plate;

wherein the component carrier (100) is configured as one of a printed circuit board and a substrate;

wherein the component carrier (100) is configured as a laminated component carrier (100).

23. A method of manufacturing a component carrier (100), wherein the method comprises:

forming a layer stack (102), the layer stack (102) comprising at least one electrically conductive layer structure (104) and/or at least one electrically insulating layer structure (106);

assembling a component (108) on the layer stack (102) and/or in the layer stack (102); and

forming at least one continuous vertical through-connection (110), the at least one continuous vertical through-connection (110) extending between two opposite main surfaces of the component (108) and extending straight through the component (108) and continuing straight through at least one further structure (112) of the component carrier (100).

24. The method of claim 23, wherein the method comprises: -stacking and fixing the component (108) and at least one further component (118, 122) as the at least one further structure (112), and then assembling the stacked components (108, 118, 122) on and/or in the layer stack (102).

25. The method of claim 24, wherein the method comprises: -forming the at least one vertical through-connection (110) extending vertically through the stacked components (108, 118, 122) before assembling the stacked components (108, 118, 122) on the layer stack (102) and/or in the layer stack (102).

26. The method of claim 23, wherein the method comprises: after assembling the component (108) on the layer stack (102) and/or in the layer stack (102), the component (108) and at least one further component (118, 122) as the at least one further structure (112) are stacked and fixed.

27. The method of claim 24 or 26, wherein the method comprises: -forming the at least one vertical through-connection (110) extending vertically through the stacked components (108, 118, 122) before assembling the stacked components (108, 118, 122) on the layer stack (102) and/or in the layer stack (102).

28. The method of any one of claims 23 to 27, wherein the method comprises: the at least one vertical through-connection (110) is formed by forming at least one through-hole in the component (108) and the at least one further structure (112) and subsequently filling the at least one through-hole with an electrically conductive material, in particular by laser drilling in the component (108) and the at least one further structure (112), in particular by filling the at least one through-hole with the electrically conductive material by plating or sputtering.