Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
  • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
  • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
  • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M7/483—Converters with outputs that each can have more than two voltages levels
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M5/00—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases
  • H02M5/02—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC
  • H02M5/04—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters
  • H02M5/22—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M5/275—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M5/293—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49204—Contact or terminal manufacturing
  • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts

Definitions

• Multi-level multi-level matrix converter circuit and method of implementing such a circuit.
• the present invention relates to a n-level-per-phase matrix converter circuit comprising n conversion arms fed respectively by n intermediate voltage levels and connected in output to a common point generating an output current.
• a circuit is also called multi-level voltage inverter,
• the multilevel inverter technique offers numerous topologies, mainly of the NPC type for "Neutral Point Clamped” and MPC for “Multi Point Clamped". Their main characteristics are:
• Multilevel inverters are initially dedicated to high voltage. Therefore, by topological modifications, it is generally sought to increase the power by generating higher voltages, and it is also sought to obtain output signals having a reduced harmonic content.
• FIG. 1 shows a three-phase single-phase NPC structure having for its source a DC voltage supplying two capacitors C1 and C2 so as to obtain three different DC voltage levels: E / 2, 0 and -E / 2.
• the voltage across each capacitor C1 and C2 being equal in absolute value to E / 2.
• the diodes D1 and D2, called “clamp” diodes make it possible to limit the voltage relative to each of the capacitors.
• NPC Neutral Point Clamped Multilevel Inverter
• N-level inverter N-level inverter
• the output switches are transistors each associated with a diode K1, K2, K3 and K4.
• the DC voltage between the capacitors C2 and C3 supplies the point of intersection between the transistors T2 and T3 via the clamp diode D3 on the one hand, and supplies the point of intersection between the transistors T5 and T6 via the clamp diode D4 on the other hand.
• Such types of multi-level inverters are mainly used for high voltages.
• two-level inverters are generally used.
• Such systems are, for example, embedded systems.
• two-level inverters are used. Their switching frequency is relatively high and it is found that the power factor is generally degraded.
• US6930899 discloses topologies without clamp diodes with arms having a series of two IGBT transistors connected by their collector and not by their emitter.
• the device described in this document reduces the number of components so as to improve the quality of the output signal.
• this device still has many components which is detrimental to the consumption, the electromagnetic compatibility that must comply with any radiating device, and the design of such a device is still expensive.
• the present invention therefore aims a multi-level matrix inverter for which the consumption is reduced compared to the devices of the prior art.
• Another object of the invention is the development of new N-level inverter structures dedicated to low voltage.
• Another object of the present invention is a rapid and inexpensive design of a new N-level inverter structure.
• this matrix converter circuit comprises:
• the inverter according to the invention does not include clamp diodes; by diode clamp means a diode which connects a fixed potential point on the side of the capacitor banks to another point of the inverter arm ...
• the present invention proposes a new structure of inverters with N levels dedicated especially to the low voltage.
• this inverter according to the invention will preferably be used for N less than or equal to five. It is possible to work with all the intermediate levels of the power source: from two to N, thus possibility of setting the rms value of the output voltage.
• the inverter according to the invention has only one IGBT transistor on the outer arms.
• the converter circuit according to the invention comprises a control module powered by a measurement of the output current and configured to control the IGBT transistors by modulated hysteresis.
• a feedback loop of modulated hysteresis type current is added.
• the current harmonic distortion rate (TDHi) tends to zero and the power factor is greatly improved. This quality is particularly interesting for all-electric embedded systems whose source has a limited energy in time.
• the converter circuit according to the invention may comprise a feedback loop including a hall effect sensor for measuring the output current.
• the modulated hysteresis control module comprises:
• an adder for adding a triangular carrier with a current setpoint resulting from the comparison between said current measurement and a reference current
• PWM pulse width modulation
• control with modulated current hysteresis control is entirely analog, therefore simple and robust. This principle makes it possible to greatly improve the power factor of the converter circuit, thus a sustainable and optimal use of the electrical energy involved.
• control module is configured to produce a switching frequency of less than five kHz. With a low frequency of division, the losses The switching efficiency is considerably reduced and the efficiency of the converter remains high with an increase in the lifetime of the IGBT transistors.
• the converter circuit according to the invention operates in hard commutation with, however, increased strength and viability.
• the control module can be configured to produce a switching frequency equal to two kHz.
• the converter circuit according to the invention comprises a wiring constituted by flat conductors of the "busbar" type comprising a plurality of metal plates for supplying the conversion arms, each conductor being able to be constituted several laminar metal plates.
• At least one of the two external arms further comprises a diode in series with the single IGBT transistor, the anode of the diode being connected to the emitter of the IGBT transistor. It is also possible to provide an embodiment in which at least one of the two external arms further comprises two parallel diodes but of opposite direction, the assembly consisting of these diodes being placed in series with the single IGBT transistor. With such embodiments, it limits the voltage drop across the outer arms, which is beneficial for work under high voltage.
• Such an embodiment provides a very good behavior in electromagnetic compatibility due to very low values of voltage distortion rate (THDv) and current (THDi).
• This wiring is used in particular for interconnections between other power circuits and the present converter circuit.
• the characteristics thus defined contribute to increasing the viability of the converter circuit according to the present invention with a not inconsiderable saving on the consumption and a better quality of the electrical energy.
• a method of designing a matrix converter circuit as defined above In the method according to the invention, said converter circuit is designed by assembling several identical modular elements.
• the modular element comprises two parallel arms intended to receive each input an intermediate voltage level, these arms being connected at the output at a point constituting said common point generating an output current.
• each arm comprises an IGBT transistor connected in series with a mechanical switch
• the collector of the transistor IGBT is disposed on the input side adapted to receive the highest voltage level; the mechanical switch being disposed between this IGBT transistor and the common point;
• the emitter of the IGBT transistor is disposed on the input side adapted to receive the lowest voltage level; the mechanical switch being disposed between this IGBT transistor and this input adapted to receive this lowest voltage level.
• each IGBT transistor being associated with a mechanical stop for disconnecting a mechanical switch during the design.
• each modular element comprises a capacitor bank arranged at the input between the two arms.
• FIG. 2 is a schematic view of an MPC structure according to the prior art
• FIG. 3 is a schematic view of a single-phase three-level matrix inverter according to the invention.
• FIG. 4 is a schematic view of a single-phase four-level matrix inverter according to the invention.
• FIG. 5 is a schematic view of a single-phase five-level matrix inverter according to the invention.
• FIG. 6 is a schematic view of a three-phase three-phase matrix inverter according to the invention.
• FIG. 7 is a schematic view of a three-phase five-phase matrix inverter according to the invention.
• FIG. 8 is a schematic view of a modular element for the interlocking design of a matrix inverter according to the invention.
• FIG. 9 is a schematic view of a single-phase three-level matrix inverter designed from two modular elements according to the invention.
• FIG. 10 is a schematic view of a single-phase four-level matrix inverter designed from three modular elements according to the invention.
• FIGS. 11a, 11b, 11c and 11d illustrate operating curves for inverters with 2, 3, 4 and 5 levels respectively in degraded mode according to the invention
• FIGS. 12a, 12b, 12c and 12d illustrate operating curves for a level-switching level inverter according to the invention
• FIGS. 13a-13f illustrate operating curves for a 3-phase three-phase inverter according to the invention
• FIGS. 14a-14f illustrate operating curves for a three-phase inverter according to the invention
• FIGS. 15a, 15b and 15c are diagrammatic views of a single phase "N" level matrix inverter comprising voltage drop limiting switches according to the invention.
• FIG. 16 is a schematic view of a continuous source with banks of capacitors.
• FIG 3 we see an example of inverter or matrix converter with three levels according to the present invention.
• the DC voltage source and the capacitors are not shown.
• This three-level inverter comprises three arms fed respectively by three DC voltage levels VI, 0 and -VI.
• the two outer arms are the arms powered respectively by VI and -VI.
• the external arm powered by VI comprises a switch T1 constituted by an IGBT transistor in parallel with a diode.
• the emitter of the IGBT transistor is connected to the anode of the diode, the collector of the IGBT transistor being connected to the cathode of the diode.
• IGBT switch such an assembly consisting of an IGBT transistor and a diode arranged in parallel in the manner indicated above, will be called "IGBT switch".
• the second external arm powered by -VI comprises an IGBT switch T4.
• the two IGBT switches T1 and T4 are connected, by their emitter, to a common point A constituting the output of the three-level inverter.
• the output signal is a current signal modulated according to the conduction and interruption of the various switches of the inverter.
• the internal arm powered by a zero voltage comprises two switches IGBT T2 and T3 arranged in series and connected to one another by their transmitter. The 0 volt voltage thus feeds the collector of the IGBT switch T2, which in turn supplies the emitter of the IGBT switch T3, the latter having its collector connected to the common point A.
• clamp diodes are not used here, but only one IGBT transistor in the external arms.
• the switches T2 and T3 of the internal arm constitute a four quadrant switch thus comprising two IGBT transistors connected in series by their emitter.
• FIG. 3 also shows a DSP module which is an electronic card provided with standard microprocessors and / or microprocessors of the DSP type (for "Digital Signal Processing") and designed to generate control signals for the IGBT transistors.
• a pulse width modulation (PWM) control is carried out from a sinusoid and a single carrier wave with a relatively low switching frequency compared to the devices of the prior art.
• the design of this command is preferably totally analog.
• a "modulated hysteresis” type control strategy can be applied to improve the output current pattern by reducing the harmonics.
• the "modulated hysteresis” method combines the advantages of a PWM control with a simple hysteresis control. This method makes it possible to impose a switching frequency of the IGBT transistors of the inverter during a hysteresis check of the output current. More precisely, the output current is measured which is then compared to a setpoint. The result of this comparison is added to a triangular carrier. The assembly then feeds a hysteresis comparator which then generates a control signal which is then shaped as a control logic signal. A complementary control logic signal is also generated. The two logic control signals act respectively on the two IGBT transistors of an internal arm of the inverter.
• a low frequency control is performed, of the order of 1 to 2 kHz instead of the usual 5 to 10 kHz.
• the transistors heat up less, resulting in an extension of their service life and an overall efficiency of the inverter.
• Laminar wiring with grounding is also provided to reduce common mode currents.
• These conductors may for example be very thin and consist of three parallel plates of large dimensions according to a plan containing the inverter.
• the three plates are separated by insulators also thin.
• the three arms respectively correspond to the two outer arms and the inner arm.
• the ratio between the thickness of the insulators and that of the plates, and the large dimensions of the plates can be 1/500.
• Such a laminar conductor is sometimes called "bus bar”.
• the external arms have only one IGBT transistor and the internal arms two IGBT transistors in series connected by their emitter.
• the topology according to the invention adapts to any number of levels: even and odd. So it behaves simultaneously as a NPC (odd-number number) inverter and as MPC and "H-Bridge" inverters (even number of level, where the potential equal to 0 is not accessible). However, it differs from NPC and MPC inverters in particular by the absence of the clamp diodes, and the H-Bridge inverter by a single capacitor bank bus.
• the inverter can be obtained from modular member illustrated in Figure 8, with ⁇ > Vl.
• This is a 2-level UPS arm.
• This module comprises at least one capacitor C, two IGBT switches ⁇ (whose collector is connected to the positive potential of the bus bar carrying the voltage Vi) and f (whose emitter is connected to the negative potential of the bus bar carrying the voltage V 2 ) , two mechanical switches ⁇ and ⁇ 2 , two mechanical stops B1 B2 .
• the load is connected directly to point A.
• FIG. 9 an example of a modular arrangement of a 3-level inverter according to the invention is shown.
• a three-level inverter is thus obtained according to the invention: a bus bar (not shown) carrying the DC voltage is connected to the ends E1 and E2, the output being the point A for feeding a load.
• the number of level K can be directly related to the number of modules.
• K N-1 levels.
• the converter according to the invention can operate in degraded mode.
• the operating curves for a number of levels ranging from 2 to 5, for a single-phase inverter with 5 levels, obtained by simulation and with open loop, are given in FIGS. 11a, 11b, 11c and 11d.
• the number of breakdowns of the voltage is clearly visible because the frequency used is 1000 Hz.
• the possibility of operation in degraded mode underlines a great viability and especially solidity of the inverter, because in case of failure of any arm, the device can always continue to work with a number of lower level.
• This degraded mode consists of modifying the control of the switches so as to maintain the power transmitted to the load in normal mode or in case of failure. In the latter case, the device can continue to work symmetrically with a lower level number.
• FIGS. 12a, 12b, 12c and 12d show the open-loop operation of a 5-level inverter by a so-called stage switching setting. This action makes it possible to vary the duration of an offset of the output voltage: it is thus possible to adjust the total rms value and the fundamental of the output voltage of the inverter.
• FIGS. 13a-13f illustrate waveforms of the line currents, of the voltage between the point A and the midpoint of the busbar.
• VAO phase-to-neutral voltages for a three-phase 3-stage inverter.
• Figs. 14a-14f illustrate waveforms of line currents, voltage between point A and center point of the VAO bus bar, phase-to-neutral voltages for a three-phase 5-level inverter.
• FIG. 15a distinguishes a topology of a five or N level inverter comprising a DC voltage source 151, a set of inverter arms 152 and an output output terminal 153.
• the internal arms comprise switches of the "type” type.
• X Consisting of IGBTs with their internal diode.
• a switch type "Y” according to the invention is as illustrated in Figures 15a and 15b, it consists of an IGBT transistor with its inner diode and two parallel diodes head to tail, the two parallel diodes being arranged in series with respect to the IGBT.
• a "Y” type switch according to the invention is as illustrated in FIGS. 15a and 15c, it consists of an IGBT transistor with its internal diode and an additional diode placed in series.
• the "Y” switch is bidirectional in current and voltage and the "Y” switch is monodirectional in current. With such switches, the maximum direct locking voltage for the "Y" (or “Y”) switch of the upper arm is obtained when the lower arm is driving. If this voltage is equally distributed between the IGBT and the two diodes (respectively the diode), it comes: ⁇ .
• the diodes placed in series with the IGBT transistor make it possible to halve the direct blocking voltage of each switch.
• FIG. 16 illustrates an example of a power supply providing different DC voltages required for an inverter according to the invention.
• the various DC voltages are developed from a single DC power source supplying a three-phase rectifier diode provided with a low-pass filter with banks of capacitors, then stipulating a distribution of symmetrical voltage levels:
• the converter according to the present invention is advantageously applied to energy conversion systems of small a scale where the robustness of the product and the power factor are the guarantors of a sustainable and optimal exploitation: in particular on-board "all-electric" systems and the transformation of electrical energy by wind turbine. These systems are usually associated with confined spaces or the new structure of the multi-level converter meets the standards of electromagnetic compatibility and harmonic pollution. Such a converter allows economical manufacturing, simple and compact, with optimized energy consumption.

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Inverter Devices (AREA)
• Logic Circuits (AREA)
• Power Conversion In General (AREA)

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• 2009
  • 2009-11-10 FR FR0957944A patent/FR2952485B1/fr active Active
• 2010
  • 2010-11-10 US US13/509,001 patent/US20120243273A1/en not_active Abandoned
  • 2010-11-10 EP EP10795426A patent/EP2499733A2/de not_active Withdrawn
  • 2010-11-10 WO PCT/FR2010/052408 patent/WO2011058273A2/fr not_active Ceased

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