EP2487783A2

EP2487783A2 - Ultra-high efficiency switching power inverter and power amplifier

Info

Publication number: EP2487783A2
Application number: EP11004740A
Authority: EP
Inventors: Xue Jian Chen
Original assignee: Music Group IP Ltd
Current assignee: Music Group IP Ltd
Priority date: 2010-06-08
Filing date: 2011-06-10
Publication date: 2012-08-15
Also published as: AU2011263451A1; BR112012025903A2; EP2487783A3; RU2558945C2; WO2011154792A2; JP2013528351A; ZA201207971B; US20110299309A1; AU2011263451B2; MY152379A; SG185535A1; WO2011154792A3; RU2012148899A; CN103038968A; MX2012011812A; KR20130081639A; IL223032A0; CA2797360A1; US8390373B2; EP2580830A2

Abstract

The present application discloses an apparatus (100) for providing a power output proportional to a source signal. The apparatus (100) comprises a phase modulator (106) driving an upper and lower power driver (108,110) with substantially the same carrier waveforms having a relative phase difference there between. The carrier waveforms may have a signal modulated thereon. The power drivers (108,110) are each coupled to a resonator circuit (112,116) such that they operate as a substantially zero-voltage zero-current switching element. The output of the two power drivers (108,110) is fed into a respective upper and lower transformers (114,118) that are substantially electromagnetically identical to one another and providing electrical isolation. On the secondary side of each of the upper and lower transformer (114,118) are identical symmetrical secondary circuits that have a rectifier stage electrically connected to an inductor (L5) in series with an upper capacitor (C1) to form an upper low pass filter having a corner frequency greater than the source frequency and less than the carrier frequencies, and further serving to integrate the source signal, a semiconductor switch (M1) electrically connected to an electrical junction between the inductor and rectifier stage to provide a return path for high-frequency current to ground, and an output element electrically connected to an electrical junction between the inductor and capacitor. The inductor (L10) associated with the lower secondary circuit is highly coupled (>=0.99) to the upper inductor (L5), such that the high speed semiconductor switches (M1,M2) operate as substantially zero-voltage zero-current switching elements. An output is formed across the upper and lower output elements that is isolated from rail voltage and more preferably balanced with bi-directional current.

Description

Statement of Related Cases

The present application is a continuation-in-part of U.S. Provisional Patent Application No. 61/352,354 filed on June 8,2010 entitled "System and Method for Providing Isolation of a Signal Within a Direct Coupling Amplifier."

Technical Field of the Disclosure

The present invention relates in general to power conversion systems, and in particular to a high-efficiency single stage inverter or amplifier.

Summary of the Invention

The present invention is a single stage power supply or power amplifier that achieves ultra-high efficiency. Among other aspects, all of the switching elements (on both the primary and secondary side of the apparatus) are operated as substantially zero-voltage zero-current switching elements. This "soft" switching is not only more efficient, but it also reduces EMC noise. Moreover, the present inventive circuitry does not require separate power supply and switching power amplification stages, thus avoiding additional parts costs and added space requirements. Furthermore, because there is no high voltage DC source required on the secondary side of the transformer there is no risk of an over voltage situation in the disclosed topology. Also, because the present invention uses two switching transformers and symmetrical circuitry in the secondary, it produces a fully balanced differential output formed across the output of the upper and lower secondary circuits.
The present application discloses an apparatus for providing a power output proportional to a source signal. The apparatus comprises a phase modulator controlling upper and lower power drivers that, in turn, drive upper and lower transformers. The upper and lower transformers serve to at least electrically isolate the output from the hazardous input voltage and may also be used to provide gain and/or impedance matching on the output by altering the turns ratios. Furthermore, in the present invention, the phase difference between the carrier signals for the upper and lower power drivers can be used to "fine tune" the output voltage. Yet, because the phase modulator preferably utilizes carriers with fixed predetermined duty cycles, the complexity of the modulator and the rest of the circuitry is avoided. Furthermore, phase shift power conversion in the present invention does not generally generate any cross-over distortion especially in comparison with most previous power amp topologies.
The circuitry on the secondary side of each of these upper and lower transformers is substantially symmetrical and comprises a rectifier stage electrically connected to an inductor in series with a capacitor to form a low pass filter (having a corner frequency substantially greater than the frequency of the source signal and less than the frequency of the carrier generated by the phase modulator), which further serves to integrate the source signal. The secondary circuitry also includes a semiconductor switch electrically connected to the electrical junction between the inductor and rectifier stage to provide a return path for high-frequency current to ground. Using these semiconductor switches also allows the output to achieve bi-directional current flow.
The inductors associated with the upper and lower secondary circuits are highly coupled (i.e. greater than or equaled to 0.99) to one another. In a preferred embodiment, the upper and lower inductors are both wound on the same core, which may be, for example, an E-core or torroidal. Moreover, the semiconductor switches are preferably physically disposed within the magnetic field generated by the upper and lower inductors such that these semiconductor switches also operate as substantially zero-voltage zero-current switching elements. Furthermore, using the coupled inductors with semiconductor switches allows the circuit to achieve bi-directional energy circulation.
In some embodiments the apparatus may also include current sensing circuits operably connected to measure current output of the upper and lower power drivers to provide feed back to the phase modulator to provide over current protection.
In other embodiments, the apparatus may further comprising an error correction circuit operably connected between the fully balanced differential output and the phase modulator to reduce distortion and correct balance. In certain embodiments including a power factor correction circuit, a damping control may be operably connected between the error correction circuit and the power-factor correction circuit to adjust the DC rail voltage output by the power factor correction circuit.

Brief Description of the Figures

Various embodiment of the disclosure are now described, by way of example only, with reference to the accompanying figures.
FIG. 1 shows one embodiment of a system in accordance with the present invention;
FIG. 1A shows one embodiment of a coupled inductor for use in the present invention;
FIG. 1B shows one embodiment of a coupled inductor for use in the present invention;
FIG. 2 shows one embodiment of a single stage, high efficiency, DC-AC inverter in accordance with the present invention;
FIG. 3 shows one embodiment of a single stage, high efficiency, amplifier in accordance with the present invention;
FIG. 4 shows voltage and current waveforms across the output as produced by LTspice IV software modeling of one particular implementation of the circuit of FIG. 1;
FIG. 5 shows a current waveform through L2 as zero voltage and zero current switching produced by LTspice IV software modeling of one particular implementation of the circuit of FIG. 1; and
FIG. 6 shows voltage waveforms at various nodes in one particular implementation of the circuit of FIG. 1, as produced by LTspice IV software.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale, For example, the dimensions and/or relative positioning of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of various embodiments of the present disclosure. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are not often depicted in order to facilitate a less obstructed view of these various embodiments of the present disclosure. It will be further appreciated that certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required. It will also be understood that the terms and expressions used herein are to be defined with respect to their corresponding respective areas of inquiry and study except where specific meaning have otherwise been set forth herein.
Throughout the specification and claims, the phrase "in one embodiment" does not necessarily refer to the same embodiment, although it may. Similarly, the phrase "in another embodiment" as used herein does not necessarily refer to a different embodiment, although it may. As described herein various embodiments of the invention may be readily combined, without departing from the scope or spirit of the invention.

Detailed Description of the Disclosure

The present invention provides a novel power converter design that may be utilized for various devices, including inverters, converters, amplifiers, motor drivers, or the like. In general, the system operates by receiving a signal from a source that is separately modulated on two substantially similar (preferably identical), periodic alternating signals with a fundamental frequency that is substantially greater than the frequency of the signal. Thus, each of the high frequency signals acts as carrier. The relative phases of these carrier signals may be phase shifted relative to one another (for example, from 1° to 89°) to provide some of the gain across the output in the secondary. As discussed further below, the overall circuit output is based own the difference between these signals.
Each of the two modulated high-frequency signals are each fed into a respective resonator circuit on the primary side that establishes the necessary electrical conditions for substantially zero voltage and zero current switching. Each of the signals are then fed into the primary winding of a respective transformer. The transformer provides isolation and may also be used in some implementations to provide gain (i.e. step-up or step-down transformer). The two modulated high-frequency signals are, thus, coupled to the secondary circuit.
The secondary circuit is substantially symmetrical about the output. Diodes in the secondary provide that the current only flows forward out of both ends of the secondary winding of each transformer toward the circuit output ensuring current flow during nearly all of the cycle. The diodes convert both positive and negative pulses to positive pulses. As result, the carrier frequency is doubled in the secondary circuit. As would be understood by those of ordinary skill in the art other circuits and/or semiconductor elements may be used in place of diodes to create this rectifier stage on the secondary output of the transformers. Two low pass filter circuits (L5/C1 and L10/C2) are formed on each side of the output port. The values of the capacitance (C1 and C2) and inductance (L5 and L10) are selected to provide a corner frequency (associated with the low pass filter funcfionality of these capacitor-inductor circuits) well above (if not at least an order of magnitude above) the frequency of the anticipated output signal. These capacitor-inductor pairs (L5/C1 and L10/C2) also serve to integrate the voltages proportional to the signal source 104 across the circuit output. The inductors L5 and L10 used in the low pass filters are very closely magnetically coupled but not electrically connected. Preferably, inductors L5 and L10 have a coupling factor of 0.99 or better and are wound (preferably very tightly) about the same physical core. The strong coupling and topology of these inductors serve to substantially preclude bi-directional current flow across the output of the circuit.
In addition, the magnetic field established by operation of inductors L5 and L10 facilitates the turn on of the internal body diodes in high speed semiconductor switches M I and M2. By minimizing the inertia inherent in transitioning a FET from "off" to "on", hard switching of the semiconductor switches and associated power losses can be substantially avoided. This makes the electrical circuit more efficient, particularly at the cross-over points. As a result, semiconductor switches, M1 and M2, operate as substantailly zero-voltage switching elements. Preferably, semiconductor switches M1 and M2 are high-speed switches such as nMOSFETs. However, the same operation can be achieved using any semiconductor switch capable of operating at the desired speeds, such as, for example, IGBTs plus additional diodes.
Thus, as will be apparent from the discussion below, this design provides substantial improvements in efficiency, as well as significant cost and space saving over existing systems.
FIG. 1 provides one embodiment of a system 100 in accordance with the present invention. In this embodiment, the system 100 includes a primary and a secondary stage. In the primary stage of FIG. 1, system 100 has a DC input 102, signal source 104, phase modulator 106, two power drivers 108 and 110, two resonator circuits 112 and 116, and the primary coil of two switching transformers 114 and 118.
In the secondary stage of FIG. 1, system 100 includes the secondary coils L3/L4 and L8/L9 of the two switching transformers 114 and 118, respectively, each of these secondary coils being electrically connected via diodes to a respective one of "Node A" or "Node B" and then into low pass filters formed by a discrete inductor-capacitor pair (i.e. L5/C1 and L10/C2). The nominal values selected for each discrete inductor-capacitor pair give each low pass filter a cutoff or corner frequency below the high fundamental frequency of the carriers and preferably well above the frequency of the signal. These low pass filters provide high frequency filtering in order to substantially remove the carrier signals while passing the signal from source 104. Generally speaking, C1 and C2 in this topology only conducts a small ripple of current to ground.
In the circuits of FIGS. the inductors L5 and L10 are preferably tightly wound about the same core to achieve a high coupling coefficient, which is preferably better than 0.99. With this design, L5 and L10 together provide for substantially complete energy flow in the secondary circuit of FIG. 1. As illustrated in FIGS. 1A and 1B, the core may be torroidal or an E-core, with the E-core type being presently preferred but not limited to the core shape. The core may be made of ferrite, powder iron or any other materials for making a power inductor. Preferably, the inductance of L5 and L10 are substantially identical and in the range of 20 micro-Henries to 50 micro-Henries. The secondary stage of FIG. 1 also includes semiconductor switches M1 and M2, which are preferably high-speed n-type MOSFETs (as shown in the figures). As would be understood by those of ordinary skill in the art semiconductor switches M1 and M2 could also be implemented using high-speed IGBTs (plus additional diodes as would be understood by those of ordinary skill in the art having the present specification before them) or any other semiconductor switch that provides high-speed switching. The gates of each of the semiconductor switches M1 and M2 are connected via R_small and diodes to the last turn of secondary transformer coils L3 and L4 or L8 and L9, respectively. M1 and M2 provide bi-directional high frequency current flow from Node A and Node B to ground in the operation. In the preferred embodiment, R is on the order of 100 KΩ while R_small is on the order of 10Ω. The M1 /M2 circuitry is configured such that at any time either M1 or M2 is conducting, but preferably not both at the same time.
The DC input may be supplied by any DC source, such as a battery, a half-bridge or full-bridge rectifier that converts an alternating current (AC) to DC (also often referred to as an AC/DC converter), or the like. The amplitude of the DC voltage may be a matter of design choice based on the intended application for system 100, although it is generally contemplated that the DC voltage may be on the order of several hundred volts.
The signal input at signal source input 104 may also be any type of signal depending on the application for which system 100 is being utilized. For instance, in an embodiment where the system 100 is to be utilized as part of an DC-AC inverter, the signal source may generated by a sine wave generator.. On the other hand, in an embodiment where the system is to be utilized as part of a power amplifier, the signal source may be comprised of an audio signal (generally thought of as ranging from 40 20Hz to 20 kHz) that is to be amplified by the system 100. Of course, other signals may be utilized with the system 100, however, those signals should preferably have a fundamental frequency that is at least one order of magnitude lower than the fundamental frequency of the carrier signals.
Phase modulator 106 generates alternating, periodic signals with substantially the same duty cycle and frequency (also referred to herein as carrier signals or carriers), with power driver outputs 108a and 110a indicating the HIGH output terminal of each respective power driver, and outputs 108b and 110b indicating the low output terminal, respectively. Each power driver is driven by the phase modulator, which may be used to control the maximum amplitude voltage of the signal generated by each power driver. In one preferred embodiment, each power driver 108 and 110 is driven by phase modulator to generate a square wave having a 50% duty cycle. The fundamental frequency of the signal produced by phase modulator 106 is based on the application in which the circuit is to be utilized, and is preferably at least one order of magnitude greater than the frequency of the signal source. For example, in an embodiment where the signal source has a frequency of 60Hz, it is desirable that the frequency of the signals produced by power drivers 108 and 110 be at least 600Hz, and preferably more than 1kHz. Similarly, in an embodiment where the signal source may be an audible signal—which is generally understood to be within a range of 20 Hz to 20kHz—it is desirable that the frequency of the carrier signals produced by phase modulator 106 be at least 200kHz, and more preferably between 400kHz and 1MHz.
Utilizing a higher frequency range for the carriers output by phase modulator 106 provides multiple advantages. First, it provides sufficient separation between the carrier frequency and the frequency of the signal source to enable the power frequency to be filtered out at the output 120. Second, higher carrier frequencies allow for the use of smaller transformers 114 and 118, thus further decreasing the expense, weight, and physical footprint of system 100.
Square wave drivers are well-known in the art and it is contemplated that any type of square wave-driver may be used. For instance, each power driver may be a push pull circuit utilizing MOSFETs (or other field effect transistors), a full-bridge circuit, a half-bridge circuit, or the like. In yet another embodiment, power drivers 108 and 110 may also be configured to produce other type of periodic signals (not limited to square wave) so long as each of the phase modulator 106 provides substantially the same periodic signal with substantially the same duty cycle and same fundamental frequency.
The phase modulator 106 is configured to receive the signal source 104, generate carrier signals and to control the phase modulation and relative phase between the carrier signals. In one embodiment, the phase modulator 106 is preferably a digital phase modulator formed by a digital signal processor (DSP), that samples the signal source 104 at a predetermined rate. Any sampling rate may be used, as it need not be related to the frequencies used in any of the system components, with higher sampling rates being preferred in order to achieve lower distortion of the input signal 104. In an alternative embodiment, an analog phase modulator may be used instead. In the embodiment of FIG 1, the phase modulator 106 is also shown as being powered from the DC signal, although it is contemplated that a separate power source may also be provided.
Each switching transformer 114 and 118 preferably includes a primary winding operably connected to a respective power driver, and a secondary winding operably connected to forward-biased rectifier stage in the secondary. These transformers 114 and 118 provide electrical isolation of the circuit output 120 from the supply voltage and virtually eliminates any potential over voltage situation at output 120. By utilizing the two separate transformers 114 and 118, a balanced output is also achieved by the circuit. As is well understood by those in the art, a balanced output is desirable because, among others, it permits the use of longer cables while reducing susceptibility to external noise. This is particularly advantageous in audio applications and lengthy power transmission lines.
In FIG. 1, the primary and secondary windings of transformers 114 and 118 are illustrated as utilizing the same number of windings. However, it is contemplated that transformers 114 and 118 may be step-up or step-down transformers in which case the primary and secondary windings would have different numbers of turns. By altering the number of turns in the transformers, the amount of signal gain at the output 120 can be increased or decreased in order to achieve a desired voltage range across output 120 and to match the output impedance, as may be desired. In order to provide complete isolation, it is also desirable that the primary and secondary winding of each switching transformer be separated by a minimum physical distance that is considered sufficient to provide isolation up to 3000V AC. In one embodiment, the transformers 114 and 118 may also utilize a ferrite core, although other cores may also be used, including but not limited to air cores. It is also contemplated that the internal stray elements of the transformers may be used to aid in filtering noise.
The operation of the system 100 is as follows. The phase modulator 106 generates two substantially similar alternating signals that are between 1 °-89° out of phase with one another and have an amplitude based on the DC power supply. At 1° and 89° the circuitry of FIG. 1 will result in maximum voltage gain (exclusive of any gain generated in the transformers) whereas a 45° will result in practically no output voltage at circuit output 120. This is because the output is a balanced output formed by two nodes each comprising the voltage of their respective one of the two substantially symmetrical circuits of the secondary. In this manner, the voltage differential between the two nodes establishes the output voltage (or signal) at any given time in the periodic cycle of the carrier generated by phase modulator 106. Accordingly, where the phase difference between the carriers generated by phase modulator 106 in the primary is 45° -- because of the frequency doubling in the secondary of FIG. 1 -- there will be no voltage differential at any point in the periodic cycle between the signals on the nodes collectively forming circuit output 120. Thus, one or more control signals (not shown) fed to phase modulator 106 control the relative phase shift between the carrier waves, which, in turn, controls the aspect of the gain across the output terminals 120 that is proportional to the phase shift. Thus, by continuously and/or periodically adjusting the phase shift on the outputs of phase modulator, an output signal can be generated that is proportional to the signal source 104. The voltage range of the output signal 120 can also be adjusted by varying either the DC input level or, as noted above, by varying the turns ratio between the primary and secondary windings of the switching transformers 114 and 118. Furthermore, any signal received on signal source 104 by the phase modulator 106 modulates the carrier waves relative to the signal source 104.
The above-described circuit design can be utilized to efficiently provide amplification of an external power source, invert a DC signal to an AC signal, motor drive, or the like. The use of phase shifting to control the gain of the output signal also provides numerous advantages. For example, it enables the system to provide highly efficient power conversion. It also virtually eliminates cross-over distortion that is common in many present day power-amplifier circuits that utilize switching transistors. Soft-signal clipping and audio signal gain compression can also be achieved by limiting the phase shift range of the phase modulator. Most importantly, the invention has all switching devices working in a substantially zero voltage and zero current condition, which is unachievable in at least the prior art class D amplification structures.
FIG. 2 illustrates one embodiment of a single stage DC-AC inverter 200 utilizing the circuit design of the present invention. Inverter 200 includes a phase modulator 106, two power drivers 108 and 110, and two switching transformers 114 and 118 that operate in a manner similar as described above in FIG. 1. In this embodiment, the DC input is supplied from an external DC power source and passed through a filter, such as an EMC filter 202. The signal source is provided by a sine wave generator 204. The frequency of the sine wave output by the sine wave generator is a matter of design choice based on the frequency of the AC signal desired at output 120. For instance, as non-limiting examples, consumer devices in many parts of the world generally operate on a 50Hz AC signal. In such cases, the sine wave generator may be configured to produce a 50 Hz sine wave. In America, by contrast, consumer devices are generally configured to operate on a 60Hz signal. In yet another embodiment, the sine wave generator may be configured to utilize frequencies between 10-30Hz in order to operate fluorescent lamps.
As shown in the embodiment of FIG. 2, the DC-AC inverter may also include one or more optional components in accordance with the present invention. These may include current sensing circuits 206 and 208 and an output error correction circuit 212. In one embodiment current sensing circuit 206 and 208 may be coupled to a respective power driver 108 and 110 to provide a feedback loop to phase modulator 106 to provide over-current protection. Various configurations of current sensing circuits are well known in the art. For example, in an embodiment where the power driver is a push-pull MOSFET configuration, each current sensing circuit 206 and 208 may be a single resistor. As a result, full, over current protection can be achieved using a very simple and cost-effective current sensing circuit. Of course, the current sensing circuit may comprise other components for other type of power drivers as would be understood by those in the art.
In the embodiment of FIG. 2, the secondary is identical in design and operation to the secondary discussed with respect to FIG. 1. However, in this embodiment, the error correction circuit 212 may be provided to create a feedback loop from the output 120 to the phase modulator 106 in order to reduce distortion and correct balance.
FIG. 3 illustrates one embodiment of a single stage power amplifier 300 in accordance with the present invention. Amplifier 300 includes a phase modulator 106, two power drivers 108 and 110, and two switching transformers 114 and 118 that operate in a manner similar as described above in FIG. 1. In this embodiment, the DC input to amplifier 300 is provided by an input rectifier 302 that converts an AC input into a DC signal, and then passed through a. power factor correction circuit 304. Any type of power factor correction circuit may be used, which are well known in the art. For example, the power factor correction circuit 304 may include an automatic power factor correction unit (for example, one or more capacitors that are switched by contactors, which are in turn controlled by a regulator that measures a power factor of the network); a passive power factor correction unit (for example, an inductor); an active power factor correction unit (for example, a boost converter, a buck converter, or a buck-boost converter); or the like.
In the system of FIG. 3, the signal source is provided from an external audio source and passed through an audio input stage 306. In the illustrated embodiment, the audio input stage 306 may be an op-amp, although any other audio input stage 306 may also be used. The external audio source may be any source that is to be amplified using power amplifier 300.
As shown, amplifier 300 may also include optional current sensing circuits 206 and 208 and an output error correction circuit 212, which operate in a similar manner to that described for FIG. 2. In addition, as shown in FIG. 3, the output correction circuit 212 may also be coupled to a damping control 310, which is in turn coupled to the power factor correction circuit. The damping control 310 utilizes the error signal provided from the output correction circuit 212 to control the damping factor of the amplifier, which can then be used to adjust the voltage being output from the power factor correction circuit.. By controlling the input voltage output the power factor correction circuit based on a load on the output 120, the sound quality at output 120 can be improved.

Now turning to FIGS. 4, 5 and 6, which depict various voltage and current waveforms -- produced by LTspice IV modeling software -- at various nodes and through various components in one particular implementation of the circuit of FIG. 1. In particular for purposes of modeling the operation of FIG. 1, (a) DC input voltage was selected to be 20 V; (b) a 100 kHz square wave carrier signal with a 50% duty cycle was generated in phase modulator 106; (c) the source signal is a 60 Hz sine wave; (d)

power drivers

108 and 110 were driven with a relative 10° phase difference; (e) switching

transformers

114 and 118 have primary:secondary ratios of 1:1; and (f) the discrete components were assigned the following values:

Component	Nominal Value
C1	1uf
C2	1uf
C6	10uf
C8	10uf
L1	500uh
L2	2uh
L3	500uh
L4	500uh
L5	20uh
L6	500uh
L7	2uh
L8	500uh
L9	500uh
L10	20uh
R5	4ohms
R6	100k ohms
R7	100k ohms

As shown in FIGS. 4 this combination of variables create a periodic output voltage and current that are substantially in phase. The output voltage is nearly at 1:1 ratio to the input voltage because the transformers 114 and 118 provided isolation only and the phase difference was quite small (i.e. 10°). The output current was modeled at the output by placing a 4 ohm resistor across the output terminals (not shown), which resulted in the current waveform according to SPICE. FIG. 5 shows the current through L6, which is substantially sinusoidal with the minor exception of the short zero current plateaus caused by zero-voltage crossings. This modeling verifies the power driver stage operates in a substantially zero voltage and zero current switching condition.
Various voltages (as indicated in the axes labels) are depicted in the voltage vs time graphs of FIG. 6. The three middle waveforms depict the illustrated 100kHz square wave, the square-wave shifted approximately 10° in phase behind the second wave, and the inverse of the 10° shifted wave, each of which will be generated by phase modulator 106. By comparing the topmost and bottommost graphs of FIG. 6 we can see that the 10° phase shift has resulted in a wider voltage pulse at "Node A" than at "Node B." In fact, these voltage diagrams are complementary in a manner substantially reflective of the 10° phase shift in this illustrative example. Under these conditions, C1 is going to be charged to a higher potential than C2.
The systems described above may be utilized in any application that utilizes a power inverter, converter, amplifier, or the like. However, the present invention is particularly suited to those applications in which efficiency and/or energy conservation is a primary concern. For instance, it is completed that the present invention may be utilized for DC-AC conversion in battery-powered vehicles, high power AC power supplies, solar power generators, high power AC power supplies, motor control applications, space and aviation technologies, and any other energy saving DC-AC power conversion applications. The present invention may also be utilized for audio power amplifier applications, and to provide efficient car power amplification.
Further advantages and modifications of the above described system and method will readily occur to those skilled in the art. The disclosure, in its broader aspects, is therefore not limited to the specific details, representative system and methods, and illustrative examples shown and described above. Various modifications and variations can be made to the above specification without departing from the scope or spirit of the present disclosure, and it is intended that the present disclosure cover all such modifications and variations provided they come within the scope of the following claims and their equivalents.

Claims

An apparatus for providing a power output proportional to a source signal, the source signal having a source frequency, the apparatus comprising:
a phase modulator generating first and second carrier signals with substantially identical carrier waveforms, carrier frequencies, and duty cycles, the first and second carriers having a relative phase difference and being modulated by the source signal resulting in first and second modulated carriers;

an upper transformer and a lower transformer, the upper transformer having an upper transformer primary and an upper transformer secondary and the lower transformer having a lower transformer primary and a lower transformer secondary, the upper and lower transformers being substantially electromagnetically identical to one another and providing electrical :isolation between primary and secondary stages;

an upper power driver driven by the first modulated carrier and drawing power from a DC supply to output a powered modulated carrier to the upper transformer primary, the upper power driver operably coupled to an upper resonator circuit such that the upper power driver operates as a substantially zero-voltage zero-current switching element;

a lower power driver driven by the second modulated carrier and drawing power from the DC supply to output a powered modulated carrier to the lower transformer primary, the lower power driver operably coupled to a lower resonator circuit such that the lower power driver operates as a substantially zero-voltage zero-current switching element;

an upper secondary circuit electrically connected to the upper transformer secondary, the upper secondary circuit comprising an upper rectifier stage electrically connected to an upper inductor in series with an upper capacitor to form an upper low pass filter having a corner frequency greater than the source frequency and less than the carrier frequencies, the upper low pass filter further serving to integrate the source signal, an upper semiconductor switch electrically connected to an electrical junction between the upper inductor and upper rectifier stage to provide a return path for high-frequency current to ground, an upper output element electrically connected to an electrical junction between the upper inductor and upper capacitor;

a lower secondary circuit electrically connected to the lower transformer secondary, the lower secondary circuit comprising a lower rectifier stage electrically connected to a lower inductor in series with a lower capacitor to form a lower low pass filter having a corner frequency substantially greater than the source frequency and less than the carrier frequencies, the lower low pass filter further serving to integrate the source signal, a lower semiconductor switch electrically connected to an electrical junction between the lower inductor and lower rectifier stage to provide a return path for high-frequency current to ground, a lower output element electrically connected to an electrical junction between the lower inductor and lower capacitor;

wherein the upper and lower inductors are coupled to one another, and the upper and lower high-speed semiconductor switches are physically disposed within a magnetic field generated by the upper and lower inductors such that both the upper and lower high-speed semiconductor switches operate as substantially zero-voltage zero-current switching elements, with the upper and lower high-speed semiconductor switch conducting at substantially complementary times as controlled by an increase in positive voltage on a respective one of the upper and the lower transformer secondaries; and

an output formed across the upper and lower output elements.
The apparatus according to Claim 1 wherein the upper and lower transformers have coil turns ratios that are substantially the same.
The apparatus according to Claim 1 wherein coil turns ratios for the upper and lower transformers are selected to achieve a desired output voltage range.
The apparatus according to Claim 3 wherein the coil turns ratios are further selected to match a desired impedance on the fully balanced differential output.
The apparatus according to Claim 4 wherein the relative phase difference is adjusted to reachieve the desired output voltage range while maintaining the desired impedance on the fully balanced differential output.
The apparatus according to Claim 1 wherein coil turns ratios of the upper and lower transformers are selected to match a desired impedance on the fully balanced differential output.
The apparatus according to Claim 1 wherein the first and second carrier signals generated by the phase modulator have a fixed predetermined duty cycle.
The apparatus according to Claim 1 wherein the source signal is a data signal containing frequencies of less than 20kHz, the phase modulator runs at a fundamental frequency two or more multiples of 20kHz.
The apparatus according to Claim 1 wherein the upper and lower inductors are both wound on the same core.
The apparatus according to Claim 9 wherein the core is an E-core.
The apparatus according to Claim 9 wherein the core is a torroid.
The apparatus according to Claim 1 further comprising an upper current sensing circuit operably connected to measure current output of the upper power driver and provide feed back to the phase modulator to provide over current protection.
The apparatus according to Claim 12 further comprising a lower current sensing circuit operably connected to measure current output of the lower power driver and provide feed back to the phase modulator to provide over current protection.
The apparatus according to Claim 1 further comprising an error correction circuit operably connected between the fully balanced differential output and the phase modulator to reduce distortion and correct balance.
The apparatus according to Claim 14 further comprising a power factor correction circuit and a damping control operably connected between the error correction circuit and the power factor correction circuit to adjust the DC rail voltage output by the power factor correction circuit.
The apparatus according to Claim 1 being capable of achieving both AC-DC and DC-AC power conversion depending upon the source signal input to the phase modulator.
The apparatus according to Claim 1 wherein the upper and lower rectifier stages respectively double the carrier frequencies of the first and second carriers found in the upper and lower secondary circuits.
The apparatus according to Claim 17 wherein the upper and lower rectifier stages are formed using a plurality of discrete diodes.
The apparatus according to Claim 1 wherein the output is fully balanced.
The apparatus according to Claim 19 wherein the output has bi-directional current flow due to the interaction of the upper and lower high-speed semiconductor switches and the upper and lover inductors that are highly coupled to one another.