Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
  • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
  • G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
  • G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
  • G01J5/22—Electrical features thereof
  • G01J5/24—Use of specially adapted circuits, e.g. bridge circuits
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
  • G01J1/00—Photometry, e.g. photographic exposure meter
  • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
  • G01J1/44—Electric circuits
  • G01J1/46—Electric circuits using a capacitor
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
  • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
  • H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/70—SSIS architectures; Circuits associated therewith
  • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors

Definitions

• the invention relates to the field of electromagnetic radiation sensors, and in particular to that of bolometer sensors, that is to say thermal detectors used to measure a quantity of energy flow absorbed, thanks to a variation of resistance caused by The heating of a plate or a detection layer, and capable of measuring the power of electromagnetic radiation in areas such as microwave or infrared radiation.
• the invention relates to bolometer sensors arranged in a matrix of X x Y pixels, where X is a number of columns (or vertical rows) of pixels and Y is a number of rows (or horizontal rows) of pixels.
• an imager comprising a matrix of pixels for capturing the infrared flux is used, with a bolometer per pixel in order to produce an infrared image of a scene, that is to say of a surface covered during the recording of an image and whose template results from the observation conditions and properties of the sensor used.
• a bolometer is a resistive sensor whose resistance varies with the temperature and therefore with the radiation flux coming from the scene. To read the value of the resistance of the bolometer which corresponds to an infra-red flow, it is possible, for example, to impose a voltage and to measure a current.
• a variation of the scene temperature for example of the order of 50 K, can in certain cases cause a variation in current, for example of the order of
• This DC component is detrimental to the signal-to-noise ratio and it is necessary to perform an operation which consists in eliminating or reducing this DC component.
• FIG. 1 A microelectronic device for electromagnetic radiation sensor according to the prior art, in which such an operation is performed, is given in FIG. 1. In this device, current is subtracted from
• a predetermined fixed value current Im for example a value close to the average value of the current of the sensor.
• This fixed value current comes from a fixed current source, which can be formed for example using a reference bolometer 1 insensitive or insensitive.
• the reference bolometers may be provided for example at the bottom of the column or at the head of a column of pixels. It is thus sought to obtain a current to be integrated as small as possible and which corresponds to the variations of the resistance of the sensitive bolometer under the effect of the electromagnetic radiation flux of the scene.
• the current I resulting from the difference between the current coming from the sensitive bolometer Idet and the current Im coming from the reference bolometer is converted into voltage by means of an integrator 3, which can be formed of an amplifier 4 and a capacitor of FIG. integration 5 of capacity Cint.
• the output of the converter is connected to means forming a reading circuit 8 of the bolometer.
• the implementation of sensors rendered insensitive poses congestion problems.
• the lack of uniformity of their characteristics can be problematic.
• the current Im may be different from one reference bolometer to another.
• the problem of finding a new detection device which does not have the disadvantages mentioned above.
• the invention firstly relates to a microelectronic device for measuring electromagnetic radiation comprising:
• At least one electromagnetic radiation detector such as a bolometer, designed to deliver a current as a function of the intensity of the detected radiation
• integrating means comprising means forming an integration capacitor, intended to produce, during a determined period of time, called “integration time" between an integration start instant and an integration end instant, a first integration capacitor, signal, of variable amplitude and frequency as a function of said current delivered by the detector, in the form of a series of pulses, means for controlling said first signal, intended to deliver a second signal, the control means comprising counting means provided for, counting or counting each pulse of said first detected signal during the integration time, and indicating an end of counting when a predetermined number N of pulses is reached, the control means being implemented for when the end of integration time is reached and a predetermined number N of pulses has been counted or counted by said counting means, deli to make a second amplitude signal, dependent on, or equal to, the amplitude of the first signal.
• control means may further comprise: means for detecting said pulses of said first signal.
• the device can be adapted for a case of operation in which the detector is under-illuminated.
• control means can be further implemented for: when the integration end time is reached and a number less than N pulses has been counted or counted by said counting means, outputting a second signal d amplitude equal to a first threshold potential.
• the device can be adapted for a case of operation in which the detector is over-illuminated.
• the control means can be further implemented for: when the integration end time is reached and the number N of pulses has been counted or counted by said counting means, to deliver a second signal of equal amplitude, in particular at a saturation potential reached by the first signal.
• the control means may further comprise: switching means implemented for, when a counting end is indicated by said counting means, switching between a first threshold voltage Vnoir, and the output of said integrating means delivering the first signal Sl .
• the control means may further comprise: reset means arranged for, during the integration time, consecutively to each pulse detected in the first signal and as long as the number N of detected pulses is not reached, apply a reset signal, at least one terminal of said integrating capacitor so as to vary the first signal opposite to said detected pulse.
• the reset means may be arranged to stop the application of the feedback signal when the number N of detected pulses is reached.
• the reset means may comprise means forming at least one switch, said switch being controlled by at least one start-of-count indication signal intended to reset a count made by the counting means, and at least one indication signal. end of counting generated by the counting means when the predetermined number N of pulses is reached.
• the reset means may comprise means forming at least a first pair of switches, and at least one second pair of switches, the first pair of switches, and the second pair of switches being controlled by the counting means.
• the first pair of switches may be provided for connecting a first terminal of the capacitor alternately to the output and to an inverting input of an amplifier, the second pair of switches being provided for connecting a second terminal of the capacitor, alternatively to the inverting input and the output of the amplifier.
• Said detector can belong to a matrix of detectors.
• several of said cells may be provided with a microelectronic device as defined above which is integrated with them.
• said integration capacitor can be formed by a transistor.
• FIG. 1 illustrates an example of a bolometer sensor according to the prior art
• FIG. 2 illustrates a first example of implementation of a device according to the invention belonging to a bolometer array sensor
• FIGS. 3A to 3C show signals implemented within the first example of a device described with reference to FIG. 2,
• FIG. 4 illustrates a second exemplary implementation of a device according to the invention belonging to a bolometer array sensor
• FIGS. 5A to 5C show signals implemented within the second exemplary device described. in connection with Figure 4,
• FIG. 6 illustrates a third example of implementation of a device according to the invention belonging to a bolometer array sensor
• FIGS. 7A to 7C represent signals implemented within the third example of a device described in connection with FIG. 6,
• FIG. 2 A first example of an imaging microelectronic device, in particular with bolometers, will now be given in conjunction with FIG. 2 (only a part of the imager, and in particular an elementary cell of the imager, being represented in FIG. 2) .
• This device is part of a matrix of X horizontal rows and Y vertical rows of elementary cells also called "pixels".
• the elementary cells each have at least one sensor comprising a bolometer-type electromagnetic radiation detector element.
• An elementary cell may include at least one bolometer detector in the form of a thermistor 102, i.e. a temperature-varying resistance.
• the thermistor may be associated at the output with a transistor 104 whose gate is biased at a potential Vgdt, in order to deliver a detection current.
• Switching means 106 controlled by an address alignment signal AdL, that is to say horizontal rows of the matrix, are in this embodiment, provided at the output of the detector so that it delivers the current detected at a column of the matrix, when the horizontal row of the matrix to which this detector belongs is selected.
• the switch means 106 may for example be in the form of a transistor, for connecting the bolometer to a read circuit or reading means for a capture time.
• a bias voltage applied across the bolometer 102 is constant during this capture.
• the current from the bolometer 102 is converted using integrator means 110, which output a signal which is called the first signal Si.
• the integrating means 110 may in this example comprise an amplifier 114.
• the amplifier 114 may be provided with a non-inverting input set to a bias potential Vcol, as well as an output and an inverting input connected to the amplifiers. terminals of means forming a capacitor 112 of integration, capacity Cint.
• the bias potential Vcol can be provided and set according to the range of incident electromagnetic energy to be detected.
• the potential Vcol can be chosen equal to or close to another Vseuil bias potential.
• An integration of the detected current is carried out for a duration called integration time Tint, between a so - called “start of integration” instant and a so - called “end of integration” instant end (Tint being fixed on the 3 examples of device operation given in connection with Figures 3A-3C, the scales are not necessarily identical between these 3 figures).
• the beginning of the integration can be determined by, and / or be consecutive to, a change of state of a signal called "reset" Sraz, while the end of the integration can be determined by and / or consecutive to, a change of state of a so-called “memorizing" signal Smem.
• the first signal Sl (represented in the timing diagrams of FIGS. 3A, 3B, 3C, respectively by signal curves SIa, SIb, Sic) resulting from the integration of the current from the detector, is in the form of a series of pulses (respectively PIa, PIb, PIc) whose duration and frequency depend in particular on the capacitance Cint chosen for the integration capacitor 112, and the intensity of the current from the bolometer 102, itself dependent on the energy electromagnetic incident on the bolometer 102.
• the first signal S1 is shown for different current values from the detector 102, and therefore for different incident electromagnetic energy on the bolometer 102.
• a first case of operation is given in FIG. 3A, whereas in FIGS.
• the first signal S1 is represented respectively for a second case, under-polarization or under-illumination of the detector 102, and for a third case, over-polarization or over-illumination of the detector 102.
• the number of pulses of the first signal Si is intended to be counted during the integration time Tint which is the same in the three operating cases.
• Control means 120 of the first signal S1 are arranged at the output of the integrator means 110, and are intended to deliver a second signal S2, in which a portion of useless information of the first signal has been suppressed.
• the control means 120 are arranged to implement a detection of the pulses of the first signal Si.
• the output of the integrator means 110 may be applied to the inverting input of a comparator 131, and is compared with a potential of V bias applied to the non-inverting input of the comparator 131.
• the result of the comparison between the first signal and V threshold is converted into a two-state signal.
• a monostable 133 at the output of the comparator 131 may be provided to obtain a signal in the form of calibrated pulses.
• Pulse detection is thus implemented in order to count or count these pulses.
• the two-state signal from the monostable can be delivered in particular to counting means 140 belonging to the control means 120.
• the counting means 140 may be used to count or count each new pulse detected in the first signal. If.
• the counting means 140 are also implemented to transmit an end indication signal counting, once a predetermined number N of pulses is reached and has been counted or counted.
• the number of pulses N that the counting means are intended to count or count down can be provided based on an evaluation of a mean value of the current from the detectors of the matrix.
• the counting means 140 may comprise, for example, at least one counter 145, for example a digital counter, which may be associated with means for indicating an end of counting, for example comprising a NAND logic gate 146, at the output of the counter 145.
• the end-of-count indication signal can be transmitted in particular to reset means 150, for example by means of a logic gate such as a NAND gate 152 connected to the output of the NAND gate 146 and the monostable 133 .
• the reset means 150 are in particular provided for, following a variation of the first signal S1 in the form of a pulse (P1a pulse of the first signal S1a in FIG. 3A), applying a feedback signal to the capacitor 112 so that to vary the first signal Si, in opposition to said variation (part P 'of the first signal SIa in FIG. 3A).
• a feedback signal is applied to the capacitor 112 so as to decrease the first signal Si.
• the feedback signal may be a feedback potential Vraz, applied via switch means 151.
• the reset means 150 allow, as soon as a pulse has been detected and counted, that the output of the integrator is reset to the potential Vraz. This results in this embodiment, by a voltage drop of the first signal (P 'portion of the signals SIa, SIb, Sic in Figures 3A, 3B, 3C).
• the repeated application of a feedback signal can be stopped as soon as the counting means 140 have reached the predetermined number N of pulses.
• the reset means 150 can thus be provided for, when they receive the end of count indication signal, stop the repeated opening and closing of the switch means 151.
• the switch means 151 can be controlled for example by a signal delivered by means 155 forming a NOR logic gate, an input of which is connected to the output of the counting means 140 and means 153 for applying a reset signal Sraz. Feedback to control the charges and discharges of the integration capacitor 112 is thus stopped as soon as the number N of pulses has been reached.
• This blocking of the feedback can be generated by means comprising for example a NOR gate 155, at the output of the counter 145 and the NAND gate 152.
• the control means 120 are provided to deliver the second signal S 2 .
• the second signal S2 is maintained at a first threshold voltage Vnoir as long as the counting performed by the counting means 140 has not reached the value N.
• the control means 120 produce a second signal S2 equal to the first threshold potential Vnoir.
• Switching means 161 are provided at the output of the control means 120 and are controlled by the end of count signal delivered by the counting means 140.
• the end of count signal delivered by the counting means 140 makes it possible to switch the means switches 161 so that when these means receive the end of counting signal, they connect the output of the control means 120 to the output of the integrator means 110, and deliver a second signal which is equal to the output of the integrator.
• the second signal S2 is sampled, using sampling means 170.
• the sampling means may comprise means forming a switch 171 controlled by a storage signal Smem, and which when the signal Smem changes state connects the output of the means of sampling. control 120 to a storage capacitor 172.
• the sampling means 170 may also comprise a follower 173, controlled by an AdC column addressing signal. Two limiting cases of operation of the device are given in conjunction with the timing diagrams of FIGS. 3B and 3C.
• FIG. 3B A limiting operating case, which is representative of under-illumination of the detector with respect to the detection range of the bolometer or of a sub-polarization of the detector 102, is given in FIG. 3B.
• the counting means 140 have not reached the counting value N, which keeps the output of the switching means 161 at the potential Vnoir (signal S2b remaining at Vnoir on the Figure 3C).
• FIG. 3C A second case, of over-illumination with respect to the detection range of the bolometer or of the over-polarization of the detector 102, is given in FIG. 3C.
• the integration time Tint has elapsed
• the counter 145 has reached the counting value N, which has blocked the feedback.
• Ways switch 151 of the reset means is then open, and the integration capacitor 112 continues charging and remains charged when its charge is complete.
• the output of the control means 120 is set to the output potential of the integrator means 110, which reaches a saturation potential Vsat.
• the beginning of the integration is triggered by a change of state of the reset signal Sraz.
• Each pulse produces a reset.
• the repeated feedback is stopped as soon as the counting means 140 have reached the counting value N, which is achieved by keeping the switch means 151 of the reset means 150 in the open state.
• the counting means 140 have the switching means 161 switch and are connected to the output of the integrator means 110.
• the integration capacitor 112 then continues its load.
• the Smem storage signal changes state, so that sampling at the output of the control means is carried out.
• the amplitude A of the second signal S2, which is dependent on that of the first signal Si, is then stored via, for example, capacitor 172.
• the amplitude A of the second signal S2 then follows the following relation:
• Idet * Tint ((N-I) * ⁇ V + A) * Cint, with Idet the current coming from the detector and ⁇ V the amplitude of the pulses detected.
• FIG. 4 A second example of an imaging microelectronic device, in particular with bolometers, is shown in FIG. 4 (only a part of the imager, and in particular an elementary cell of
• This example of a device differs from the previous one, in particular by the integrator means 210, this time with an integration capacitor 212, the terminals of which are capable of being connected alternately to the inverting input or to the output of an amplifier. 114 via switches 213a, 213b, 215a, 215b.
• the non-inverting input of the amplifier 114 may be set to a potential Vcol, between a potential Vthreshold and a potential Vnoir.
• control means 220 are provided, to implement a pulse detection in the first signal, for example using a comparator 131 for comparing the output of the integrating means to a potential Vseuil.
• the control means 220 comprise in this example, a NAND gate 234 at the output of the comparator 131, which, associated with the NAND gate 146 located at the output of the counter, makes it possible to lock the count once the number N of pulses is reached.
• the NAND gate 234 may have an input connected to the output of the NAND gate 146 end of counting, while its other input is connected to the output of the monostable 233.
• the control means 220 differ from that described above in connection with FIG. 2, also by the reset means 250.
• the reset means 250 are provided for, as a result of a variation of the first signal S1 in the form of a pulse, varying the signal S1 (the first signal being represented by the curves S '1a, S' 1b, S Ic, in Figs. 5A, 5B, 5C), applying a feedback signal to the capacitor 212 so as to vary the first signal Si, in opposition to said variation.
• the reset means 250 further comprise a switch 251 and means 253 for applying a reset signal Sraz, the means 253 forming for example an external connection on which the reset signal is applied, such as a signal resetting timer, enabling resetting of the counting means 240.
• the switch means 251 can be controlled for example by a signal delivered by the output of the counting means 240 and means 253 for applying a reset signal Sraz.
• a signal Scint across the integration capacitor is also shown in the figures
• a feedback signal is applied to the capacitor 212 so as to decrease the signal Scint.
• the signal at the terminals of the capacitor is no longer in this example, sudden discontinuity as in the first embodiment, which brings improvements especially in terms of noise generated during integration.
• the counting means 240 for example by the least significant bit of the counter 145, for example a digital counter.
• a first pair of switches 213a, 215a is provided for connecting a first terminal of the integration capacitor 212 alternately, at the output, or at the an inverting input of the amplifier 114, while the second pair of switches 215a, 215b is provided for connecting a second terminal of the integration capacitor 212, alternatively to the inverting input, or to the output of the amplifier 114.
• the first pair of switches 213a, 213b is provided to connect to the inverting input of the amplifier 114 alternately , a first terminal or a second terminal of the integration capacitor 212, while the second pair of switches 215a, 215b is provided for connecting the output of the amplifier 114 alternately, to the first terminal or the second terminal of the capacitor of integration 212.
• the open or closed state of the switches 213a, 213b, 215a, 215b is modified.
• the repeated control of the opening or closing of the switches 213a, 213b, 215a, 215b can be stopped as soon as the counting means have reached the predetermined number N of pulses.
• the feedback to control the charges and discharges of the integration capacitor 212 is thus stopped as soon as the number N of pulses has been reached.
• FIG. 5B A limiting case, representative of a sub-illumination of the detector with respect to the detection range of the bolometer or a sub-polarization of the detector, is given in FIG. 5B.
• FIG. 5C Another limiting case, of over-illumination with respect to the detection range of the bolometer or polarization of the detector, is given in FIG. 5C.
• the beginning of the integration is triggered by a change of state of the reset signal Sraz.
• the repeated feedback is stopped when the counting means have reached the counting value N.
• the switching means 161 switch and are connected to the output of the integrator means 210.
• the integration capacitor 212 continues charging.
• the integration time Tint is fixed and therefore the same for the 3 examples of operation of the device given in connection with FIGS. 5A-5C, the scales being not necessarily identical between these 3 figures
• the second signal S2 is sampled, using sampling means 170.
• the amplitude A 'of the second signal S2 follows the following relation:
• Idet * Tint ((NI) * 2 ⁇ V + A ') * Cint, with Idet the current coming from the detector and ⁇ V the amplitude of the pulses detected.
• a detection of the state of the output of the stage 220 when the integration time Tint has elapsed, in order to detect a possible over-polarization or sub-polarization of the detector 102 and adjust the polarization state of the detector 102, depending on this detection, can be implemented.
• FIG. 6 A third example of an imaging microelectronic device, in particular with bolometers, is shown in FIG. 6 (only a part of the imager, and in particular an elementary cell of the imager, being represented in this figure).
• the matrix is formed of elementary cells each comprising a bolometer 302, integrator means 310 of the current coming from the bolometer 302, and control means 320 which can be of the type of the control means 120 described previously in connection with FIG. Figure 2.
• the integrating means 310 comprise an integration capacitor in the form of a transistor 312, for example of the MOS type, whose gate is connected to an input of the control means 320, and whose source and drain are put at the same bias potential, for example to the electrical ground.
• the gate potential of the transistor 312 corresponds to the first signal S1 controlled by the control means 320.
• control means 320 are provided, as in the previous examples, means for detecting the pulses of the first signal Si comprising for example a comparator 331, means for producing calibrated pulses comprising a monostable 333.
• the control means 320 also comprise counting means 340 provided for example with at least one counter 345 associated with means forming one or more logic gates 346, 352.
• the control means 320 also include reset means 350 having for example a switch 351 capable of applying a potential Vraz to the gate of the transistor 312, following a detection of a pulse of the first signal S1.
• the reinitialization carried out in this example can thus be similar to that implemented in the first example given with reference to FIG. 2.
• an integration can be triggered by a change of state of a Sraz reset signal. applied to the reset means 350 or generated by the reset means 350.
• the sampling trigger Smem signal changes state.
• the switching means 361 at the output of the control means 320 delivers a second signal, of which the amplitude depends on that of the first signal Si, and may in this example be equal to the first signal S1.
• the counting means 340 when the integration time Tint has elapsed, the counting means 340 have not reached the counting value N, which maintains the output of the switching means 361 to the potential Vraz (signal curve s "). 2b remaining at Vraz in Figure 7B).
• FIG. 7C A second case, of over-illumination with respect to the detection range of the bolometer or an over-polarization of the detector, is given in FIG. 7C.
• the integration time Tint has elapsed
• the counter 345 has reached the counting value N, which has blocked the feedback.
• the switch 351 of the reset means is then open, and the integration capacitor 312 continues charging and remains charged when its load is complete.
• the output of the control means 320 is at the output potential of the integrator 310.
• a case of operation of the detector, when it is normally lit, is given in connection with FIG. 7A.
• the beginning of the integration is triggered by a change of state of the reset signal Sraz. Then, a count or a count of the pulses of the first signal Si is performed. Each pulse is followed by a feedback resulting in an opposite variation of the first signal.
• the repeated feedback is stopped when the counting means 340 have reached the counting value N, which is achieved by keeping the switch means 351 of the reset means 350 in the open state.
• the switching means 361 switch and are connected to the output of the integrator 310.
• the integration capacitor 312 then continues charging.
• the monostable 333 may be associated with pulse count locking means when a number of pulses N has been counted.
• the storage signal Smem changes state, so that sampling at the output of the control means is carried out.
• the amplitude of the second signal S2, which is dependent on that of the first signal Si, is then stored via, for example, a capacitor 372.
• Multiplexer means 380 may be provided at the output of the sampling means.

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