EP2321848A4 - Dispositif d'assemblage de tête d'impression multi-puce - Google Patents

Dispositif d'assemblage de tête d'impression multi-puce

Info

Publication number
EP2321848A4
EP2321848A4 EP08782947A EP08782947A EP2321848A4 EP 2321848 A4 EP2321848 A4 EP 2321848A4 EP 08782947 A EP08782947 A EP 08782947A EP 08782947 A EP08782947 A EP 08782947A EP 2321848 A4 EP2321848 A4 EP 2321848A4
Authority
EP
European Patent Office
Prior art keywords
assembler
printhead
chip printhead
chip
printhead assembler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08782947A
Other languages
German (de)
English (en)
Other versions
EP2321848A1 (fr
Inventor
David Oliver Burke
Jan Waszczuk
Desmond Bruce Boyton
Craig Donald Strudwicke
Peter John Morley Sobey
William Granger
Jason Mark Thelander
Eric Patrick O'donnell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zamtec Ltd
Original Assignee
Silverbrook Research Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silverbrook Research Pty Ltd filed Critical Silverbrook Research Pty Ltd
Publication of EP2321848A1 publication Critical patent/EP2321848A1/fr
Publication of EP2321848A4 publication Critical patent/EP2321848A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/02—Feeding of components
    • H05K13/021—Loading or unloading of containers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01075—Rhenium [Re]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
EP08782947A 2008-08-19 2008-08-19 Dispositif d'assemblage de tête d'impression multi-puce Withdrawn EP2321848A4 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/AU2008/001199 WO2010019985A1 (fr) 2008-08-19 2008-08-19 Dispositif d'assemblage de tête d'impression multi-puce

Publications (2)

Publication Number Publication Date
EP2321848A1 EP2321848A1 (fr) 2011-05-18
EP2321848A4 true EP2321848A4 (fr) 2012-11-07

Family

ID=41706750

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08782947A Withdrawn EP2321848A4 (fr) 2008-08-19 2008-08-19 Dispositif d'assemblage de tête d'impression multi-puce

Country Status (3)

Country Link
EP (1) EP2321848A4 (fr)
KR (1) KR101178010B1 (fr)
WO (1) WO2010019985A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013101693B9 (de) 2013-02-20 2015-11-12 Notion Systems GmbH Oberflächenbearbeitungsvorrichtung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6086641A (en) * 1996-02-20 2000-07-11 Nec Corporation Die bonder for a semiconductor producing apparatus
US20050088666A1 (en) * 2003-10-24 2005-04-28 Matsushita Electric Industrial Co., Ltd. Electronic component mounting apparatus and electronic component mounting method
KR20070037824A (ko) * 2005-10-04 2007-04-09 삼성전자주식회사 Ｂｏｃ형 반도체 패키지 제조용 다이 본딩 장치 및 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06268050A (ja) * 1993-03-15 1994-09-22 Matsushita Electron Corp ダイスボンディング装置
JP3027911B2 (ja) * 1995-01-19 2000-04-04 松下電器産業株式会社 ダイボンディング装置
JP3511841B2 (ja) * 1997-03-27 2004-03-29 松下電器産業株式会社 チップの供給装置
US5924833A (en) * 1997-06-19 1999-07-20 Advanced Micro Devices, Inc. Automated wafer transfer system
JP3304295B2 (ja) * 1997-11-17 2002-07-22 エヌイーシーマシナリー株式会社 ダイボンダ
US6435330B1 (en) * 1998-12-18 2002-08-20 Asyai Technologies, Inc. In/out load port transfer mechanism
JP4334892B2 (ja) * 2003-03-20 2009-09-30 パナソニック株式会社 部品実装方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6086641A (en) * 1996-02-20 2000-07-11 Nec Corporation Die bonder for a semiconductor producing apparatus
US20050088666A1 (en) * 2003-10-24 2005-04-28 Matsushita Electric Industrial Co., Ltd. Electronic component mounting apparatus and electronic component mounting method
KR20070037824A (ko) * 2005-10-04 2007-04-09 삼성전자주식회사 Ｂｏｃ형 반도체 패키지 제조용 다이 본딩 장치 및 방법

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2010019985A1 *

Also Published As

Publication number Publication date
KR20110036038A (ko) 2011-04-06
KR101178010B1 (ko) 2012-08-28
EP2321848A1 (fr) 2011-05-18
WO2010019985A1 (fr) 2010-02-25

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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17P Request for examination filed

Effective date: 20110316

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA MK RS

DAX Request for extension of the european patent (deleted)
A4 Supplementary search report drawn up and despatched

Effective date: 20121008

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 21/67 20060101AFI20121001BHEP

Ipc: H05K 13/04 20060101ALI20121001BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN WITHDRAWN

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: ZAMTEC LIMITED

18W Application withdrawn

Effective date: 20130416