EP2256913B1 - Contrôleur pour alimentation électrique de commutation - Google Patents

Contrôleur pour alimentation électrique de commutation Download PDF

Info

Publication number
EP2256913B1
EP2256913B1 EP10250990.8A EP10250990A EP2256913B1 EP 2256913 B1 EP2256913 B1 EP 2256913B1 EP 10250990 A EP10250990 A EP 10250990A EP 2256913 B1 EP2256913 B1 EP 2256913B1
Authority
EP
European Patent Office
Prior art keywords
circuit
voltage
power supply
primary
threshold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP10250990.8A
Other languages
German (de)
English (en)
Other versions
EP2256913A1 (fr
Inventor
Huanyu Lu
En Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Monolithic Power Systems Inc
Original Assignee
Monolithic Power Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Monolithic Power Systems Inc filed Critical Monolithic Power Systems Inc
Publication of EP2256913A1 publication Critical patent/EP2256913A1/fr
Application granted granted Critical
Publication of EP2256913B1 publication Critical patent/EP2256913B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0016—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters
    • H02M1/0022—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters the disturbance parameters being input voltage fluctuations

Definitions

  • This relates to electric switching power supplies.
  • a switching power supply generates electric output current to power a load.
  • One such power supply includes a transformer and a chopper.
  • the chopper chops the primary current conducted through the transformer's primary winding. This induces the output current to flow through the transformer's secondary winding to the load to power the load.
  • US patent number 5,959,851 discloses a controller for a switch mode power supply that includes an undervoltage protection circuit responsive to an input supply voltage indicative signal.
  • the invention provides a switching power supply as set out in claim 1.
  • a switching power supply preferably has an inductor that includes a coil.
  • a chopper circuit preferably chops the primary current drawn through the coil, for the inductor to preferably output an induced current.
  • a multifunction junction of the power supply preferably has a multifunction voltage that is a function of a primary voltage that drives the coil.
  • a first circuit preferably suspends the chopping in response to a first sensed voltage crossing a first threshold, the first sensed voltage preferably being a function of the multifunction voltage.
  • a second circuit preferably suspends the chopping in response to a second sensed voltage crossing a second threshold, the second threshold preferably being a function of the multifunction voltage.
  • the first circuit may be an overvoltage protection circuit that suspends the chopping in response to the primary voltage exceeding an overvoltage threshold that is related to the first threshold.
  • the first circuit may be an undervoltage protection circuit that suspends the chopping in response to the primary voltage dropping below an undervoltage threshold related to the first threshold.
  • a shutoff circuit is preferably configured to offset the multifunction voltage sufficiently for the multifunction voltage to cross the first threshold to cause the first circuit to suspend the chopping.
  • the second circuit may be a burst mode circuit that suspends the chopping when the power supply's output current, flowing through a load, exceeds a current threshold that is a function of the multifunction voltage.
  • the apparatus shown in Figs. 1A-1B has parts that may be examples of the elements recited in the claims.
  • the apparatus is a switching power supply 10. It includes a primary rectifier/filter circuit 11 that rectifies and filters an AC current, from AC source 14. It yields a DC primary current I prim at a primary supply voltage V prim to drive a primary winding W1 (or "coil") of a transformer 20.
  • a controller 26 chops the current I prim conducted through primary winding W1.
  • the resulting varying current I prim conducted through the primary winding W1 induces secondary and tertiary currents I sec and I tert to flow through the transformer's secondary and tertiary windings W2, W3.
  • the induced secondary current I sec powers a load R load
  • the tertiary current I tert powers the controller 26.
  • the controller 26 has a multifunction junction 30.
  • the voltage V mult applied to this junction 30 affects operating parameters of six different functions of the controller 26. These functions are duty cycle control, primary-current limiting, overvoltage protection, undervoltage protection, burst mode and external shutoff, as explained below.
  • the primary rectifier/filter circuit 11 includes a full wave rectifier comprising four diodes D1, D2, D3 and D4 to full-wave rectify the AC current. This circuit 11 further includes a reservoir capacitor C1 to filter and smooth the primary voltage V prim that drives the primary winding W1.
  • a secondary rectifier/filter circuit 32 includes a diode D5 to half-wave rectify the output V sec of the transformer's secondary winding W2 to yield the output voltage V out applied to the load R load , and a reservoir capacitor C2 to filter and smooth V out .
  • a tertiary rectifier/filter circuit 33 includes a diode D6 to half-wave rectify the output V tert of the transformer's tertiary winding W3 to yield the supply voltage V cc that powers all components of the controller 26, and a reservoir capacitor C3 to filter and smooth V cc .
  • the controller 26 has a ground rail Gnd1 that is isolated from a ground rail Gnd2 of the power supply output. For that reason, the respective ground rails are denoted with different ground symbols 41, 42.
  • a section of the controller 26 is fabricated as an integrated circuit chip, with its components encapsulated in a single package 51.
  • the chip package 51 has pins for interfacing with components of the supply 10 that are external to the package. These include a controller supply pin 53 tied to V cc , a controller ground pin 54 connected to controller ground Gnd1, a drain pin 55 connected to the primary winding W1, a multifunction pin 56, and a feedback pin 57.
  • the multifunction pin 56 taps into a resister divider 60 extending from V prim to Gnd1.
  • the resister divider 64 has an upper resister R1 and a lower resistor R2. Therefore, the voltage V mult at the multifunction pin equals V prim R2/(R1+R2). This renders V mult positively related to ( i.e., a function of), and more specifically proportional to, V prim and adjustable by adjusting R1 and/or R2.
  • a feedback circuit 70 outputs, to the feedback pin 57, a feedback voltage V fb which is related to the load current I load .
  • the feedback section includes an optocoupler 62, which has an LED connected through a resistor R 3 and a Zener diode Dz to Gnd1.
  • V out is sufficiently higher than the Zener diode's breakdown voltage
  • the light intensity of the LED is positively related to V out . Therefore, as load current I load decreases, V out increases, which increases the LED's light intensity.
  • V fb is positively related to the output voltage V out applied to the load R load , and inversely related to the load current I load drawn by the load.
  • a transistor in this example field effect transistor (FET) has a source junction S connected to the chip's ground pin 54, a drain junction D connected to the chip's drain pin 55, and a gate junction G. Pulling the gate G high turns on the FET to sink primary current I prim through the primary winding W1 to controller ground Gnd1. This primary current I prim is driven electromotively - as opposed to inductively - in that it is generated by applying a potential difference across the coil W1. Pulling the FET gate G low turns off the FET to stop the primary coil current I prim from flowing through the FET. This is in contrast to the secondary and tertiary currents I sec and I tert , which are inductively - as opposed to electromotively - generated.
  • the FET's gate G is connected to the output of a first AND gate A1 that has four inputs 74. One of these inputs is driven by a secondary AND gate A2 with two inputs 75. The FET conducts only when all inputs 74, 75 of AND gates A1 and A2 are high. Pulling any of the AND gate inputs 74, 75 low turns off the FET.
  • the AND gate inputs 74, 75 can be pulled down by any of the six circuits -- specifically a chopper circuit 81, a primary-coil current-limiting circuit 82, an overvoltage protection circuit 83, an undervoltage protection 84, a burst mode circuit 85 and a remote shutoff circuit 86, which are described below.
  • a switch-controller circuit 90 is configured to output a switch-controller output 91 to switches S1, S2 and S3.
  • the switch-control signal is high if the FET is being turned off by either the chopper circuit 81 or the burst mode circuit 85 or both.
  • This is achieved by an OR gate O1 with two OR inputs 94, 95.
  • One OR input 94 is driven, through an inverter Inv1, by the burst mode circuit 85.
  • the other OR input 95 is driven by a third AND gate A3 with one AND input 96 connected through an inverter Inv2 to the chopper circuit 81.
  • the third AND gate A3 further has two other inputs 98 connected to the outputs of the overvoltage circuit 83 and the undervoltage circuit 84. Switches S1 and S2 are closed by the switch controller output 91 going high. In contrast, switch S3 is opened by the switch controller output 91 going high.
  • the chopper circuit 81 limits the maximum allowed duty cycle.
  • the chopper circuit 81 includes a chopper comparator CR1 and a sawtooth generator Osc1 with a sawtooth wave output 104.
  • the comparator CR1 has a positive input connected to the sawtooth wave output 104, and a negative input connected through switch S3 to the multifunction pin 56.
  • the output of the comparator CR1 goes low, causing the output of the second AND gate A2 to go low, which causes the first AND gate A1 to pull the FET gate G low, which turns off the FET.
  • Fig. 2 illustrates the effect V mult has on the output signal 110 of the chopper circuit comparator CR1. It shows that raising V mult from a lower level 112 to a higher level 114 decreases the time the comparator output 110 is high 116 and increases the time it is low 118. This decreases the FET's on time 112 and increases the off time 114. Accordingly, the chopper's maximum allowed duty cycle is inversely related to V mult . Since, as shown in Figs. 1A-1B , V mult is itself related to V prim , R1 and R2, the duty cycle varies with V prim , and can be adjusted by adjusting R1 and R2. However, the chopping frequency equals the frequency of the sawtooth wave and is independent of V mult .
  • the chopping of the primary coil current I prim by the chopper circuit 81 is effectively suspended by any one of the AND gate inputs being pulled low by any one of the primary-current limiting circuit 82, the overvoltage protection circuit 83, the undervoltage protection circuit 84, the burst mode circuit 85 and the remote shutoff circuit 86.
  • the primary-current limiting circuit 82 in Figs. 1A-1B turns off the FET when the current I prim through the primary coil W1 exceeds a primary current threshold and keeps the FET off, even after I prim has dropped below the current threshold, until the next rise of the sawtooth wave.
  • the current threshold is inversely related to the multifunction voltage V mult .
  • the primary-current limiting circuit 82 utilizes a square wave 120.
  • This wave 120 is generated by comparing the feedback voltage V fb to the sawtooth wave 104, similar to how the output 110 is generated by comparing V mult to the sawtooth wave 104.
  • This square wave 120 is output to a Set input S of a flip-flop 122.
  • the Reset pin R of the flip-flop 122 is connected to the output of an overcurrent comparator CR2.
  • This comparator's positive input is connected to V DD through a leading edge blanking circuit LEB that blanks out induction spikes when the FET turns off.
  • circuit 81 This enables circuit 81 to control the FET.
  • the FET on/off is controlled by the flip-flop output Q.
  • V fb is compared to the sawtooth wave 104 to generate the square wave 120.
  • the square wave 120 is high, meaning the flip-flop's Set input is high, the FET is turned on, and the primary current I prim rises.
  • circuit 82 outputs a high signal to the flip-flop's Reset input to turn off the FET.
  • the negative input of comparator CR2 is connected to a drain threshold voltage V dmth that is output by a threshold voltage generator 130.
  • V DD exceeds V dmth
  • the comparator CR2 drives the flip-flop Reset input R high, which drives the output of AND gate A2 low, which drives the output of AND gate A1 low, which turns off the FET.
  • this circuit 82 effectively suspends the chopping of the primary coil current I prim after I prim exceeds a primary current threshold that inversely varies with V prim and can be adjusted by adjusting R1 and/or R2.
  • the actual current limit ramps to a higher level above the intrinsic current limit level than at low DC input voltages.
  • P o L prim I p 2 /2
  • L prim is the primary coil's inductance
  • I p is the peak current limit over a range of input line voltages.
  • V mult can be employed to adjust the constant maximum output power over the entire range of the input line voltages.
  • V prim The higher the input voltage V prim , the smaller is (V ref1 /R5-V mult /R7)xR6 and the bigger is ⁇ TV prim /L prim . But the true peak current limit (V ref1 /R5-V mutl /R7)xR6+ ⁇ TV prim /L prim stays constant over the entire input line voltage.
  • the overvoltage protection circuit 83 turns off the FET when the primary voltage V prim driving the primary coil W1 exceeds an overvoltage threshold.
  • This circuit 83 includes an overvoltage comparator CR3 that has a positive input connected to an overvoltage threshold reference V ref2 and a negative input connected through switch S3 to the multifunction voltage V mult .
  • V mult exceeds V ref2
  • the output of the overvoltage comparator CR3 goes low to turn off the FET.
  • V mult is related to (a function of) V prim
  • V mult V prim R2/(R1+R2)
  • the effective overvoltage threshold equals V ref2 (R1+R2)/R2. Therefore, the effective overvoltage threshold can be adjusted by adjusting R1 and/or R2.
  • the undervoltage protection circuit 84 turns off the FET when the primary voltage V prim driving the primary coil W1 is below an undervoltage threshold.
  • This circuit 84 includes an undervoltage comparator CR4 that has a negative input connected to an undervoltage threshold V ref3 and a positive input connected through the third switch S3 to the multifunction voltage V mult . Accordingly, when V mult is below V ref3 , the undervoltage comparator's output will go low to turn off the FET. This effectively suspends the chopping as long as V mult is below V ref3 .
  • Hysteresis can be imparted to the outputs of the overvoltage and undervoltage comparators CR3, CR4 by adding an input resistor (not shown) to each positive input and a feedback resistor (not shown), of much higher resistance than the input resistor, between the respective comparator's positive input and its output.
  • This resistor configuration slightly raises the comparator's positive input when the comparator output is high, and slightly lowers comparator's positive input when the comparator output is low to add hysteresis.
  • the burst mode circuit 85 turns off the FET when Vfb, which is related to output voltage V out , exceeds a threshold voltage. This occurs when the output current I load drawn by the load R load drops below a threshold current. This increases efficiency of the power supply 10 by increasing the length of time the FET is off and effectively suspending the chopping during time periods when the secondary reservoir capacitor C2 does not need to be replenished.
  • the burst mode circuit 85 includes a burst mode comparator CR5.
  • This comparator CR5 has a negative input connected to V fb at the feedback pin 57. It further has a positive input connected through switches S1 and S2 to both V mult and a constant current source 140 (such as IC chip PSSI2021 SAY by NXP Semiconductors).
  • the current source 140 conducts a fixed current I ref from V cc to the positive input of the comparator CR5 and through resistor R2 to Gnd1.
  • the burst mode circuit 85 suspends the chopping when V fb exceeds V prim R2/(R1+R2) + I ref R2. This coincides with the output current I load dropping below an output current threshold. That is because V fb is inversely related to I load .
  • the burst mode entering point is positively related to both V mult , which equals V prim R2/(R1+R2), and I ref R2. Accordingly, the output voltage threshold and the output current threshold can be adjusted by adjusting R1 and/or R2.
  • the remote shutoff circuit 86 includes a transistor Tr2 connecting the multifunction pin 56 to Gnd1. It enables shutting off the chopping with a switch S4 that can be external to the chip housing 52, to the controller 26 and to the power supply 10.
  • the switch S4 in this example is a manually-controlled mechanical switch, but can alternatively be an electronically-controlled switch.
  • the switch S4 When the switch S4 is closed, it connects the gate of the transistor Tr2 to Vcc, which causes the transistor Tr2 to sink V mult to Gnd1, which offsets V mult to a level below the undervoltage threshold V ref3 . This causes the undervoltage circuit 84 to turn off the FET. This effectively suspends the chopping as long as the external switch S4 is activated.
  • a biasing resister R9 pulls the gate of transistor Tr low to turn off the transistor Tr and restart the chopping.
  • the overvoltage, undervoltage and external shutoff circuits 83, 84 and 86 share a common feature, of suspending the chopping based on comparing V mult to a reference. This is contrary to the chopper, primary-current limiting and burst mode circuits 81, 82 and 85, in which V mult is the reference to which other sensed voltages are compared.
  • the example power supply of Figs. 1A-1B is an "isolated" type power supply, in which the inductor is a transformer with a primary coil W1 electrically isolated from the secondary coils W2, W3.
  • the controller 26 chops the current flowing through the primary coil W1 to generate output current through the secondary coils W2, W3 by means of mutual induction between the primary winding W1 and secondary coils W2, W3.
  • FIG. 3A-3B Another type of power supply 210 is shown in Figs. 3A-3B , in which components are labeled with the same reference numerals as corresponding components in Figs. 1A-1B .
  • It is a "non-isolated", more particularly "boost", type power supply in which the inductor includes only a single coil W4.
  • the controller chops primary current through the coil W4 to inductively generate an induced current through the same coil W4 by self-induction.
  • the functions of the controller 26 for this non-isolated power supply 10' are the same as for the "isolated" supply of Figs. 1A-1B .

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Control Of Electrical Variables (AREA)

Claims (15)

  1. Alimentation électrique de commutation (10, 210) comprenant :
    un inducteur (20) comprenant une bobine,
    circuit à découpage (81) configuré pour découper un courant primaire tiré à travers la bobine, pour l'inducteur pour émettre un courent induit,
    une jonction multifonction (30) ayant une tension multifonction qui est fonction d'une tension primaire qui commande la bobine,
    un premier circuit (83, 84) configuré pour suspendre le découpage en réponse à une première tension captée dépassant un premier seuil, la première tension captée étant fonction de la tension multifonction,
    caractérisée en ce que
    un second circuit (85, 82) est configuré pour suspendre le découpage en réponse à une seconde tension captée dépassant un second seuil, le second seuil étant fonction de la tension multifonction.
  2. Alimentation électrique selon la revendication 1, caractérisée en ce que le premier circuit est un circuit de protection (83) contre les surtensions qui suspend le découpage en réponse à la tension primaire dépassant un seuil de surtension en rapport avec le premier seuil.
  3. Alimentation électrique selon la revendication 1, caractérisée en ce que le premier circuit est un circuit de protection (84) contre les sous-tensions qui suspend le découpage en réponse à la tension primaire passant en-dessous d'un seuil de sous-tension en rapport avec le premier seuil.
  4. Alimentation électrique selon la revendication 3, comprenant en outre un circuit de disjonction (86) configuré pour décaler la tension multifonction au-delà du premier seuil pour faire le premier circuit suspendre le découpage.
  5. Alimentation électrique selon la revendication 4, caractérisée en ce que le circuit extérieur de disjonction est commandé par un commutateur (S4) qui est externe à l'alimentation électrique.
  6. Alimentation électrique selon la revendication 1, caractérisée en ce que le second circuit est un circuit (85) en mode rafale qui suspend le découpage lorsque le courant de sortie de l'alimentation électrique, passant par une charge, dépasse un seuil de courant qui est fonction de la tension multifonction.
  7. Alimentation électrique selon la revendication 1, caractérisée en ce que le second circuit est un circuit (85) en mode rafale qui suspend le découpage lorsque le courant de sortie de l'alimentation électrique, commandant une charge, dépasse un seuil de tension qui est fonction du second seuil qui est lui-même fonction de la tension multifonction.
  8. Alimentation électrique selon la revendication 1, caractérisée en ce que le second circuit est un circuit (82) limitant un courant primaire, et en ce que la seconde tension captée est fonction du courant primaire tiré à travers la bobine, ce par quoi le second circuit suspend le découpage en réponse au courant primaire dépassant un seuil de courant primaire qui est en rapport avec la tension multifonction.
  9. Alimentation électrique selon la revendication 8, caractérisée en ce que le second circuit (82), lorsqu'il suspend le découpage, continue à suspendre le découpage, même lorsque le courant primaire est passé en-dessous du seuil de courant primaire, jusqu'au début du prochain cycle d'horloge.
  10. Alimentation électrique selon la revendication 8, caractérisée en ce que la seconde tension captée est dérivée d'une tension primaire à la jonction entre le circuit de découpage et la bobine.
  11. Alimentation électrique selon la revendication 8, caractérisée en ce que le seuil de courant primaire est en rapport inverse avec la tension multifonction qui est elle-même en rapport positif avec une tension primaire à la jonction entre le circuit de découpage et la bobine.
  12. Alimentation électrique selon la revendication 1, caractérisée en ce que le circuit de découpage (81) est configuré pour découper le courant primaire avec un rapport cyclique qui est fonction de la tension multifonction,
    le circuit de découpage, selon une option, lorsqu'il découpe le courant primaire en laissant passer et bloquer de manière répétitive, le courant primaire, déterminant quand laisser passer et quand bloquer, sur la base d'une comparaison de la sortie d'une forme d'onde avec un seuil de forme d'onde qui est fonction de la tension multifonction.
  13. Alimentation électrique selon la revendication 1, caractérisée en ce que la tension multifonction est prise à un diviseur de résistances (60) s'étendant à partir d'une tension supérieure vers une tension inférieure,
    la tension supérieure étant, selon une option, une tension primaire qui alimente la bobine et la tension inférieure provient d'un rail de terre auquel le découpeur descend le courant primaire.
  14. Alimentation électrique selon la revendication 1, comprenant en outre des commutateurs (S1, S2, S3) et un circuit de commande de commutateurs (90) qui sont configurés ensemble dans une première situation pour connecter la jonction multifonction au premier circuit tout en isolant la jonction multifonction du second circuit et dans une seconde situation pour connecter la jonction multifonction au second circuit tout en isolant la jonction multifonction du premier circuit,
    où, selon une option, le premier circuit est un circuit de protection (83) contre une surtension, le second circuit est un circuit (85) en mode rafale, et la seconde situation est fondée sur le courant primaire interrompu par le circuit en mode rafale.
  15. Alimentation électrique selon la revendication 1, caractérisée en ce que l'inducteur est un transformateur (20), la bobine est un premier enroulement du transformateur (W1, W4) et le courant induit est émis par un second enroulement (W2) du transformateur par une induction réciproque entre les enroulements primaire et secondaire, et/ou le courant induit est émis par l'enroulement (W4) lui-même par l'inductance propre.
EP10250990.8A 2009-05-31 2010-05-27 Contrôleur pour alimentation électrique de commutation Active EP2256913B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910059455XA CN101594064B (zh) 2009-05-31 2009-05-31 一种开关电源控制器

Publications (2)

Publication Number Publication Date
EP2256913A1 EP2256913A1 (fr) 2010-12-01
EP2256913B1 true EP2256913B1 (fr) 2016-07-06

Family

ID=41408565

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10250990.8A Active EP2256913B1 (fr) 2009-05-31 2010-05-27 Contrôleur pour alimentation électrique de commutation

Country Status (3)

Country Link
US (1) US8315072B2 (fr)
EP (1) EP2256913B1 (fr)
CN (1) CN101594064B (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101867168B (zh) * 2010-05-21 2014-04-02 海洋王照明科技股份有限公司 一种电源保护电路及led灯具
CN101882864B (zh) * 2010-06-25 2012-08-22 矽力杰半导体技术(杭州)有限公司 一种上电启动电路及其上电启动方法
CN102005942B (zh) * 2010-11-05 2012-10-10 烟台东方威思顿电气有限公司 一种从高压电力线路中获取低压电源的方法
CN102035366B (zh) * 2010-12-30 2013-04-03 Bcd半导体制造有限公司 一种供电装置
CN102883513B (zh) * 2011-07-11 2016-06-22 奥斯兰姆有限公司 电子镇流器保护电路和电子镇流器
TW201316658A (zh) * 2011-10-14 2013-04-16 Infinno Technology Corp 電源供應器之控制電路
TWI465015B (zh) * 2012-12-05 2014-12-11 Richtek Technology Corp 電壓轉換電路以及電壓轉換控制器
US9112418B2 (en) * 2013-12-02 2015-08-18 Grenergy Opto Inc. Controller for a switched mode power supply having an integrated circuit with multifunction pin
TWI514729B (zh) * 2014-01-23 2015-12-21 Leadtrend Tech Corp 應用於電源轉換器的控制電路及其操作方法
TWI514741B (zh) * 2014-01-27 2015-12-21 Leadtrend Tech Corp 可提供可程式化之停滯時間的同步整流控制方法以及同步整流控制器
CN103986320B (zh) * 2014-05-26 2017-06-23 广州金升阳科技有限公司 一种开关电源遥控电路
CN105576945B (zh) * 2014-10-11 2018-11-16 台达电子工业股份有限公司 隔离电源控制装置、电源变换装置及其隔离电源控制方法
CN105896989A (zh) * 2016-04-08 2016-08-24 昂宝电子（上海）有限公司 反激式电源系统
CN106357111A (zh) * 2016-09-28 2017-01-25 北京新能源汽车股份有限公司 一种车载dc/dc输出电压的反馈电路及电动汽车
CN108521115B (zh) * 2018-03-14 2019-10-29 苏州博创集成电路设计有限公司 一种开关电源的原边控制器及开关电源
CN108923631B (zh) * 2018-07-24 2019-11-26 深圳市稳先微电子有限公司 一种开关电源系统及用于开关电源系统的控制电路及装置
CN111023441B (zh) * 2019-12-30 2021-08-24 Tcl空调器(中山)有限公司 一种空调控制方法、系统、存储介质及空调器
CN113037056A (zh) * 2021-03-12 2021-06-25 深圳市皓文电子有限公司 调节隔离开关电源的pwm驱动信号的方法及电路
CN114285282B (zh) * 2022-02-28 2022-05-31 深圳原能电器有限公司 一种宽电压输入的变换器及控制方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791544A (en) * 1984-09-21 1988-12-13 Veeco Instruments Regulating control for single-ended switching power supply
US5982645A (en) * 1992-08-25 1999-11-09 Square D Company Power conversion and distribution system
US5959851A (en) * 1996-09-13 1999-09-28 Thomson Consumer Electronics, Inc. Switched-mode power supply control circuit
JP4062307B2 (ja) * 2002-05-30 2008-03-19 サンケン電気株式会社 コンバータ
CN1855680B (zh) * 2005-04-26 2011-05-25 美国芯源系统股份有限公司 开关电源的控制方法及采用该控制方法的产品
US7528587B2 (en) * 2005-12-27 2009-05-05 Linear Technology Corporation Switched converter with variable peak current and variable off-time control
US7529105B1 (en) * 2006-11-03 2009-05-05 Fairchild Semiconductor Corporation Configuring a power converter to operate with or without burst mode functionality
CN101828329B (zh) * 2007-10-19 2012-11-21 株式会社村田制作所 开关电源装置
JP4400680B2 (ja) * 2008-06-11 2010-01-20 サンケン電気株式会社 力率改善回路
JP2010022097A (ja) * 2008-07-09 2010-01-28 Panasonic Corp スイッチング制御回路、半導体装置、およびスイッチング電源装置

Also Published As

Publication number Publication date
EP2256913A1 (fr) 2010-12-01
CN101594064B (zh) 2013-10-30
US8315072B2 (en) 2012-11-20
CN101594064A (zh) 2009-12-02
US20100302814A1 (en) 2010-12-02

Similar Documents

Publication Publication Date Title
EP2256913B1 (fr) Contrôleur pour alimentation électrique de commutation
US6381151B1 (en) High efficiency switching controller
US9391525B2 (en) Power system switch protection using output driver regulation
US8310845B2 (en) Power supply circuit with a control terminal for different functional modes of operation
US8693217B2 (en) Power supply controller with minimum-sum multi-cycle modulation
JP5526857B2 (ja) 電源制御用半導体集積回路および絶縁型直流電源装置
CN209088818U (zh) 同步整流器控制器及离线电源转换器
EP1249926A2 (fr) Procédé et appareil pour la limitation dissipative de tension d'un circuit éléctrique
US20170317593A1 (en) Controller and power supply
CN101147315A (zh) 开关式电源电路
JP4613951B2 (ja) 同期整流型フォワードコンバータ
EP2765696A1 (fr) Circuit d'alimentation électrique à commutation à fonction protectrice
GB2451088A (en) Regulating the output of a forward power converter
US9960685B2 (en) System and method for supplying a synchronous rectifier driver circuit
TWI589109B (zh) Fly-back converter without auxiliary winding
AU2013376433B2 (en) Overvoltage protection and power saving circuit for a switched mode power supply
KR20170118068A (ko) 전원 제어용 반도체 장치
US11791716B2 (en) Power supply control device and switching power supply including start-up circuit
US10615681B2 (en) Switching power supply circuit
TWI420790B (zh) 交換電源供應器之控制器
EP3070828A1 (fr) Appareil d'alimentation
US9112353B2 (en) Power supply device
CN203289338U (zh) 反激开关电源电路
JP4916532B2 (ja) スイッチング電源装置
EP4135175A1 (fr) Contrôleur de convertisseur de puissance avec commutateur de branche

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME RS

17P Request for examination filed

Effective date: 20110513

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: MONOLITHIC POWER SYSTEMS, INC.

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20160311

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 811331

Country of ref document: AT

Kind code of ref document: T

Effective date: 20160715

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602010034450

Country of ref document: DE

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20160706

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 811331

Country of ref document: AT

Kind code of ref document: T

Effective date: 20160706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161106

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161006

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161007

Ref country code: BE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161107

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602010034450

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20161006

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

26N No opposition filed

Effective date: 20170407

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170531

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20170527

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170531

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170531

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20180131

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170527

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170527

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170527

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170531

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170527

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20100527

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20160706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20160706

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20240530

Year of fee payment: 15