EP2186367A1

EP2186367A1 - System for signal broadcasting in a wireless loudspeaker network

Info

Publication number: EP2186367A1
Application number: EP08848370A
Authority: EP
Inventors: Christophe BARBÉ; Yves Lemoine; Pierre Pignal
Original assignee: Parrot SA
Current assignee: Parrot SA
Priority date: 2007-09-06
Filing date: 2008-08-26
Publication date: 2010-05-19
Also published as: US20110129048A1; FR2920930A1; FR2920930B1; WO2009060136A1

Abstract

The system of the invention includes a master device (10) and at least one slave device (20). Each device includes wireless transmission and interfacing means (12, 22), a digital processor (14, 24) and a clock (16, 26). The master device transmits signals at a frequency defined by the clock (16) thereof. The slave device includes means for determining the frequency shift between the clocks and for correcting accordingly, at an internal level, the rate of the signals sent to the processor. On the slave side the frequency of the external clock (26) can be controlled around its nominal value, and a means is provided for extracting the frequency shift value from a register (50) and for adjusting in response the frequency of the second clock so as to minimise said shift. The processor (24) of the slave device can thus operate in a synchronous manner with the clocking of the signals transmitted by wireless link, as restored by the interfacing circuit after correction at the internal level of the signal rate.

Description

SYSTEM FOR DISTRIBUTING SIGNALS IN A NETWORK OF WIRELESS SPEAKERS

The invention relates to signal distribution systems comprising at least two devices coupled together in a continuous manner by a wireless link.

It applies very advantageously to Bluetooth wireless links (registered trademark of Bluetooth SIG, Inc.).

In fact, Bluetooth specifications offer the possibility of remotely controlling a remote device via a bidirectional wireless link. In practice, this is most often a mobile phone or a computer device, but Bluetooth specifications are not limited to this type

10 and include profiles compatible with the transmission of high-quality coded multichannel audio streams (Profile A2DP: Advanced Audio Distribution Profile), as well as profiles ensuring the interoperability of Bluetooth devices with audio and video control functions (AVRCP profile: Audio Video Remote Control Profile).

Bluetooth technology is of particular interest in view of its universal and evolving nature, the existence of numerous functionalities, as well as numerous, inexpensive components especially designed for its implementation. This choice is however in no way limiting, and the wireless link can be implemented at

Other means of wireless transmission, provided that these techniques provide sufficient data throughput to enable the transmission of a continuous stream of data (eg high quality digital audio or video signals): such is the case example the case of the standard IEEE 802.11 (ISO / IEC 8802-11) called "WiFi".

The invention particularly relates, but is not limited to, systems for distributing audio signals between a plurality of active speakers communicating with each other by wireless transmission means, for reproducing the signals of an audio source on the various respective speakers.

Such a system is described in particular in WO 07/074245 A1 (Seydoux). In this system, each enclosure comprises means, advantageously of the Bluetooth type, wireless interfacing with any other speaker of the system. The speakers automatically configure themselves into a network, establishing a table of mutual visibilities and defining from this table a hierarchical network topology, one of the speakers will be designated "headend". The function of the network head is, among other things, to establish a connection (wired or, preferably, radio) with a remote device producing a coded audio signal or a remote control signal. The other loudspeakers receive signals addressed to them, encapsulated in messages including routing data and broadcast in the network from the head speaker, directly or after these signals have been relayed by another speaker of the speaker. system. Insofar as the various active speakers of the system are physically independent (the only constraint being the connection of the supply of the enclosure to a power outlet), each enclosure has its own clock, ensuring the control of its various circuits, in particular the Bluetooth transmit / receive and interface circuit and the digital signal processing circuits, generally grouped together in a specific DSP processor. The audio data is streamed, that is to say in a continuous stream, between the different speakers from the headend enclosure that acts as the server of a client / server architecture, the other speakers being client speakers. A streaming broadcast requires that the client (receiver) consumes the data transmitted to it at the same rate as these are broadcast by the server (the source, transmitter). If the client consumes the data too slowly, it will sooner or later overload unused data, with overflow of the interfacing buffer; conversely, if the data consumption is too fast, the client will sooner or later be lacking data, with underflow of the buffer.

To avoid this difficulty, Bluetooth specifications require that all paired devices have a very accurate clock at ± 20 ppm. This requirement applies to all types of devices, even those that play a privileged role such as master devices in a piconet or scatternet master / slave network. The remaining variability between the clocks of the different devices is managed using a mechanism of recognizing a particular pattern (binary configuration) in low level packets, and then adding or subtracting an offset (offset) to correct the sequencing for get the desired synchronization.

Such a technique is for example described in US 2003/203729 A1, which, to compensate for the offsets of the different clocks, provides to use a recognition mechanism of a particular pattern in identifiable packets, to then add or remove ticks (pulses) in time slots specified by the transmission protocol, in order to correct the sequencing and obtain the desired synchronization - but only internally to the RF circuit. This makes it possible to have the same data rate between the transmitting device and the receiving device. Other documents describe various ways to handle desyncs.

The US 2005/181729 A1 thus provides a particular servocontrol of the clock of a receiver device so that it can operate at low level in certain circumstances, and thus optimize energy consumption. The processing performed is performed exclusively at the RF circuit, internally, so as to correct transmission anomalies occurring at the RF link, but without affecting other application circuits placed downstream of this RF circuit. WO 02/073851 A1 describes a device in which the actual frequency of the clock is not modified, the device merely updating an offset value making it possible to manage the addition or the withdrawal of compensation pulses. .

The document Clock Sync Protocols as Submitted to the P1394.1 DV James Commission, October 12, 1999, XP-002247442, describes a configuration where several devices are serially chained. To avoid an accumulation of resynchronization errors that would be likely to cause a cascading effect, the value of the correction to be made is transmitted all along the chain, so that it can be identified by each of the devices of the serial bus. This is a very particular topology and a problem specific to this topology, which does not appear in configurations such as piconet or scatternet such as those provided by the Bluetooth specifications.

In general, the desynchronization management technique of the Bluetooth specifications is implemented in the chipset (chip set) providing Bluetooth radio / interfacing functions.

It makes it possible to obtain, at the output of the respective chipsets of all the devices of the network, transmitted data which will be synchronized on the same clock sequencing. On the other hand, since this desynchronization management is purely internal to the RF chipset, it is not transferred to the components outside the chipset, ie to the digital circuits for processing the signal output from the chipset - in particular the DSP processor intended to implement the particular application of the network using the signals delivered by the chipset. This aspect is usually not a problem, since Bluetooth technology has been designed for a one-time transmission of data over a limited period of time, for example the length of a telephone conversation, or the duration of sending a file to a specific location. printer. But in the particular case of an audio system such as that described in WO 07/074245 A1 cited above, Bluetooth technology is used somewhat different from its original purpose - however without modification of the protocols, so as to remain perfectly compatible with the specifications of the Bluetooth specifications. Indeed, in this particular system, the Bluetooth technology is used to establish a permanent link in the system, a link that lasts until the speakers are unpowered, that is to say physically disconnected from the power outlet. Specifically, when the system is idle, ie apparently inactive for a user, the wireless links between the various speakers remain active, albeit with reduced information traffic, so as to allow the maintenance the network configuration and the detection at any time of the appearance of an external signal by the network.

The link can thus be maintained continuously, persistently, for several hours or several days without interruption. As each device is equipped with its own clock (chipset external clock), if the RF link is continuously maintained without interruption - an unusual situation for a Bluetooth connection - a progressive desynchronization will appear between the timing of the signal flow received ( which has already been corrected internally by the resynchronization process of the RF chipset) and that of the DSP processing these signals. This drift, even small, can cause signal processing incidents by the DSPs, especially since the clock is imprecise, due to the faster accumulation of various desynchronizations. For this reason, in the known devices, besides the choice of a relatively high precision clock (typically ± 2 ppm), it is provided at periodic intervals forcing the resynchronization, for example every two hours. Most often, this resynchronization goes unnoticed, but this way of proceeding is not, however, satisfactory, and it would be desirable to be able to be completely free from this mechanism. In addition to eliminating periodic resynchronization, it would also be advantageous to use a less accurate clock with the device (up to ± 20 ppm instead of ± 2 ppm), which is therefore less expensive and easier to implement.

To achieve this goal, the solution proposed by the invention consists essentially of:

- search the RF chipset for the value of the offset that was used for internal resynchronization, - externalize this offset value and

use it to control the clock of the DSP (or other application circuit external to the RF chipset) in order to synchronize this DSP in order to ensure a perfect match between (i) the stream of received data delivered by the RF chipset and ( ii) the rate at which this data is processed by the DSP.

More specifically, the invention relates to a signal distribution system of the type disclosed for example in the aforementioned WO 07/074245 A1, that is to say comprising at least two devices coupled continuously by a wireless link, with a master device and at least one slave device. The master device comprises first transmission and interfacing means, a first digital signal processing processor, and a first clock, for the common timing of the first transmission and interfacing means and the first digital processor, transmitting signals wirelessly at a rate defined by said first clock. The slave device comprises second transmission and interfacing means, a second digital signal processing processor, and a second clock for the common timing of the second transmission and interfacing means and the second digital processor. The second transmission and interfacing means include internal resynchronization means, with internal correlator and compensator means, for determining a frequency offset between, on the one hand, the rate of the signals received by the second transmission means and on the other hand. interfacing and, secondly, the frequency of the second clock, and for correcting the bit rate of the signals delivered to the second digital processor by the second transmission and interfacing means as a function of the frequency offset thus determined. In a characteristic manner of the invention, the second clock is an external clock with respect to the aforementioned second transmission and interfacing means, the frequency of which is controllable around its nominal value, and the slave device furthermore comprises interrogating means, for extracting correlating and compensating means the value of said frequency offset, and servo means, for applying to the second clock the offset thus extracted, so as to drive the frequency of the second clock in response to said frequency offset value, in the direction of minimizing said offset. The interrogator means are very advantageously means, incorporated in the second digital processor, for reading the contents of an internal register of the correlating and compensating means.

Preferably, the second digital processor comprises means for delivering a control signal of the frequency of the second clock, in particular a digital signal such as a pulse width modulation signal delivered to the second clock via a pass filter. low. The accuracy of the first and second clocks can be as low as 10 ppm at most, preferably 20 ppm at most.

An embodiment of the invention will now be described with reference to the accompanying drawings in which the same reference numerals designate identical or functionally similar elements from one figure to another. Figure 1 schematically illustrates the different devices of a system in which signal distribution is provided by wireless means.

Figure 2 is a schematic view of the various elements of an audio signal distribution system in a wireless speaker array. Figure 3 is a block block diagram of the various elements providing implementation of the invention in the system of Figure 2.

Figure 1 schematically illustrates a network consisting of various devices exchanging signals with each other wirelessly, for example Bluetooth type links. However, as indicated in the introduction, the choice of this technology is in no way limiting and the invention can be applied to other wireless transmission techniques operating in a comparable manner. Bluetooth specifications enable not only point-to-point links between two elements, but also establish and manage more or less complex networks consisting of a number of these elements.

A first type of network is the piconet, or micro-network, which is created automatically when several Bluetooth compatible elements are in the same radius. The piconet follows a star topology, with a master 10 and several slaves 20: the communications are direct between the master 10 and the slaves 20, and the slaves 20 can not communicate with each other. More specifically, each master device 10 or slave 20 comprises a transmitter / receiver and Bluetooth interface circuit, respectively designated 12, 22. The master circuit M (the circuit 12) communicates with each of the slave circuits Si, S2, S3 ,. The circuits 12 and 22 thus form a wireless network 30 comprising a master M (with the circuit 12) and a plurality of slaves Si, S ₂ , S ₃ (together with the circuits 12). circuits 22).

Each device 10, 20 also comprises, in addition to the transmitter / receiver and interfacing circuit 12, 22, a specific application circuit 14, 24 for processing the data exchanged within the wireless network 30 by the various devices. Note that, functionally, these application circuits 14, 24 are outside the network 30, which is as such intended for the exchange of signals, without application role. In Figure 2, there is illustrated a concrete example of such a network, applied to the distribution of audio signals.

In this system, the devices are active speakers mutually configured in a wireless network, one of the speakers 10 is the master speaker and the other (the other) speaker (s) 20 is (are) a ) slave enclosure (s). For simplicity, the illustrated system is a stereo system with only two speakers, but a system with a larger number of speakers can be made in the same way, especially for "home theater" installations. with "5.1", "7.1", etc. sound configurations, including various surround satellite speakers, subwoofers, etc. The master speaker 10 may be coupled to various peripherals, for example a digital music player 40 provided with a Bluetooth module (internal or external) transmitting to the system an audio stream according to an A2DP profile, or a mobile phone 42 sending the same way audio data to the system. The peripherals can also be control devices sending the system control signals according to an AVRCP profile. The device can also be a device capable of sending both audio signals and commands, for example the mobile phone 42 whose keyboard keys can be used to control the system (selection of sources, volume, balance, .. .). The system can also be connected to conventional elements such as FM tuner, CD / DVD player / recorder, TV, etc., by a wired connection by means of plugs connected to corresponding input jacks provided on the radio. 10. As illustrated in the block diagram of Figure 3, the transmitter / receiver and Bluetooth interfacing circuit 12 of the speaker 10 delivers signals to an application circuit 14 digital signal processing (DSP). The two digital circuits 12, 14 of the enclosure 10 are sequenced by a common clock 16, for example a clock of 26 MHz nominal frequency with a stability of the order of ± 20 ppm.

As regards the slave speaker 20, it also comprises a Bluetooth transmitter / receiver and interfacing circuit 22 which delivers signals to an application circuit 24 for digital signal processing (DSP). The two digital circuits 22, 24 of the enclosure 20 are sequenced by a common clock 26, for example a clock of 26 MHz nominal frequency with a stability of the order of ± 20 ppm. The clocks 16 and 26 of the two speakers 10 and 20 of the system are of the same nominal frequency but, in practice, their actual frequency always has a slight deviation from the nominal value. With respect to the transmission of data between the two circuits 12 and 22 (wireless link 32), it has been explained above how the Bluetooth specifications provide means for compensating for this difference, by adding or subtracting, on the slave side, to each data packet an offset or offset corresponding to the observed frequency deviation. The deviation from the nominal frequency is detected by a correlator capable of recognizing in the data stream a particular pattern or sequence of bits sent to the beginning of the packets, analyzing the temporal position, and consequently determining the offset. necessary. The correction has the effect that the data stream at the output of the circuit 22 has exactly the same timing as that at the output of the circuit 12 of the remote master device.

But this resynchronization remains internal to the network, that is to say that it concerns only the radio interfacing circuits 12, 22. In a characteristic manner of the invention, the offset determined by the circuit 22 is used to synchronize also the digital application circuit 24 of the slave device.

For this purpose, the circuit 24 is controlled to read a register 50, internal to the circuit 22, containing the offset value determined by the Bluetooth correlator. This register, designated ClockJDffset in the Bluetooth specification, contains the value of the time offset between the master-side clock signal and the slave-side clock signal, as well as a validity flag. The link 52 symbolizes the reading of the contents of this register 50 by the circuit 24.

The read value thus enables the circuit 24 to know if the clock 26 on the slave side is moving ahead or behind the clock 16 on the master side. From this indication, the base frequency of the slave-side clock 26 will be adjusted to make it as synchronous as possible with that of the master-side clock (note that this adjustment is only slave-side because Bluetooth specifications prohibit any action on the master clock). This operation consists, in other words, in externalizing Voffset contained in the register to apply it to the main clock.

The regulation of the clock 26 is for example controlled by a digital output 54 of the circuit 24 delivering a pulse width modulated signal PWM. This digital signal is used to generate a control voltage of the clock, for example by means of a low-pass filter 56 of the second order with a cut-off frequency of the order of 10 Hz. The DC voltage obtained at the output of the filter 56, for example between 0.5 and 2.5 V, thus reflects the value of the offset between the clocks of the two devices 10 and 20. This voltage is applied to a control input 58 of the clock 26, which is a voltage controllable quartz oscillator (VCXO). By varying the voltage applied to the input 58 in a range of 0.5 to 2.5 V, an adjustment of the frequency generated by the clock 26 from -8 ppm to +8 ppm is allowed. The application circuit 24, responsible for processing the received data, can thus be perfectly synchronized to the clock frequency of the wireless network ensuring the transfer of data between the various devices. Concretely, for the sake of homogeneity, it is expected that all the devices will have the same internal structure, and it will only be at the time of the automatic configuration of the network that a device will be defined as being master or slave. Insofar as the corrections are applied only to the slave devices and not to the master device, it suffices for the latter to apply a zero voltage to the clock oscillator control input 16. Thus, the VXCO side master will behave like a simple XO, oscillating on its nominal frequency with some inaccuracy, but which will be compensated on the slave side.

Claims

A signal distribution system, in particular of audio signals in a wireless speaker array, comprising at least two devices (10, 20) continuously coupled by a wireless link (32), with:

a master device (10) comprising: first transmission and interfacing means (12), a first digital signal processing processor (14), and a first clock (16) for the common timing of the first means transmission and interfacing system and the first digital processor, the master device transmitting by said wireless link (32) signals at a rate defined by said first clock (16),

at least one slave device (20) comprising: second transmission and interfacing means (22), a second digital signal processing processor (24), and • a second clock (26) for the common clock timing second transmission and interfacing means and the second digital processor, the second transmission and interfacing means (22) including internal resynchronization means, with internal correlator and compensator means, for determining a frequency offset between, d on the one hand, the rate of the signals received by the second transmission and interfacing means and, on the other hand, the frequency of the second clock, and for correcting the bit rate of the signals delivered to the second digital processor by the second means of transmission and interfacing according to the frequency offset thus determined, characterized in that the second clock (26) is an external clock with respect to said second transmission and interfacing means, the frequency of which is controllable around its nominal value, and in that the slave device furthermore comprises:

^• interrogators means for extracting correlators compensating means and the value of said frequency offset, and ^• the control means (54, 56, 58) for applying the second clock said offset thus extracted, so as to control the frequency of the second clock in response to said frequency offset value in the direction of the minimizing said decal.

The system of claim 1, wherein the interrogator means is means for reading (52) the contents of an internal register (50) of the correlator and compensator means.

The system of claim 1, wherein the interrogator means is embedded in the second digital processor (24).

4. The system of claim 1, wherein the second digital processor (24) comprises means for providing a signal (54) for controlling the frequency of the second clock.

The system of claim 4, wherein the driving signal (54) is a digital signal.

The system of claim 5, wherein the driving signal (54) is a pulse width modulated (PWM) signal.

The system of claim 6, wherein the control signal (54) is supplied to the second clock (26) via a low pass filter (56).

The system of claim 1, wherein the accuracy of the first and second clocks (16, 26) is at most 10 ppm, preferably at most 20 ppm.