EP2153430A2 - Commande de puissance dynamique pour des écrans d'affichage - Google Patents

Commande de puissance dynamique pour des écrans d'affichage

Info

Publication number
EP2153430A2
EP2153430A2 EP08751192A EP08751192A EP2153430A2 EP 2153430 A2 EP2153430 A2 EP 2153430A2 EP 08751192 A EP08751192 A EP 08751192A EP 08751192 A EP08751192 A EP 08751192A EP 2153430 A2 EP2153430 A2 EP 2153430A2
Authority
EP
European Patent Office
Prior art keywords
screen
zone
brightness
zones
image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP08751192A
Other languages
German (de)
English (en)
Inventor
Jonathan A. G. Schenck
Andrew M. Francis
Geoffrey Lunn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Priority to EP08751192A priority Critical patent/EP2153430A2/fr
Publication of EP2153430A2 publication Critical patent/EP2153430A2/fr
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the present systems and methods relates to dynamic power control (DPC) systems and methods for dynamically changing the brightness of display screens based on dividing the display into zones.
  • DPC dynamic power control
  • Conventional display screens are used to display video and computer images to individuals and small groups of people. These screens are based on technologies such as cathode ray tube, LCD and plasma and they produce high resolution images of sufficient brightness for viewing indoors.
  • LEDs Light Emitting Diodes
  • LED screens have been available for many years and hundreds are installed in sports and public venues around the world. Display screens which use LEDs are relatively energy-efficient devices, in that their power consumption is proportional to their size and light output. Typically, for a given screen size, power consumption is high when a bright image is displayed, and power consumption is low when a dark image is displayed.
  • the rating e.g., watt or power rating
  • the rating may be easily calculated from the manufacturer's technical data, and is based on the amount of power the screen requires when displaying the brightest possible image (a plain white image filling the screen) at its full rated light output.
  • the screen is drawing the most power it can ever draw, i.e., maximum power, and the power supply must be of sufficient rating to handle this maximum power condition.
  • Factors related to costs include the size or rating of the power supply necessary to provide the needed power to the LED screen, as well as the expense associated with providing separate or special power lines or feeds to provide the necessary power, voltage and/or current to the LED screen.
  • the power consumption of an LED screen is proportional to the brightness of the image displayed. Images vary in brightness content, from the very darkest (a plain black background with no detail) to the very lightest (a plain white background with no detail).
  • the screen designer has no control over the brightness of content displayed on the LED screen, or any other screen, the screen has to be designed to cope with the worst case power consumption, namely, displaying white background. In this case, the screen is drawing maximum power from the supply.
  • the following factors are taken into account in designing and installing display screen:
  • the total power rating of the power supply units inside the screen must be sufficient to be able to deliver the maximum power. This requires bulky and heavy screen power supply unit(s) whose full capacity is not used most of the time. The large screen power supplies further add to the screen cost and weight, as well as require heat dissipation. 3. Due to the need for increased heat dissipation, the cooling capacity of the ventilation system inside screen must cope with increased heat produced during continuous running at maximum power (i.e., during the worst case scenario used in designing screen displays). Accordingly, more fans are required to circulate air, with the associated increase in cost, weight and noise.
  • a simple way of reducing the maximum power drawn by an LED screen is to limit the light output to a low value, i.e., turn the brightness down. While achieving the goal of reducing power, this clearly has the obvious disadvantage of rendering all the displayed images dim and lifeless.
  • Another way of reducing power consumed by a screen includes limiting the current provided to the screen as described in Patent No. 7,193,592 to Nakamura, which is incorporated herein by reference in its entirety.
  • Nakamura describes an electro-luminescent (EL) display screen where pixels are driven by a drive current from a driving circuit.
  • the driving circuit in Nakamura restricts current upon an increase in the total sum of the drive current.
  • One object of the present systems and methods is to overcome the disadvantages of conventional displays. This and other objects are achieved by a display system having a screen configured to display an image with a screen brightness value; and a processor configured to divide the screen into zones, to determine a zone brightness of each zone, e.g., via real time content analysis of the image displayed in the zone; and to reduce the screen brightness by a factor when the zone brightness of one of the zones is greater than a threshold value.
  • the threshold value is associated with a maximum rated current drawn from a power supply driving a zone, and each zone may be driven by a respective power supply.
  • the processor may also be configured to measure virtual zone brightness of virtual zones which are moved by a predetermined number of pixels across the screen, and reduce the screen brightness by the factor when the virtual zone brightness of one of the virtual zones is greater than the threshold value.
  • Figs. 1-3 show screens divided into 8 zones according to illustrative embodiments;
  • Fig. 4 shows block diagram showing the signal path of an LED screen according to an illustrative embodiment;
  • Fig. 5 shows block diagram including a delay element according to another illustrative embodiment
  • Figs. 6-8 show various graphs of demonstrating the effects of DPC according to another illustrative embodiment
  • Fig. 9 shows zoned screen with large, bright graphic objects moving across the screen according to another illustrative embodiment.
  • Fig. 10 shows virtual zones according to another illustrative embodiment.
  • the present systems and methods use dynamic power control (DPC) to reduce and limit the maximum power drawn by a screen display device, such as an LED screen, without affecting the quality of images having medium and low brightness content.
  • DPC dynamic power control
  • a screen display device such as an LED screen
  • DPC automatically and substantially instantly reduces the image brightness to a level which maintains the total power consumption within a predefined limit.
  • the present systems and methods using DPC allow reduction of the screen maximum power consumption to a level which allows the LED screen to be powered from a regular outlet, such as a 230V mains outlet (or any other suitable voltage level with associated cables suitable for the proper power, current and voltage levels), instead of a special 3-phase supply, for example. That is, a special mains supply is not required, thus reducing the cost of installation.
  • screens with DPC use less electricity and are therefore more eco-friendly, and smaller/fewer power supply units are required inside the screen, thus reducing the cost and weight of the screen. Reduced power consumption leads to reduced heat generation which, in turn, leads to reduced cooling requirement.
  • the active area of a screen such as an LED screen, is divided into zones. Each zone is driven by its own power supply unit(s) (PSUs).
  • PSUs power supply unit
  • the image signal to be displayed on screen is analyzed in real time, by dividing incoming fields into zones which in size, exactly match screen zones.
  • the pixel luminance value of the brightest zone is determined, such as by determining the zone luminance values, or white/light colored image areas, of each zone from content analysis in real time and selecting the brightest zone, e.g., the zone filled with the most white and/or light colored content or image.
  • the maximum zone luminance value or total pixel luminance value of the brightest zone is compared to a predetermined threshold value.
  • the threshold value is the value which, if reached by the pixels in any one zone, would cause the maximum rated current to be drawn from the PSU(s) driving that zone.
  • a processor reduces the output level of the entire screen by a certain target factor, which may be a predetermined or a calculated power reduction factor, in order to reduce power consumption and prevent the PSUs from becoming overloaded.
  • a certain target factor which may be a predetermined or a calculated power reduction factor
  • the target reduction factor in maximum screen power, brought about by DPC may be determined by one or more factors.
  • the target may be to reduce the screen's overall power consumption so that, for example, the screen may be operated from a typical single phase outlet, instead of a 3 -phase supply.
  • One beneficial byproduct may be that the quantity of PSUs needed to drive the screen is reduced, with associated savings in cost and weight.
  • the target may be to reduce power consumption so as to bring it within the range of a specific quantity of PSUs, or within the capacity of a different specification of PSU.
  • DPC DPC
  • the effect of DPC to the average viewer is usually invisible, where brightness of the displayed content is reduced when a zone luminance of any one zone exceeds the predetermined DPC threshold.
  • the image may be below the DPC threshold and the screen output will be at maximum level. If the image contains increasing areas of bright detail, then the screen output level will be progressively reduced, and vice-versa. The more severe the reduction factor, then the earlier the screen output level reduction will occur and the lower it will go.
  • a power reduction factor of 0.6 has been demonstrated using DPC in accordance with the present systems and methods. As shown in system 100 of Fig.
  • a display device such as an LED screen 110 includes a processor 120 configured to perform DPC and control the LED screen 110 to display images and change screen brightness when the brightness of any one zone exceeds a threshold stored in a memory 130 coupled to processor 120.
  • the memory 130 may also store other data and application software including software instructions for execution by the processor to perform DPC, for example.
  • the processor 120 may be configured to divide the active display area of the screen 110 into zones, such as eight zones 1-8 of identical size and shape. Each zone may be powered by its own one or more PSUs, where a PSU for zone 1 is shown as a dashed box 140 in Fig. 1.
  • the size of a zone (measured in pixels) and/or the number of zones may be determined by a number of factors such as, the power consumption per unit area of the screen at full rated light output; the reduction factor in the maximum screen power expected due to incorporation of DPC, e.g. a reduction factor of 0.6; and the power rating of each zone's PSU(s).
  • the power consumption per unit area of the screen, at full rated output may be determined either from manufacturer's specification, or by measurement.
  • the processor 120 is configured to analyze in real time the pixel content of each corresponding zone of the incoming image signal, determine the total pixel luminance sum of the brightest zone, and compare it to a predetermined threshold value stored in the memory 130.
  • Content analysis is well known, such as described in U.S. Patent No. 6,714,594 to Dimitrova, and U.S. Patent Application Publication No. 2004/0168205 to Nesvadba, each of which is incorporated herein by reference in its entirety. If the determined maximum zone luminance value of the brightest zone, or the luminance value of any of the zones exceeds the threshold value, then the processor 120 is configured to perform DPC and reduce the entire screen output or brightness level. To minimize incidences of output level reduction, it is desirable for the shape of the zones to represent, in the best way possible, an 'average' slice of the total image. The zone shape has a pronounced effect on DPC performance.
  • the screen 110 is divided into eight zones numbered 1 through 8; where each zone may be half the height of the screen 110, for example, or have different heights (i.e., have a partial screen height).
  • each zone may be half the height of the screen 110, for example, or have different heights (i.e., have a partial screen height).
  • zones 2 and 3 will each have higher total pixel values than any other zone, due to the bright areas of these zones 2 and 3.
  • the high pixel values in zone 2 or 3 may well cause the screen output level to be reduced (if higher than the threshold value).
  • Fig. 2 shows a screen 210 with eight zones where the same image as that of Fig. 1 is displayed except that each zone of the screen 210 is full (active) screen height.
  • Zone analysis e.g., performed by the processor 120 shows that zones 4 and 5 of Fig. 2 have the highest pixel values. However, the percentage of each of those zones 4 and 5 devoted to bright areas (such as sunlit bright clouds in the actual viewing scene) is much lower than that of zones 2 and 3 shown in Fig. 1. In the case of the screen 210 of Fig. 2, the total pixel luminance sum of each of these zones 4 and 5 may be lower than the threshold value and thus will not cause a reduction in screen output level.
  • Fig. 3 shows one embodiment of a screen 310 having 256x144 pixels and divided into 8 full-height zones, each zone being 32x144 pixels.
  • each zone may have its own one or more power supply units (PSUs).
  • PSUs are available in a range of output voltages and powers.
  • each PSU In a conventional screen without DPC, each PSU must be powerful enough to be able to drive its area of the screen when a plain white image is displayed (i.e., maximum brightness/power).
  • the incorporation of DPC enables less powerful (and thus less expensive) PSUs to be used, or alternatively, each existing PSU can drive a larger area of the screen.
  • the power reduction achieved by DPC is taken into account to yield PSUs of lower power ratings.
  • the DPC factor is 0.6, for example, then the maximum power required to drive the zone is:
  • PZONE WITH NO DPC x 0.6 Watts where PZONE WITH NO DPC is the power required to display a plain white image on the zone, without DPC operating.
  • the image signal including the content, e.g., the image, to be displayed on the screen is analyzed to determine brightness value of each pixel to anticipate the current which would be drawn by each individual screen pixel if that image was displayed on the screen with no DPC. If the total current, hence power, of all pixels in any one zone exceeds the threshold value, then the entire screen output level is reduced accordingly to not exceed the rated power rating of the screen or the PSUs. To achieve a sufficiently accurate anticipation of screen pixel performance, it is desired to properly choose where in the signal path to make the content analysis.
  • Fig. 4 shows block diagram 400 showing the signal path of an LED screen according to one embodiment, where a composite video signal 405 is received by a video decoder 410 for decoding.
  • the decoded signal passes through a multiplexer (MUX), and may be multiplied by a scalar 420 to match (e.g., reduce) the signal resolution with the screen resolution since, typically, the incoming image will typically be of somewhat higher resolution (e.g., 720x576 pixels) than the LED screen (e.g., 256x144 pixels). Image resolution is therefore reduced in the scalar 420, to a resolution which matches the LED screen.
  • the image analysis should take place somewhere where the entire incoming image is available. This eliminates the latter stages of the signal path, where the internal data distribution within the screen physically splits the image data to direct only relevant data to each part of the screen.
  • a gamma corrector 465 provides gamma correction.
  • Color correction is also provided by a color corrector 470 for providing signal to drivers 475 for driving LEDs 480 and displaying the content or images on the screen 440.
  • the image signal exists as an 8-bit RGB (Red-Green-Blue) luminance data (e.g., 3 x 8-bit streams - one for 'R', one for 'G' and one for 'B'); and the LED currents for red, green and blue LEDs are equal.
  • the following describes the sequence of events during image analysis in order to calculate a gain factor which will be applied later in the signal path, to control the screen output level to achieve the target power reduction factor (Factor T ARGETREDuc):
  • the gain factor should be applied at a suitable stage in the signal path to provide the desired effect at a suitable time.
  • the process of measuring pixel values and calculating the gain factor for a field of incoming image actually takes a duration of one field to complete. Therefore, the calculated gain factor actually relates to the field just passed i.e. it is one field in arrears.
  • the image signal may be delayed by one field, or by the amount of time it takes to process the image signal, between analysis 510 and application 520 as shown in the block diagram 500 in Fig. 5.
  • the analyzed signal from the FPGA 430 corresponds to the signal being displayed on the screen 440 by the LEDs 480 due to the field delay 530 of the signal from the FPGA 430 to the LEDs 480.
  • the ideal point in the signal path to apply the gain factor is at the color correction stage 470 shown in Fig 4. It is here that various modifications to image RGB levels are normally carried out to provide, e.g., correct white balance and color uniformity. There is also the benefit that, at this point, inherent time delays in data- processing (due to DPC analysis 510 shown in Fig. 5) are likely to equate to one field duration, and thus be properly taken into account by the delay 530 of Fig. 5. This results in the gain factor being applied to the correct field of data on which it is based (i.e., proper timing), rather than on data from the following field, thus eliminating transient PSU overloads.
  • Figs. 6-8 show graphs of quantity of rows of pixels illuminated on screen (256 pixels per row) on the x-axis, versus the main supply current in amperes AC on the y-axis, where the middle vertical dotted line is the DPC threshold, and the right dotted line is the line where all the rows are illuminated, i.e., the entire screen is driven.
  • Fig. 6 shows a curve 600 of measured screen mains current versus size of illuminated zone area showing the effect of DPC when all zones driven, under the following conditions: plain white test pattern; all zones driven; screen size 256x144 pixels (h x v); mains current measured with A. C. current transducer; and Mains voltage of235 V A.C.
  • Fig. 7 shows a curve 700 of measured PSU output current versus size of illuminated zone area showing the effect of DPC when one is zone driven, under the following conditions: plain white test pattern; only one zone driven; zone size 32x144 pixels (h x v); and PSU current measured with D. C. current transducer.
  • Fig. 8 shows a curve 800 of measured light output of a small area of screen versus size of illuminated zone area, showing the effect of DPC when one zone driven, under the following conditions: plain white test pattern; one zone driven; zone size 32x144 pixels (h x v); and light output measured with Minolta CS-100 Chroma Meter at 5 meters. It should be noted that the light output per pixel is dependent on the LED temperature.
  • FIG. 9 shows a system 900 with a screen 910 divided into 8 zones with large, bright graphic objects, e.g., content image portion or graphic object 920 tracking or moving across the screen 910 from position A to position B. As in Fig 2, the screen 910 is divided into eight equal full-height zones 1-8.
  • virtual zone analysis involves analyzing each 32x144 pixels zone 1-8 and ascertaining the zone which has the greatest luminance sum. However, rather than using only the eight zones directly linked to their own PSUs, virtual zone analysis looks at every possible 32x144 (h x v) zone that can exist within the entire screen.
  • Fig. 10 shows a system 1000 configured to use the concept of virtual zone analysis.
  • the first analysis looks at the leftmost 32x144 pixels area of the screen 1010 (section 1020 as virtual zone 1) and calculates the total luminance sum of this virtual zone 1 same as that for fixed zones.
  • the second analysis moves the virtual zone one pixel to the right (section 1030 as virtual zone 2) and again calculates the total luminance sum of this virtual zone.
  • the third analysis moves the virtual zone one more pixel to the right and so on. The process repeats until the right side of the screen is reached as shown by section 1040 of the screen 1010 which is virtual zone 225.
  • the operation acts of the present methods are particularly suited to be carried out by a computer software program.
  • the application data and other data are received by the controller or processor for configuring it to perform operation acts in accordance with the present systems and methods.
  • Such software, application data as well as other data may of course be embodied in a computer-readable medium, such as an integrated chip, a peripheral device or memory, such as the memory or other memory coupled to the processor.
  • the computer-readable medium, the memory, and/or any other memories may be long-term, short-term, or a combination of long- and-short term memories. These memories configure the processor/controller to implement the methods, operational acts, and functions disclosed herein.
  • the memories may be distributed or local and the processor, where additional processors may be provided, may be distributed or singular.
  • the memories may be implemented as electrical, magnetic or optical memory, or any combination of these or other types of storage devices.
  • the processor and the memories may be any type.
  • the processor may be capable of performing the various described operations and executing instructions stored in the memory.
  • the processor may be an application-specific or general-use integrated circuit(s).
  • the processor may be a dedicated processor for performing in accordance with the present system or may be a general-purpose processor wherein only one of many functions operates for performing in accordance with the present system.
  • the processor may operate utilizing a program portion, multiple program segments, or may be a hardware device utilizing a dedicated or multi-purpose integrated circuit.

Abstract

L'invention concerne un système d'affichage (100) qui comprend un écran (110) configuré pour afficher une image avec une brillance d'écran ; et un processeur (120) configuré pour diviser l'écran (110) en zones, pour déterminer une brillance de zone pour chaque zone, par exemple par l'intermédiaire d'une analyse de contenu en temps réel de l'image affichée dans la zone ; et pour réduire la brillance d'écran d'un facteur lorsque la brillance de zone de l'une des zones est supérieure à un seuil. Le seuil est associé à un courant nominal maximal tiré d'une alimentation électrique (140) commandant une zone, et chaque zone peut être commandée par une alimentation électrique respective (140). Le processeur (120) peut également être configuré pour mesurer une brillance de zone virtuelle des zones virtuelles qui sont déplacées d'une distance prédéterminée à travers l'écran, et pour réduire la brillance d'écran d'un facteur lorsque la brillance de zone virtuelle de l'une des zones virtuelles est supérieure au seuil.
EP08751192A 2007-05-16 2008-05-09 Commande de puissance dynamique pour des écrans d'affichage Ceased EP2153430A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP08751192A EP2153430A2 (fr) 2007-05-16 2008-05-09 Commande de puissance dynamique pour des écrans d'affichage

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP07108345 2007-05-16
PCT/IB2008/051844 WO2008142602A2 (fr) 2007-05-16 2008-05-09 Commande de puissance dynamique pour des écrans d'affichage
EP08751192A EP2153430A2 (fr) 2007-05-16 2008-05-09 Commande de puissance dynamique pour des écrans d'affichage

Publications (1)

Publication Number Publication Date
EP2153430A2 true EP2153430A2 (fr) 2010-02-17

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EP08751192A Ceased EP2153430A2 (fr) 2007-05-16 2008-05-09 Commande de puissance dynamique pour des écrans d'affichage

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Country Link
EP (1) EP2153430A2 (fr)
JP (1) JP2010527043A (fr)
KR (1) KR20100021459A (fr)
CN (1) CN101681583B (fr)
TW (1) TW200912886A (fr)
WO (1) WO2008142602A2 (fr)

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KR101884233B1 (ko) 2016-08-26 2018-08-01 삼성전자주식회사 디스플레이 장치 및 그 구동 방법
KR102208872B1 (ko) 2016-08-26 2021-01-28 삼성전자주식회사 디스플레이 장치 및 그 구동 방법
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KR20100021459A (ko) 2010-02-24
JP2010527043A (ja) 2010-08-05
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