EP2139109A1 - Procédé destiné à limiter la tension dans un transpondeur - Google Patents
Procédé destiné à limiter la tension dans un transpondeur Download PDFInfo
- Publication number
- EP2139109A1 EP2139109A1 EP09009622A EP09009622A EP2139109A1 EP 2139109 A1 EP2139109 A1 EP 2139109A1 EP 09009622 A EP09009622 A EP 09009622A EP 09009622 A EP09009622 A EP 09009622A EP 2139109 A1 EP2139109 A1 EP 2139109A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- voltage
- resonant circuit
- circuit
- control input
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 17
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 6
- 238000007599 discharging Methods 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 17
- 230000010355 oscillation Effects 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003534 oscillatory effect Effects 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000013016 damping Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000001537 neural effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 230000001502 supplementing effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G11/00—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
- H03G11/02—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general by means of diodes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0701—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management
- G06K19/0715—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising an arrangement for power management the arrangement including means to regulate power transfer to the integrated circuit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
Definitions
- the invention relates to a method for limiting the voltage according to the preamble of patent claim 1.
- the invention relates to a circuit for limiting the voltage in a transponder according to the preamble of patent claim. 6
- RFID Radio Frequency Identification
- An RFID application is understood here as meaning any application in which a transmitting / oscillating circuit supplies an inductively coupled receiving resonant circuit with energy and reads out data via the receiving oscillating circuit.
- Such connections are used, for example, for object identification, with a transmitter oscillation circuit of a reader responding via a receiver circuit to a tag-labeled object and retrieving information.
- the transmitter's oscillating circuit For contacting, the transmitter's oscillating circuit generates a high-frequency magnetic field, which induces an alternating voltage in an inductance of a receiving resonant circuit, which is located in the vicinity of the reading device.
- the alternating voltage induced in the receiving resonant circuit is rectified and serves, for example, to supply power to an integrated circuit connected to the receiving resonant circuit.
- a microprocessor and / or a memory element may be provided as a system clock.
- a transmission of data from the reader to the receiving resonant circuit can be done for example by switching on and off the magnetic field.
- load modulation For a data transport in the opposite direction from the receiving resonant circuit to the reader so-called load modulation is used, which requires a sufficient proximity (distance less than 0.16 * wavelength) of transmitting and receiving resonant circuit. With sufficient proximity, it comes to the transformer coupling, in which the energy consumption of the receiving coil is reflected by a retroactive effect on the Sendeschwing Vietnamese in voltage changes to the transmitter oscillation circuit. Controlled modulations of the load, ie the impedance of the receiving resonant circuit, therefore cause voltage changes in the transmitting oscillating circuit, which can be evaluated for data transmission.
- first clamping voltage the voltage at the receiving resonant circuit to certain values, which is referred to below as the first clamping voltage.
- barrier layer components are connected between resonant circuit connections and a reference or ground potential.
- a lower clamping voltage is realized, for example, by virtue of the fact that its forward voltage drops across the junction components, the voltage drop being current-independent as a first approximation because of the exponential dependence of the current on the voltage.
- the barrier layer components act as a reliable limitation of the resonant circuit voltage to an associated value. This is especially important in systems with high-quality inductors, which can otherwise cause undesirably high voltages in the case of spatial proximity of the transmitter oscillating circuit and the resonant circuit.
- the upper clamping voltage can be realized by a Zener diode connected in series with the reverse conducting direction, which is to be controlled or switched short.
- the breakdown voltage of the zener diode provides for an additive voltage offset, which defines an upper clamping voltage in the sum with said forward voltages.
- a short-circuited zener diode a comparatively large current flows out of the receiving resonant circuit, which corresponds to the loaded state of the resonant circuit. Accordingly, the current drain from the resonant circuit and the load on the resonant circuit is reduced by opening the short circuit across the zener diode.
- the barrier layer components provide for a limitation of the resonant circuit voltage to a predetermined value by the barrier layer components.
- the diodes act in this phase as a DC voltage source and thus do not oppose the coil current sufficient damping, so that the induced oscillation is changed.
- the result is a widening of the currently applied clock phase (pulse broadening), which leads at least to the partial extinction of the subsequent oscillation. It occurs in that at least one oscillation in the amplitude is too small for a given detection threshold.
- the object of the invention is to specify a method and a circuit arrangement for limiting the voltage in a transponder, which reduces the disadvantages of the prior art.
- a controllable junction device having an input, an output and a control input is provided, and the input is connected to the first resonant circuit connection, the output connected to the second resonant circuit connection, and an alternating voltage is induced by the base station in the transmitting and receiving resonant circuit between the first and second resonant circuit connection, so that the induced in the transmitting and receiving resonant circuit AC voltage is limited to a first voltage value by the control input of the junction device is connected by means of a switch to a voltage source.
- This method offers the advantage that for both voltage half-waves a total of only one barrier layer component must be provided, whereas in known methods a symmetrical construction of at least one barrier layer component was provided for each voltage half-wave.
- Another advantage of the method according to the invention is that the voltage is limited from a first to a second voltage value for load modulation.
- a further embodiment of the method provides that the change from the first to a second voltage takes place in at least two stages by cascading one after the other so as to cascade one after the other in order to reduce the voltage to the second, low value.
- the coil current which would have flowed abruptly when the modulation transistor is turned on, is distributed over several oscillations.
- the coil voltage also reduces to the level of the second voltage over several oscillations.
- the change from the first to a second voltage is linear by being controlled by an inverse signal.
- a voltage limiting circuit in a transponder comprising a resonant circuit, at least one inductance, a capacitance, a junction component having an input, output and a control input, and a first resonant circuit terminal connected to the input of the junction device and a second resonant circuit terminal, which is connected to the output of the junction device, comprises, wherein a connection of the control input of the junction device with the first resonant circuit and the second resonant circuit connection consists.
- a circuit has proven to be particularly advantageous in which a NMOS transistor is provided as a barrier layer component.
- At least two series-connected, bridgeable barrier-layer components are provided for driving the barrier-layer component.
- switches are provided for bridging the series-connected junction components by means of time-offset modulation signals.
- a PMOS transistor is provided as a junction component.
- the Fig. 1 and Fig. 2 show a transmitting and receiving resonant circuit 10 of a receiving part or day.
- a reference potential terminal 28 At the output of the junction component 27 is a reference potential terminal 28, which represents a ground potential for the circuit. Since the junction device 27 can switch between source and drain, the circuit in the present form can be used for both first and second voltage half cycles.
- polarity change circuit 14 is also parallel to the resonant circuit 10 and between the first C 1 25 and the second resonant circuit terminal C 2 26, is a series circuit of polarity change circuit 14 and diodes 19, 20, 21, 22, 23, 24, for driving of the barrier layer component 27 serve.
- the diodes can be realized as NMOS transistors, which are connected as a diode.
- the polarity change circuit 14 consists of two parallel series circuits, each comprising an ohmic resistor R 1 15 and R 2 16 and a diode 17 and 18, wherein the flow direction of the diodes 17, 18 is different.
- the diodes 19 to 24 can be bridged by switches S 1 31, S 2 32, S 3 33, which are actuated by the control circuit 34 via cascading MOD signals MOD 0 , MOD 1 and MOD 2 .
- the switches 31, 32, 33 are preferably realized as transistors, in particular as MOS transistors.
- the barrier layer component 27 initially serves to limit the resonant circuit voltage U L 1 between the terminals 25 and 26 of the transmitting and receiving resonant circuit 10 at open switches 31, 32 and 33. In this state, the junction component 27 limits each case when the potential difference between the reference potential terminal 28th , 30 and one of the terminals 25 or 26 exceeds the forward voltage of the barrier member 27. This value defines the upper limiting voltage or first clamping voltage U KL 2.2. When bridging the diodes 19 to 24 through the switches 31, 32 and 33, which are closed for stepwise modulation of the voltage successively and not simultaneously, the junction member 27 clamps the resonant circuit voltage U L 1 to a lower value UL MOD 2.1.
- the control circuit 34 modulates the value of the resonant circuit voltage U L 1 in accordance with the data sequence to be transmitted. As described, this modulation of the transmitting and receiving resonant circuit 10 of the day forms as a modulation of the load of the transmitting and receiving resonant circuit of the reader under the condition of a transformer coupling.
- FIG. 3 and FIG. 4 show a further transmitting and receiving resonant circuit 10 of a receiving part or day.
- This shows Fig. 3 a circuit for a first voltage half-wave and Fig. 4 the circuit off Fig. 3 for a second voltage half-wave.
- a reference potential terminal 28 represents a ground potential for the circuit.
- a current source I E which in turn provides a discharge current for discharging a capacitance 7 connected in parallel, as well as a voltage source U ref 3.
- a switch S 1 arranged, which is actuated by means of an inverse signal nMOD 4.
- the barrier layer component 35 is used to limit the resonant circuit voltage U L 1 to the value of the upper clamping voltage U KL 2.2 between the terminals 25 and 26 of the transmitting and receiving resonant circuit 10.
- the switch S 1 9 When the switch S 1 9 is closed, lies on the junction component 35, the voltage U ref 3, which is limited by the predetermined voltage U G 6 at the gate and thus can not go beyond the threshold voltage of the PMOS transistor.
- the capacitor 7 is charged to the value U ref 3 and then discharged by means of the discharge current of the current source I E2 8. The consequence of this is that the voltage U G 6 at the gate drops linearly to zero.
- the resonant circuit voltage U L 1 is limited to a second, smaller clamping voltage U LMOD 2.1, which corresponds to the threshold voltage of the PMOS transistor.
- Fig. 5 shows the course of the resonant circuit voltage U L 1 and the course of the respective voltage half- waves U C1 and U C2 at the two resonant circuit connections C 1 25 and C 2 26
- the resonant circuit voltage U L 1 is the difference between the voltage values at the terminals.
- U L U C1 -U C2 .
- UL 1 positive
- the circuit according to Fig.1 and Fig. 3 the resonant circuit terminal C 2 connected via the rectifier 29 with an internal ground 30.
- U L 1 is negative, as shown in the Fig. 2 and Fig. 4 the resonant circuit terminal C 1 26 connected to the internal ground 30.
- Fig. 6 shows a desired course of the resulting oscillatory circuit voltage UL in the receiving resonant circuit under the influence of a controlled load modulation according to the present invention over the time t.
- the large amplitudes 2.2 are set according to open switches 31, 32, 33 Fig. 1 and Fig.2
- One and the small amplitudes 2.1 are established with closed switches 31, 32, 33, with which the diodes 19, 20, 21, 22 are bridged.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Near-Field Transmission Systems (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200610006912 DE102006006912A1 (de) | 2006-02-15 | 2006-02-15 | Verfahren zur Spannungsbegrenzung bei einem Transponder |
EP07002790A EP1821405B1 (fr) | 2006-02-15 | 2007-02-09 | Procédé destiné à limiter la tension dans un transpondeur |
Related Parent Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07002790.9 Division | 2007-02-09 | ||
EP07002790A Division EP1821405B1 (fr) | 2006-02-15 | 2007-02-09 | Procédé destiné à limiter la tension dans un transpondeur |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2139109A1 true EP2139109A1 (fr) | 2009-12-30 |
EP2139109B1 EP2139109B1 (fr) | 2011-01-12 |
Family
ID=37948075
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07002790A Active EP1821405B1 (fr) | 2006-02-15 | 2007-02-09 | Procédé destiné à limiter la tension dans un transpondeur |
EP09009622A Active EP2139109B1 (fr) | 2006-02-15 | 2007-02-09 | Procédé destiné à limiter la tension dans un transpondeur |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07002790A Active EP1821405B1 (fr) | 2006-02-15 | 2007-02-09 | Procédé destiné à limiter la tension dans un transpondeur |
Country Status (3)
Country | Link |
---|---|
US (1) | US7710213B2 (fr) |
EP (2) | EP1821405B1 (fr) |
DE (2) | DE502007006276D1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016058687A1 (fr) * | 2014-10-16 | 2016-04-21 | Giesecke & Devrient Gmbh | Élément de sécurité pourvu d'une diode électroluminescente |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101932519B1 (ko) * | 2011-11-14 | 2018-12-27 | 삼성전자 주식회사 | 휴대 단말기의 근접 인터페이스 커플링 카드 선택 방법 및 장치 |
FR3023434B1 (fr) * | 2014-07-02 | 2017-10-13 | Stmicroelectronics Rousset | Limiteur de tension et de puissance pour transpondeur electromagnetique |
EP2963587B1 (fr) * | 2014-07-04 | 2017-03-15 | Nxp B.V. | Convertisseur de tension |
JP2017063300A (ja) * | 2015-09-24 | 2017-03-30 | エスアイアイ・セミコンダクタ株式会社 | 入力回路 |
US9919677B2 (en) * | 2015-12-03 | 2018-03-20 | Nxp B.V. | Integrated circuit device and method for dual-mode transponder communication protocol |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5815355A (en) * | 1997-10-06 | 1998-09-29 | Atmel Corporation | Modulation compensated clamp circuit |
US20040099738A1 (en) * | 2002-11-21 | 2004-05-27 | Hewlett-Packard Development Company, L.P. | Memory tag and a reader |
US20050156710A1 (en) * | 2002-02-01 | 2005-07-21 | Helmut Kranabenter | Adapting coil voltage of a tag to field strength |
EP1589656A1 (fr) * | 2004-04-22 | 2005-10-26 | ATMEL Germany GmbH | Circuit et procédé de modulation de charge dans un système comportant un circuit résonnant d'émission et un circuit résonnant de réception |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2776865B1 (fr) * | 1998-03-31 | 2000-05-05 | Commissariat Energie Atomique | Dispositif de teletransmission par couplage inductif |
WO1999057681A1 (fr) | 1998-05-05 | 1999-11-11 | Koninklijke Philips Electronics N.V. | Porteuse de donnees possedant des moyens de redressement et des moyens ameliores de limitation de tension |
DE10301451A1 (de) | 2003-01-10 | 2004-07-22 | Atmel Germany Gmbh | Verfahren sowie Sende- und Empfangseinrichtung zur drahtlosen Datenübertragung und Modulationseinrichtung |
-
2007
- 2007-02-09 EP EP07002790A patent/EP1821405B1/fr active Active
- 2007-02-09 DE DE502007006276T patent/DE502007006276D1/de active Active
- 2007-02-09 DE DE502007002450T patent/DE502007002450D1/de active Active
- 2007-02-09 EP EP09009622A patent/EP2139109B1/fr active Active
- 2007-02-15 US US11/706,403 patent/US7710213B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5815355A (en) * | 1997-10-06 | 1998-09-29 | Atmel Corporation | Modulation compensated clamp circuit |
US20050156710A1 (en) * | 2002-02-01 | 2005-07-21 | Helmut Kranabenter | Adapting coil voltage of a tag to field strength |
US20040099738A1 (en) * | 2002-11-21 | 2004-05-27 | Hewlett-Packard Development Company, L.P. | Memory tag and a reader |
EP1589656A1 (fr) * | 2004-04-22 | 2005-10-26 | ATMEL Germany GmbH | Circuit et procédé de modulation de charge dans un système comportant un circuit résonnant d'émission et un circuit résonnant de réception |
DE102004020816A1 (de) | 2004-04-22 | 2005-11-17 | Atmel Germany Gmbh | Verfahren und Schaltung zur Lastmodulation in einer Verbindung aus einem Sendeschwingkreis und einem Empfangsschwingkreis |
Non-Patent Citations (2)
Title |
---|
"Circuitry for a wireless micorsystem for neural recording microprobes", ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING, vol. 1, 23 October 2001 (2001-10-23), pages 761 - 764 |
RAO YU ET AL: "Circuitry for a wireless microsystem for neural recording microprobes", PROCEEDINGS OF THE 23RD. ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN MEDICINE AND BIOLOGY SOCIETY. 2001 CONFERENCE PROCEEDINGS. (EMBS). INSTANBUL, TURKEY, OCT. 25 - 28, 2001, ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN M, vol. VOL. 1 OF 4. CONF. 23, 25 October 2001 (2001-10-25), pages 761 - 764, XP010593486 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016058687A1 (fr) * | 2014-10-16 | 2016-04-21 | Giesecke & Devrient Gmbh | Élément de sécurité pourvu d'une diode électroluminescente |
US10231299B2 (en) | 2014-10-16 | 2019-03-12 | Giesecke+Devrient Mobile Security Gmbh | Secure element having a light emitting diode |
Also Published As
Publication number | Publication date |
---|---|
US20070194928A1 (en) | 2007-08-23 |
DE502007002450D1 (de) | 2010-02-11 |
EP1821405B1 (fr) | 2009-12-30 |
US7710213B2 (en) | 2010-05-04 |
EP2139109B1 (fr) | 2011-01-12 |
DE502007006276D1 (de) | 2011-02-24 |
EP1821405A1 (fr) | 2007-08-22 |
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