EP2051089A2 - System und Verfahren zur automatischen Detektion von einzelnen Fehlern in gemeinsamen Dioden-Energiebusschaltungen - Google Patents

System und Verfahren zur automatischen Detektion von einzelnen Fehlern in gemeinsamen Dioden-Energiebusschaltungen Download PDF

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Publication number
EP2051089A2
EP2051089A2 EP08251378A EP08251378A EP2051089A2 EP 2051089 A2 EP2051089 A2 EP 2051089A2 EP 08251378 A EP08251378 A EP 08251378A EP 08251378 A EP08251378 A EP 08251378A EP 2051089 A2 EP2051089 A2 EP 2051089A2
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EP
European Patent Office
Prior art keywords
diode
circuit
voltage pulse
power bus
singular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP08251378A
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English (en)
French (fr)
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EP2051089B1 (de
EP2051089A3 (de
Inventor
Steven A. Avritch
Gary L. Hess
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Hamilton Sundstrand Corp
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Hamilton Sundstrand Corp
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Publication date
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Publication of EP2051089A2 publication Critical patent/EP2051089A2/de
Publication of EP2051089A3 publication Critical patent/EP2051089A3/de
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Publication of EP2051089B1 publication Critical patent/EP2051089B1/de
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40—Testing power supplies

Definitions

  • the present invention is related to input power management, and more specifically to test circuitry for automatically detecting singular faults in diode or'd power bus circuits.
  • a number of applications such as safety critical avionics, make use of independent, redundant power input sources.
  • another of the available redundant power input sources is employed to ensure an uninterrupted supply of power.
  • FIG. 1 is a circuit diagram illustrating a common diode or'd power bus circuit configuration used to combine independent, redundant power input sources into a common internal source.
  • the diode or'd power bus circuit consists of a number of power diodes (labeled PD1-PDN), each connected to one of the redundant power input sources.
  • the redundant power source providing the highest quality power causes the associated diode to conduct, resulting in the highest level of quality power being propagated through the diode or'd power bus circuit and provided as the internal power source.
  • the remainder of the power diodes within the diode power input circuit provide isolation to prevent the remaining input sources from sinking power from the internal power source (i.e., the other diodes would be in a non-conducting state).
  • the system includes a diode test circuit that selectively applies a voltage pulse to one of the plurality of diodes within the diode or'd power bus circuit and detects singular faults based on the monitored response of the diode or'd power bus circuit to the voltage pulse.
  • the present invention provides a test circuit for automatically detecting singular faults in a diode or'd power bus circuit (i.e., failed power diodes).
  • the test circuit includes a charge-up circuit for developing a voltage pulse and a diode test circuit for selectively applying the voltage pulse to a power diode within the diode or'd power bus circuit. After delivering the voltage pulse to one of the power diodes, the test circuit monitors the output of the diode or'd power bus circuit to determine whether the voltage pulse was propagated through the power diode to which the voltage pulse was applied. A voltage pulse that propagates through the diode or'd power bus circuit indicates that the power diode to which the pulse was applied is working properly. In this way, the test circuit is able to detect singular faults within the diode or'd power bus circuit.
  • FIG. 2 is a circuit diagram illustrating an exemplary embodiment of power bus system 10, which includes diode or'd power bus circuit 12, singular fault detection circuit 14 and controller 16.
  • singular fault detection circuit 14 is connected on an input side of diode or'd power bus circuit 12 between each power source and an associated power diode PD1-PDN.
  • Singular fault detection circuit 14 is also connected on an output side of diode or'd power bus circuit 12 to monitor the voltage provided by diode or'd power bus circuit 12.
  • controller 16 is connected to communicate with singular fault detection circuit 14.
  • controller 16 provides control instructions to singular fault detection circuit 14.
  • singular fault detection circuit 14 develops a voltage pulse and selectively delivers the voltage pulse to one of the plurality of power diodes PD1-PDN.
  • the magnitude of the voltage pulse provided by singular fault detection circuit 14 is greater in magnitude than the power provided by any one of the power bus sources. In this way, the voltage pulse causes the power diode to which it is applied to momentarily conduct (if it is working properly), resulting in the voltage pulse being propagated through diode or'd power bus circuit 12.
  • Singular fault detection circuit 14 monitors the output voltage provided by diode or'd power bus circuit 12 to detect whether the voltage pulse has been propagated through the selected power diode to which it was applied.
  • Detection of the pulse on the output side of diode or'd power bus circuit 12 indicates that the power diode tested is operational and functioning properly.
  • the result of the test i.e., whether the voltage pulse was detected on the output of diode or'd power bus circuit 12 is communicated to controller 16.
  • a complete test of diode or'd power bus circuit 12 includes applying a test pulse to each power diode PD1-PDN individually. This may be done sequentially by applying a voltage test pulse to first power diode PD1, monitoring the resulting output voltage to determine if power diode PD 1 was able to conduct, and repeating the test for each power diode included within diode or'd power bus circuit 12.
  • the order in which power diodes PD1-PDN are tested is determined by controller 16, which communicates control instructions to singular fault detection circuit 14 to selectively apply voltage pulses in a deterministic manner to each power diode within diode or'd power bus circuit 12.
  • controller 16 determines whether any singular faults exist within power bus diode circuit 12.
  • Testing of diode or'd power bus circuit 12 may be initiated manually or automatically.
  • a maintenance worker or pilot may provide a signal to controller 16 to initialize a test of diode or'd power bus circuit 12.
  • Controller 16 implements the test and provides the results of the test (i.e., whether any singular faults were detected) back to the pilot or maintenance worker.
  • controller 16 is configured to automatically initialize a test upon start-up of the system or at some other predetermined schedule.
  • a benefit of the automatic initialization of a test is that integrity of the diode power bus input is validated (or faults detected) prior to each take-off.
  • controller 16 may be implemented with a Field Programmable Gate Array (FPGA) that is programmed to provide the desired control instructions and to respond to the outputs provided by singular fault detection circuit 14.
  • FPGA Field Programmable Gate Array
  • controller 16 may be implemented with a combination of hardware and/or software components capable of controlling the selective application of voltage pulses to diode power bus input 12, and detecting singular faults within diode power bus input 12 based on the response to the selective application of voltage pulses.
  • FIGS. 3A and 3B are circuit diagrams that illustrate an exemplary embodiment of singular fault detection circuit 14, which includes charge-up circuit 20 (shown in FIG. 3A ) and diode test circuit 22 (shown in FIG. 3B ).
  • FIG. 3A is a circuit diagram of an exemplary embodiment of charge-up circuit 20, which generates the voltage pulse that is applied to the input side of diode or'd power bus circuit 12 (as shown in FIG. 2 ).
  • charge-up circuit 20 includes resistors R1, R2, R3, R4 and R5, capacitors C1, C2, C3, C5, and C6, diodes D1, D2 and D3 (different from the power diodes shown in FIG. 2 ), inductor I1, and transformer T1.
  • Alternating current (AC) power is connected to provide energy to transformer T1.
  • the alternating current power provided by the transformer secondary conducts through diodes D1 and D3, causing voltage to buildup in capacitors C5 and C6.
  • a large voltage potential can be generated in capacitors C5 and C6 and made available as an output (labeled here as 'Voltage Pulse').
  • SMPSs switch-mode power supplies
  • the magnitude of the voltage pulse developed by charge-up circuit 20 is dependent on the application, and in particular on the magnitude of voltages supplied by the input power buses.
  • the magnitude of the voltage pulse should be greater than the magnitude of the power bus sources such that application of the voltage pulse to diode or'd power bus circuit 12 will cause the power diode to which it is applied to momentarily conduct the voltage pulse.
  • FIG. 3B is a circuit diagram of an exemplary embodiment of diode test circuit 22, which selectively applies the voltage pulse generated by charge-up circuit 20 to one of the plurality of power diodes.
  • diode test circuit 22 monitors the output voltage provided by the power diodes to detect whether the voltage pulse applied to the input side of diode or'd power bus circuit 12 was propagated to the output side of diode or'd power bus circuit 12.
  • diode test circuit 22 is connected to deliver voltage pulses (labeled 'Voltage Pulse') to power diodes PD1 and PD2 included within diode or'd power bus circuit 12 and to monitor the resulting voltage generated as an output of diode or'd power bus circuit 12.
  • voltage pulses labeled 'Voltage Pulse'
  • FIG. 3B only two power diodes PD1 and PD2 are shown, although the concepts described could be extended to embodiments having more power diodes included within diode or'd power bus circuit 12.
  • diode test circuit 22 shown in FIG. 3B includes test enabler circuit 24, diode selection circuit 26, voltage pulse validation circuit 28, voltage pulse detection circuit 30, and power supply bus circuit 32.
  • diode test circuit 22 is connected to receive control signals (i.e., instructions) from controller 16 and to provide outputs signals to controller 16 (shown in FIG. 2 ).
  • test enable circuit 24 is connected to receive as input the voltage pulse (labeled 'Voltage Pulse') developed by charge-up circuit 20 and a control signal provided by controller 16 (labeled 'Enable Signal').
  • the voltage pulse is provided across field effect transistor (FET) M1, which acts as a switching device that selectively provides the voltage pulse to diode selection circuit 26.
  • FET field effect transistor
  • the enable signal is connected to the base of bipolar junction transistor (BJT) Q1, which in turn is connected to the gate of FET M1.
  • BJT bipolar junction transistor
  • controller 16 determines whether the voltage pulse is applied to diode selection circuit 26. For instance, to initialize a test, controller 16 would generate an enable signal such that the voltage pulse provided by charge-up circuit 20 is applied to diode selection circuit 26.
  • Diode selection circuit 26 determines to which power diode (in this case power diode D 1 or power diode D2) the voltage pulse should be applied.
  • Control signals (labeled 'Select Diode PD1' and 'Select Diode PD2') provided by controller 16 to BJT Q2 and BJT Q3, respectively, control the operation of transistors M2 and M3.
  • controller 16 applies control signal 'Select Diode PD1' to the base of BJT Q2, which in turn causes transistor M2 to conduct and the voltage pulse to be selectively applied to power diode PD 1. In this way, the voltage pulse can be selectively applied to a power diode within diode or'd power bus circuit 12.
  • Voltage pulse validation circuit 28 is connected to monitor the voltage provided by test enable circuit 24 and diode selection circuit 26. In particular, voltage pulse validation circuit 28 monitors whether a voltage pulse is delivered to diode or'd power bus circuit 12 and generates in response output signals that are provided to controller 16. In this way, voltage pulse validation circuit 28 provides a means of validating the test of a particular power diode by ensuring that a voltage pulse was in fact delivered to a selected power diode as desired.
  • voltage pulse testing circuit 28 includes three comparators Comp1, Comp2, and Comp3 connected to monitor the output of test enable circuit 24 and the output from each transistor M2 and M3 of diode selection circuit 26, respectively.
  • Each comparator circuit compares the monitored voltage to a threshold value to determine if the voltage pulse was propagated.
  • a divider network consisting of two or more resistors (e.g., resistors R15 and R16 connected between the monitored voltage and comparator Comp1) are used to reduce the magnitude of the voltage pulse to a lower voltage before being applied to one of the comparator circuits.
  • a properly delivered voltage pulse provided by test enable circuit 24 will result in the voltage monitored by comparator Comp 1 exceeding the threshold voltage V th .
  • comparator Comp 1 will generate an output signal (labeled 'Enable Check') that indicates that the voltage pulse was properly delivered to diode selection circuit 26.
  • comparators Comp2 and Comp3 monitor the voltage provided by transistors M2 and M3 to detect whether the voltage pulse is propagated through diode selection circuit 26 as desired to diode or'd power bus circuit 12. Comparators Comp2 and Comp3 generate check signals (labeled "Diode PD 1 Check” and "Diode PD2 Check", respectively) indicating whether the voltage pulse was properly applied to the selected diode.
  • each comparator indicating whether the voltage pulse was detected, is provided to controller 16, which uses the outputs provided by comparators Comp 1, Comp2 and Comp3 to validate the results of a test. For instance, if power diode PD 1 is being tested, and the output of Comp2 (labeled "Diode PD1 Check") indicates that no voltage pulse was delivered to power diode PD1, then controller 16 will not treat the inability to detect a voltage pulse on the output of diode or'd power bus circuit 12 as necessarily indicative of a failure of the power diode being tested.
  • Voltage pulse detection circuit 30 monitors the voltage of diode or'd power bus circuit 12 to determine if a voltage pulse applied to either power diode PD 1 or power diode PD2 was propagated through as desired.
  • Comparator circuit Comp4 compares the monitored voltage to a threshold voltage V th .
  • a voltage divider network including resistors R24 and R25 is used to reduce the magnitude of the monitored voltage to a level that can be applied to comparator Comp4.
  • comparator Comp4 will generate an output signal (labeled 'Output Pulse Detection Signal') indicating that the voltage pulse was detected and that the power diode circuit being tested is working properly.
  • the detection of (or failure to detect) the voltage pulse is communicated to controller 16.
  • controller 16 Based on the outputs generated by diode test circuit 22, controller 16 is able to detect singular faults within diode or'd power bus circuit 12.
  • the threshold voltage Vth used by comparator Comp4 may be the same threshold used by comparators Comp1-Comp3 as described with respect to voltage pulse testing circuit 28.
  • power supply circuit 32 generates an internal power source based on the power input source (either power input source #1 or power input source #2) selected by power selection circuit 12.
  • Power supply circuit 32 includes a number of inductors I2, I3, I4, I5 and I6, and a number of capacitors C7, C8, C9, C10, C11, C12, C 13 and C 14 that operate to regulate the power bus output to a desirable magnitude and quality.
  • power supply circuit 32 removes ripples and variations in the output power caused by the application of voltage pulses to the input of diode or'd power bus circuit 12.
  • the internal power source is provided as an input to any number of systems or sub-systems, depending on the application.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Small-Scale Networks (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
EP08251378.9A 2007-10-15 2008-04-09 System und Verfahren zur automatischen Detektion von einzelnen Fehlern in gemeinsamen Dioden-Energiebusschaltungen Expired - Fee Related EP2051089B1 (de)

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US11/974,620 US7868637B2 (en) 2007-10-15 2007-10-15 System and method for automated detection of singular faults in diode or'd power bus circuits

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EP2051089A2 true EP2051089A2 (de) 2009-04-22
EP2051089A3 EP2051089A3 (de) 2012-09-05
EP2051089B1 EP2051089B1 (de) 2013-10-16

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CN102326090B (zh) * 2009-02-20 2013-12-11 Qmc株式会社 Led芯片测试装置
US8495423B2 (en) * 2009-08-11 2013-07-23 International Business Machines Corporation Flash-based memory system with robust backup and restart features and removable modules
TWI414794B (zh) * 2010-03-12 2013-11-11 Hon Hai Prec Ind Co Ltd 交流電源量測電路
JP6775401B2 (ja) * 2016-12-09 2020-10-28 日立オートモティブシステムズ株式会社 診断回路

Citations (2)

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Publication number Priority date Publication date Assignee Title
US4156189A (en) 1977-09-12 1979-05-22 Honeywell Information Systems Inc. Power supply fault analyzer
US20040039536A1 (en) 2002-06-06 2004-02-26 Garnett Paul J. Latent fault detection in redundant power supply systems

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Publication number Priority date Publication date Assignee Title
CH574113A5 (de) * 1973-08-31 1976-03-31 Siemens Ag
US3904962A (en) * 1974-10-21 1975-09-09 Bell Telephone Labor Inc Impatt diode testing
CA1162611A (en) * 1978-12-15 1984-02-21 Shohichi Kamata Diode faults detecting apparatus
US4775640A (en) * 1987-05-01 1988-10-04 American Telephone And Telegraph Company Electronic device test method and apparatus
US5399956A (en) * 1992-02-03 1995-03-21 Motorola, Inc. Backup battery system for a portable electronic device
US5444390A (en) * 1994-02-02 1995-08-22 Texas Digital Systems, Inc. Means and method for sequentially testing electrical components
JP3711360B2 (ja) * 1999-02-10 2005-11-02 ナストーア株式会社 ダイオード不良検出装置
JP3882773B2 (ja) * 2003-04-03 2007-02-21 ソニー株式会社 画像表示装置、駆動回路装置および発光ダイオードの不良検出方法

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
US4156189A (en) 1977-09-12 1979-05-22 Honeywell Information Systems Inc. Power supply fault analyzer
US20040039536A1 (en) 2002-06-06 2004-02-26 Garnett Paul J. Latent fault detection in redundant power supply systems

Also Published As

Publication number Publication date
EP2051089B1 (de) 2013-10-16
EP2051089A3 (de) 2012-09-05
US7868637B2 (en) 2011-01-11
US20090096479A1 (en) 2009-04-16

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