EP1950648B1 - Souris sans fil a economie d'energie - Google Patents

Souris sans fil a economie d'energie Download PDF

Info

Publication number
EP1950648B1
EP1950648B1 EP06761307.5A EP06761307A EP1950648B1 EP 1950648 B1 EP1950648 B1 EP 1950648B1 EP 06761307 A EP06761307 A EP 06761307A EP 1950648 B1 EP1950648 B1 EP 1950648B1
Authority
EP
European Patent Office
Prior art keywords
switching transistor
diode
module
circuit
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP06761307.5A
Other languages
German (de)
English (en)
Other versions
EP1950648A4 (fr
EP1950648A1 (fr
Inventor
Junzhi Unit A 13-16/F YANG
Pengchao Unit A 13-16/F ZAN
Wei Unit A 13-16/F WU
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Skyworth RGB Electronics Co Ltd
Original Assignee
Shenzhen Skyworth RGB Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Skyworth RGB Electronics Co Ltd filed Critical Shenzhen Skyworth RGB Electronics Co Ltd
Publication of EP1950648A1 publication Critical patent/EP1950648A1/fr
Publication of EP1950648A4 publication Critical patent/EP1950648A4/fr
Application granted granted Critical
Publication of EP1950648B1 publication Critical patent/EP1950648B1/fr
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3259—Power saving in cursor control device, e.g. mouse, joystick, trackball
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/0354—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
    • G06F3/03543—Mice or pucks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to a mouse, more particularly to a wireless mouse.
  • a power-saving wireless mouse as defined in the preamble portion of patent claim 1 or 2 is known from US 2003/197488 A1 .
  • FIG. 1 is a structural principle view of a wireless mouse transmitter in the prior art, which includes an input module, a CPU, an instruction coding module, a transmission module, and a transmission antenna.
  • the CPU When receiving an instruction from the input module, the CPU outputs the received instruction to the instruction coding module.
  • the instruction coding module encodes and then outputs the instruction to the transmission module.
  • the transmission module receives the encoded instruction and transmits the instruction through the transmission antenna.
  • a receiver antenna receives a signal transmitted from the transmitter, and then transfers the signal to an instruction decoding module for being decoded there via a receiver module. After being decoded, the signal is transferred to a computer host via an interface module.
  • a wireless mouse takes two ordinary dry batteries as the power, and the power circuit is always turned on, regardless whether the mouse is clicked or not. As a result, a great deal of power is consumed, and a lot of energy is wasted. Two batteries can be used for merely 4-5 days and must be replaced frequently, which causes great inconveniences for the user and increases the cost.
  • the Chinese Patent Application entitled “WIRELESS MOUSE WITH POWER SAVER AND POWER SAVING METHOD”, (Application NO. 02119345.2, Publication Date: 2003-11-26 , Publication NO. CN1458573A ) discloses a wireless mouse with an idle mode, a power-saving mode, and a deep power-saving mode in the background of the invention, and further discloses a wireless mouse with an idle mode and a power-saving mode.
  • the above two solutions are based upon the same power-saving principle, that is, the mouse consumes different amount of electricity in different modes. In the above methods, through the power-saving mode or the deep power-saving mode, much power is saved indeed.
  • US2003/0197488A1 discloses a wireless interface device for servicing communications between a wirelessly enabled host and at least one user input device.
  • the wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit.
  • the wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol.
  • the power management unit operably couples to the wireless interface unit, the processing unit, and the input/output unit.
  • the wireless interface unit supports paging operations in which the wireless interface device is able to receive a page during a wirelessly enabled host in a page scanning period that corresponds to a duration of the page hopping sequence of the host.
  • EP0910006A2 discloses a power supply control apparatus.
  • the control apparatus includes a power supply unit and a control unit.
  • an X-encoder and a Y-encoder attached to the mouse stop outputting of pulse signals.
  • the control unit allows a timer to start according to stopping of the pulse signals from the X-encoder and the Y-encoder.
  • the timer outputs a timing signal to the control unit.
  • the control unit controls the power supply unit so as to lower the power supplied from a battery in the power supply from normal level to a predetermined lower level or zero level.
  • the present invention provides a power-saving wireless mouse, which has advantages of a significant power-saving effect, reduced cost, and convenience in usage.
  • the present invention provides a triggering power circuit for a power-saving wireless mouse as claimed in independent claims 1 and 2.
  • the present invention further includes a triggering power circuit, and when the input module sends out an instruction, the triggering power module charges inside and triggers a power circuit of the CPU, the transmission module, and the transmission antenna in a turn-on state through the output end thereof, and the mouse works normally.
  • the input module dose not send out an instruction
  • the triggering power module discharges inside, and maintains the power circuit in a turn-on state, so as to keep a high sensitivity of the mouse.
  • the triggering power module finishes discharging inside the power circuit turns off, and at this time, no energy is consumed by the mouse. Therefore, the consumed power energy is greatly reduced, the life of the battery is prolonged, the user does not need to replace the battery frequently, and the cost thereof is significantly reduced.
  • the triggering power circuit of the present invention includes a charge-discharge circuit and a switch circuit.
  • a button of the input module When a button of the input module is clicked, the power supply is turned on, and meanwhile, the charge-discharge circuit is charged.
  • the charge-discharge circuit When the button is not clicked, the charge-discharge circuit is discharged, such that the gate terminal of the switch circuit maintains a certain voltage, the switch circuit is still in a turn-on state, and the CPU, the transmission module, and the transmission antenna still work normally. If there is still no click motion after a certain time period, when the discharging motion is substantially finished, the switch circuit turns off, and the CPU, the transmission module, and the transmission antenna are turned off automatically.
  • the high response sensitivity of the mouse is maintained during a certain time period that the mouse is idle, and when the mouse is idle for a relatively long time period, the relevant circuits are automatically turned off, and thus realizing the purpose of saving power, saving the energy consumed by the mouse, prolonging the life of the battery, and thus, the user does not need to replace the battery frequently, and the cost is significantly reduced. For example, it takes 100 ms to click the mouse once, and the discharging process costs 1 s, if the user clicks the mouse once per 10 s, two ordinary batteries that merely can be used for 5 days originally can be used for 50 days after adopting the solution of the present invention. If the user clicks the mouse once per 30 s, two ordinary batteries that merely can be used for 5 days originally can be used for 150 days after adopting the solution of the present invention, and the life thereof is prolonged for almost 30 times.
  • the technical solution of the present invention has advantages of a simple circuit structure, a low cost, and easily realized.
  • the balance between achieving the power-saving effect and maintaining a high sensitivity of the mouse can be conveniently achieved through changing nominal values of the first capacitor and/or the first resistor of the charge-discharge circuit and controlling the charge level and discharging time.
  • the present invention is further added with a triggering power module 33, which is connected to the input module 32, the CPU 34, the transmission module 36, and the transmission antenna 37.
  • a triggering power module 33 When the input module 32 sends out an instruction, the power supply 31 is turned on, the triggering power module 33 triggers the CPU 34, the transmission module 36, and the transmission antenna 37 into a turn-on state to work normally.
  • the triggering power module 33 When the input module 32 does not send out an instruction, the triggering power module 33 is cut off from the power supply 31 and discharges inside, but still maintains a normal working state. If there is still no click motion after a certain time period, when the circuit finishes discharging process, the whole circuit is turned off automatically.
  • FIG 4 is a circuit principle diagram of a wireless mouse transmitter according to an embodiment of the present invention.
  • the triggering power module 33 includes a switch circuit and a charge-discharge circuit.
  • the switch circuit includes a fourth diode D4, a fifth diode D5, a sixth diode D6, a silicon controlled rectifier K, a second resistor R2, a third resistor R3, a first field-effect transistor Q1, a second field-effect transistor Q2, and a third field-effect transistor Q3.
  • the charge-discharge circuit includes a first capacitor C1 and a first resistor R1. Anode terminals of the fourth diode D4, the fifth diode D5, and the sixth diode D6 are respectively connected to three buttons of the input module.
  • Cathode terminals of the fourth diode D4, the fifth diode D5, and the sixth diode D6 are all connected to a gate terminal of the silicon controlled rectifier K in parallel.
  • An anode terminal of the silicon controlled rectifier K is connected to a positive terminal of a power supply, and a cathode terminal of the silicon controlled rectifier K is connected to an anode terminal of the first capacitor.
  • a gate terminal of the second field-effect transistor Q2 is connected to a drain of the first field-effect transistor Q1.
  • a drain of the second field-effect transistor Q2 is connected to a gate terminal of the third field-effect transistor Q3.
  • the first capacitor C1 and the first resistor R1 are both connected between the gate and the source of the first field-effect transistor Q1 in parallel, and both of them are grounded (i.e., the negative terminal of the power supply).
  • a drain of the third field-effect transistor Q3 is connected to a low potential of the CPU, the transmission module, and the transmission antenna.
  • a first diode D1, a second diode D2, and a third diode D3 are disposed between the output end of the output module and the input end of the CPU to prevent the current from flowing from the CPU towards the triggering power circuit.
  • the current does not flow from the CPU towards the triggering power module 33, due to the unidirectional conduction feature of the first diode D1, the second diode D2, and the third diode D3.
  • the current flows towards the gate terminal of the silicon controlled rectifier K via a corresponding diode (D4, D5, or D6), and the silicon controlled rectifier K is conducted.
  • the silicon controlled rectifier K charges the first capacitor C1, such that the gate of the first field-effect, transistor Q1 maintains a certain voltage, and the first field-effect transistor Q1 is turned on.
  • the drain of the first field-effect transistor Q1 is at a low potential, the second field-effect transistor Q2 cuts off, the gate of the third field-effect transistor Q3 is at a high level, and the third field-effect transistor Q3 is turned on. If there is still no click motion after a certain time period, when the capacitor substantially finishes the discharging process, the voltage at the gate of the first field-effect transistor is too low, the first field-effect transistor Q1 cuts off, the second field-effect transistor Q2 is turned on, and the third field-effect transistor Q3 cuts off. The whole circuit is turned off automatically, and at this time, the mouse does not consume any energy. When the user clicks the button again, the circuit is automatically turned on, which does not influence the usage at all.
  • the discharging time thereof can be prolonged. Furthermore, by increasing the resistance of the first resistor R1, the discharging time of the first capacitor C1 can be prolonged as well. Accordingly, even if the user does not click the button for a long time, the mouse still maintains high response sensitivity.
  • the first field-effect transistor Q1, the second field-effect transistor Q2, the third field-effect transistor Q3 may also be a junction field-effect transistor, an insulated gate field-effect transistor, or other field-effect transistors being controlled by a certain voltage, such as 3018.
  • the input module 32 may have two, three, or more buttons. If the number of buttons is increased, the number of diodes in the switch circuit should be increased correspondingly, so as to realize the same function.
  • FIG 5 shows another embodiment of the present invention, and the difference between the second embodiment and the first embodiment lies in that, the second embodiment does not use the fourth diode D4, the fifth diode D5, and the sixth diode D6 to prevent the first capacitor C1 from discharging the CPU 34, but adopts a gang double-pole switch on the input module 32 (mouse buttons).
  • the first capacitor C1 and the CPU 34 are disconnected to prevent the first capacitor C1 from discharging the CPU 34, and thus realizing the same effect, and meanwhile reducing the implementation cost of the present invention.
  • the discharging time can be prolonged.
  • the discharging time of the first capacitor C1 can be prolonged as well. Accordingly, even if the user does not click the button for a long time, the mouse still maintains high response sensitivity.
  • FIG. 6 is a circuit principle diagram of a wireless mouse transmitter according to an example of the present invention.
  • the triggering power module 33 includes a switch circuit and a charge-discharge circuit.
  • the switch circuit includes a fourth diode D4, a fifth diode D5, a sixth diode D6, and a first field-effect transistor Q1.
  • the charge-discharge circuit includes a first capacitor C1 and a first resistor R1.
  • Anode terminals of the fourth diode D4, the fifth diode D5, and the sixth diode D6 are respectively connected to three buttons of the input module.
  • Cathode terminals of the fourth diode D4, the fifth diode D5, and the sixth diode D6 are all connected to a gate ofthe first field-effect transistor Q1 in parallel.
  • the first capacitor C1 and the first resistor R1 are connected between the gate and source of the first field-effect transistor Q1 in parallel and both of them are grounded (i.e., the negative terminal of the power supply).
  • a drain of the first field-effect transistor Q1 is connected to the low potential of the CPU, the transmission module, and the transmission antenna.
  • a first diode D1, a second diode D2, and a third diode D3 are disposed between the output end of the output module and the input end of the CPU, so as to prevent the current from flowing from the CPU towards the triggering power circuit.
  • the current does not flow from the CPU towards the triggering power module 33, due to the unidirectional conduction feature of the first diode D1, the second diode D2, and the third diode D3. Furthermore, due to the unidirectional conduction feature of the third diode D3 and the fourth diode D4, the first capacitor C1 does not discharge the CPU 34, but merely discharges the first resistor R1, such that the gate of the first field-effect transistor Q1 maintains a certain voltage, and the first field-effect transistor Q1 still maintains being turned on.
  • the first field-effect transistor Q1, the second field-effect transistor Q2, the third field-effect transistor Q3 may also be a junction field-effect transistor, an insulated gate field-effect transistor, or other field-effect transistors being controlled by a certain voltage, such as 3018.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Position Input By Displaying (AREA)

Claims (3)

  1. Un circuit d'alimentation électrique à déclenchement (33) utilisé sur souris économique sans fil, ladite souris comprenant un dispositif émetteur et un dispositif récepteur, ledit dispositif émetteur et ledit dispositif récepteur étant reliés sans fil ; ledit dispositif émetteur comprenant un module d'entrée (32), une unité centrale de traitement (34), un module d'encodage d'instructions (35), un module émetteur (36) et un antenne émettrice (37), ladite unité centrale de traitement (34) ayant reçu les instructions du module d'entrée (32), elle l'envoie au module d'encodage d'instructions (35) et une fois que le module d'encodage d'instructions (35) a encodé les instructions entrantes il les envoie au module émetteur (36), après avoir reçu les instructions encodées, le module émetteur (36) émettant via l'antenne émettrice (37) ; caractérisé en ce que :
    Ledit circuit d'alimentation électrique à déclenchement (33) comprend un circuit de commutation et un circuit de charge/décharge, l'extrémité d'entrée de signal de commande dudit circuit de commutation est connectée à l'extrémité de sortie dudit module d'entrée (32), le troisième transistor de commutation (Q3) dudit circuit de commutation commande la connexion entre l'extrémité de sortie (SGND) du circuit de commutation et la terre ;
    Ledit circuit de charge/décharge comprend un premier condensateur (C1) et une première résistance (R1) en parallèle ;
    Ledit circuit de commutation comprend un redresseur au silicium commandé (K), un premier transistor de commutation (Q1), un deuxième transistor de commutation (Q2), un troisième transistor de commutation (Q3), un quatrième transistor de commutation (Q4), une quatrième diode (D4), une cinquième diode (D5) et une sixième diode (D6), le pôle positif de ladite quatrième diode (D4), le pôle positif de ladite cinquième diode (D4) et le pôle positif de ladite sixième diode (D6) étant respectivement connectés en tant qu'extrémité d'entrée de signal de commande dudit circuit de commutation à la première touche, la deuxième touche et la troisième touche dudit module d'entrée, le pôle négatif de ladite quatrième diode (D4), le pôle négatif de ladite cinquième diode (D5) et le pôle négatif de ladite sixième diode (D6) étant connectés en série à l'électrode de commande du redresseur au silicium commandé (K), le pôle positif dudit redresseur au silicium commandé (K) étant connecté au pôle positif de l'alimentation (VDD), le pôle négatif étant connecté à l'électrode de commande dudit premier transistor de commutation (Q1), le premier condensateur (C1) et la première résistance (R1) dudit circuit de charge/décharge étant connectés en parallèle à l'électrode de commande dudit premier transistor de commutation (Q1) ;
    Ledit premier transistor de commutation (Q1), ledit deuxième transistor de commutation (Q2) et ledit troisième transistor de commutation (Q3) sont tous des transistors à effet de champ ; la source du premier, du deuxième et du troisième transistor de commutation constitue la deuxième extrémité dudit circuit de commutation et lesdits premier, deuxième et troisième transistors de commutation sont connectés en série à la terre, le drain dudit premier transistor de commutation est connecté à la grille dudit deuxième transistor de commutation, le drain dudit deuxième transistor de commutation est connecté à la grille dudit troisième transistor de commutation, la grille dudit troisième transistor de commutation constitue ladite extrémité de sortie dudit circuit de commutation, la grille dudit premier transistor de commutation (Q1) est couplée au pôle positif dudit redresseur au silicium commandé (K) via une deuxième résistance (R2), le drain dudit deuxième transistor de commutation (Q2) est couplé au pôle positif dudit redresseur au silicium commandé (K) via une troisième résistance (R3).
  2. Un circuit d'alimentation électrique à déclenchement (33) utilisé sur souris économique sans fil, ladite souris comprenant un dispositif émetteur et un dispositif récepteur, ledit dispositif émetteur et ledit dispositif récepteur étant reliés sans fil ; ledit dispositif émetteur comprenant un module d'entrée (32), une unité centrale de traitement (34), un module d'encodage d'instructions (35), un module émetteur (36) et un antenne émettrice (37), ladite unité centrale de traitement (34) ayant reçu les instructions du module d'entrée (32), elle l'envoie au module d'encodage d'instructions (35), une fois que le module d'encodage d'instructions (35) a encodé les instructions entrantes il les envoie au module émetteur (36), après avoir reçu les instructions encodées, le module émetteur (36) émettant via l'antenne émettrice (37) ; caractérisé en ce que :
    Ledit circuit d'alimentation électrique à déclenchement (33) comprend un circuit de commutation et un circuit de charge/décharge, l'extrémité d'entrée de signal de commande dudit circuit de commutation est connecté à l'extrémité de sortie dudit module d'entrée (32), le troisième transistor de commutation (Q3) dudit circuit de commutation commande la connexion entre l'extrémité de sortie (SGND) du circuit de commutation et la terre ;
    Ledit circuit de commutation et un circuit de charge/décharge comprend un premier condensateur (C1) et une première résistance (R1) en parallèle ;
    Ledit circuit de commutation comprend un premier commutateur bipolaire couplé (S1) connecté à la première touche dudit module d'entrée, un deuxième commutateur bipolaire couplé (S2) connecté à la deuxième touche dudit module d'entrée, un troisième commutateur bipolaire couplé (S3) connecté à la troisième touche dudit module d'entrée, un premier transistor de commutation (Q1), un deuxième transistor de commutation (Q2) et un troisième transistor de commutation (Q3), après mise en parallèle dudit premier commutateur bipolaire couplé, du deuxième commutateur bipolaire couplé et du troisième commutateur bipolaire couplé, une extrémité est connectée au pôle positif de l'alimentation (VDD), l'autre extrémité est couplée à l'électrode de commande dudit premier transistor de commutation (Q1), le premier condensateur (C1) et la première résistance (R1) dudit circuit de charge/décharge sont connectés en parallèle entre le premier transistor de commutation (Q1) et la terre ;
    Ledit premier transistor de commutation (Q1), ledit deuxième transistor de commutation (Q2) et ledit troisième transistor de commutation (Q3) sont tous des transistors à effet de champ ; la source du premier, du deuxième et du troisième transistor de commutation constitue la deuxième extrémité dudit circuit de commutation et lesdits premier, deuxième et troisième transistors de commutation sont connectés en série à la terre, le drain dudit premier transistor de commutation est connecté à la grille dudit deuxième transistor de commutation, le drain dudit deuxième transistor de commutation est connecté à la grille dudit troisième transistor de commutation, la grille dudit troisième transistor de commutation constitue ladite extrémité de sortie dudit circuit de commutation, la grille dudit premier transistor de commutation (Q1) est couplée au pôle positif de ladite source via la deuxième résistance (R2), le drain dudit deuxième transistor de commutation (Q2) est couplé au pôle positif de ladite source (VDD) via la troisième résistance (R3).
  3. Circuit d'alimentation électrique à déclenchement (33) selon l'une quelconque des revendications 1 ou 2, caractérisé en ce que : il comprend une première diode (D1), une deuxième diode (D2), une troisième diode (D3), les pôles positifs desdites première diode (D1), deuxième diode (D2) et troisième diode (D3) étant respectivement connectés à la première, la deuxième et la troisième extrémité de sortie dudit module d'entrée, les pôles négatifs étant respectivement connectés à l'extrémité d'entrée de signal de touche de l'unité centrale de traitement.
EP06761307.5A 2005-06-21 2006-06-20 Souris sans fil a economie d'energie Not-in-force EP1950648B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CNB2005100211662A CN1329803C (zh) 2005-06-21 2005-06-21 节电无线鼠标
PCT/CN2006/001404 WO2006136099A1 (fr) 2005-06-21 2006-06-20 Souris sans fil a economie d'energie

Publications (3)

Publication Number Publication Date
EP1950648A1 EP1950648A1 (fr) 2008-07-30
EP1950648A4 EP1950648A4 (fr) 2012-03-28
EP1950648B1 true EP1950648B1 (fr) 2013-11-20

Family

ID=36076857

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06761307.5A Not-in-force EP1950648B1 (fr) 2005-06-21 2006-06-20 Souris sans fil a economie d'energie

Country Status (3)

Country Link
EP (1) EP1950648B1 (fr)
CN (1) CN1329803C (fr)
WO (1) WO2006136099A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101498969B (zh) * 2008-02-01 2010-12-01 致伸科技股份有限公司 无线鼠标及降低无线鼠标耗电的方法
CN102025282B (zh) * 2009-09-17 2012-11-21 群康科技(深圳)有限公司 电源控制电路及具有电源控制电路的电子装置
JP6499031B2 (ja) * 2015-06-30 2019-04-10 エイブリック株式会社 電子機器
CN108241442A (zh) * 2016-12-26 2018-07-03 天津菲林通讯技术有限公司 一种夹子型无线鼠标设备

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3212272B2 (ja) * 1997-10-15 2001-09-25 株式会社ハドソン 画像位置指示装置
CN2458668Y (zh) * 2000-03-26 2001-11-07 李晶 鼠标器节电休眠电路
TW484746U (en) * 2000-11-27 2002-04-21 Suo-Hung Jang Power saving switch control structure for hand-holding type electronics
CN2526917Y (zh) * 2001-10-09 2002-12-18 友碁科技股份有限公司 具有睡眠/唤醒功能的无线鼠标指标器
CN2522923Y (zh) * 2002-01-16 2002-11-27 英群企业股份有限公司 省电控制装置
US20050007345A1 (en) * 2002-02-26 2005-01-13 Yen-Liang Kuan Power saving device
US7260357B2 (en) * 2002-04-17 2007-08-21 Broadcom Corporation Bluetooth fast connection mode for wireless peripheral device
US6954867B2 (en) * 2002-07-26 2005-10-11 Microsoft Corporation Capacitive sensing employing a repeatable offset charge
CN1604023A (zh) * 2004-11-04 2005-04-06 杨鸣峰 一种不用电源的无线鼠标及其制作方法

Also Published As

Publication number Publication date
EP1950648A4 (fr) 2012-03-28
CN1329803C (zh) 2007-08-01
EP1950648A1 (fr) 2008-07-30
WO2006136099A1 (fr) 2006-12-28
CN1734408A (zh) 2006-02-15

Similar Documents

Publication Publication Date Title
CN107977606B (zh) 一种超低待机功耗的嵌入式指纹识别装置及方法
CN103138376B (zh) 电源切换电路及其电源切换方法
MXPA03005289A (es) Funcionamiento de carga en modo de energia alterna maxima reducida.
EP1950648B1 (fr) Souris sans fil a economie d'energie
CN201601765U (zh) 一种电视机电源控制装置、电视机及系统
CN210223026U (zh) 低功耗实现电路、wifi模块以及遥控器
US7529536B2 (en) RF-controlled power saving communication system
US20040083396A1 (en) Method and apparatus for power management in disk drives
CN110797930B (zh) 一种设备控制方法、装置、系统及计算机存储介质
CN217406709U (zh) 充电仓、耳机及tws耳机
CN112600283B (zh) 一种开关机电路
CN209805473U (zh) 一种供电的控制电路及充电器
CN108146276A (zh) 电池自动切换装置及其控制方法
CN208227020U (zh) 一种低功耗无线通信设备
CN108988300B (zh) 一种笔记本电源电路自断电电路结构及控制方法
CN204795699U (zh) 低功耗电源控制电路
CN101206457B (zh) 电源管理系统及方法
CN217789369U (zh) 一种低功耗充电端口漏电电流电路和应用其的耳机
CN214900615U (zh) 低功耗待机的电源电路以及充电器
CN216016467U (zh) 低压保护电路、装置及电器设备
CN217008019U (zh) 一种开关机电路及手持式设备
CN110311429A (zh) 低功耗电源管理系统及管理方法
CN212135654U (zh) 一种基于NB-IoT无线通信的智能水表
CN220171421U (zh) 电池管理系统的通讯唤醒电路及芯片
CN217115645U (zh) 一种弹载遥测电源管理系统

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20080508

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

DAX Request for extension of the european patent (deleted)
R17P Request for examination filed (corrected)

Effective date: 20080508

A4 Supplementary search report drawn up and despatched

Effective date: 20120223

RIC1 Information provided on ipc code assigned before grant

Ipc: G06F 1/32 20060101ALI20120217BHEP

Ipc: G06F 3/033 20060101AFI20120217BHEP

17Q First examination report despatched

Effective date: 20120912

GRAJ Information related to disapproval of communication of intention to grant by the applicant or resumption of examination proceedings by the epo deleted

Free format text: ORIGINAL CODE: EPIDOSDIGR1

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20130621

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 641999

Country of ref document: AT

Kind code of ref document: T

Effective date: 20131215

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602006039329

Country of ref document: DE

Effective date: 20140116

REG Reference to a national code

Ref country code: NL

Ref legal event code: T3

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 641999

Country of ref document: AT

Kind code of ref document: T

Effective date: 20131120

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140320

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140320

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602006039329

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

26N No opposition filed

Effective date: 20140821

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602006039329

Country of ref document: DE

Effective date: 20140821

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140620

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20140630

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20140630

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20140620

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20131120

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140221

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 20160512

Year of fee payment: 11

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 11

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20060620

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20160617

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: TR

Payment date: 20160615

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20160708

Year of fee payment: 11

REG Reference to a national code

Ref country code: NL

Ref legal event code: MM

Effective date: 20170701

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20170620

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170701

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20180228

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170620

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170630

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20190630

Year of fee payment: 14

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 602006039329

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20210101

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20170620