EP1937038A2

EP1937038A2 - Power regulator

Info

Publication number: EP1937038A2
Application number: EP20070107040
Authority: EP
Inventors: Pun King Kwok; Chow Wah Chun
Original assignee: Advanced Dimming Technology Ltd
Current assignee: Advanced Dimming Technology Ltd
Priority date: 2006-12-19
Filing date: 2007-04-26
Publication date: 2008-06-25
Also published as: CN100499342C; CN1976194A

Abstract

The invention relates to a power regulator. The current fluorescent lamp ballasts and energy-saving lamp dimmers, unlike the traditional incandescent lamp dimmers which can be directly installed, have to be rewired before they can be put into use since a neutral line is a must and therefore cause a bit inconvenient to users. The invention adopts a full bridge rectification circuit composed of diodes D₁ to D₄ and a filter capacitor C₅ connected in parallel with the input terminals of diodes D₁ and D₄, with said power regulator connected in series between power source and load. Said power regulator has two triggers U₁ and U₂ connected in series, and said two triggers U₁ and U₂ are connected with peripheral components R₃, R₄, C₂, C₃, R₇, D₇ and VR₁ to construct a triggering signal processing circuit, and the output terminal of said triggering signal processing circuit is connected in series with a delay circuit composed of another trigger U₃ and its peripheral components R₅ and C₄, and the output terminal of said delay circuit is connected in series with a drive constructed by trigger U₄ and its peripheral component Q₁. Said power regulator also comprises a short-circuit protection circuit.

Description

BACKGROUND OF THE INVENTION

The present invention relates generally to a power regulator. More specifically, the present invention relates to a power regulator for a fluorescent lamp or an energy-saving lamp.
The current fluorescent lamp ballasts and energy-saving lamp dimmers, unlike the traditional incandescent lamp dimmers which can be directly installed, have to be rewired before they can be put into use since a neutral line is a must and therefore cause a bit inconvenient to users. While in a traditional power regulator where a two-way thyristor (Triac) is used as electronic switch, the power can not be conducted when the supply voltage reaches zero, and once the power is conducted, the connection of the thyristor will become intermittent, even out of control due to the resonance caused by said two-way thyristor (Triac). To drive the thyristor, several milliamperes or above will be necessary, which either fluorescent lamps or energy-saving lamps can provide. Fluorescent lamps and energy-saving lamps thus will not achieve the function of power regulation, especially for lamps with small power under 25 Watt. Also, the prior art is complicated and using unnecessary elements in the process of sampling circuit, delayed control circuit and propelling circuits, which is really power-consume. In addition, a neutral line is necessary in order to operate the aforementioned circuits.

SUMMARY OF THE INVENTION

The present invention provides a circuit with relatively simple design by adopting a small scale CMOS IC as the control circuit. Such a CMOS IC has the advantage of low power consumption. The invention is to achieve stable power regulation in low power inductive loads with relatively large internal resistance.
The technical scheme of the present invention is to adopt a power regulator, comprising a full bridge rectification circuit composed of diodes D₁ to D₄ and a filter capacitor C₅ connected in parallel to the input terminals of diodes D₁ and D₄, said power regulator connected in series between power supply and load. Said power regulator has two triggers U₁ and U₂ connected in series, and said two triggers U₁ and U₂ are connected with peripheral components R₃, R₄, C₂, C₃, R₇, D₇ and VR₁ to construct a triggering signal processing circuit, and the output terminal of said triggering signal processing circuit is connected in series with a delay circuit composed of another trigger U₃ and its peripheral components R₅ and C₄, and the output terminal of said delay circuit is connected in series with a drive constructed by trigger U₄ and its peripheral component Q₁. A short-circuit protection circuit is also included in said power regulator.
In the power regulator of the present invention, a current limiting resistor R₁, a diode D₅ and a capacitor C₁ are connected in series between the positive terminal and the negative terminal of said full bridge rectification circuit; a voltage stabilizing diode ZD₁ and a resistor R₂ are connected in parallel to the negative output terminal of the full bridge rectification circuit; said full bridge rectification circuit is connected between capacitor C₁ and diode D₅; one terminal of a resistor R₃ is connected in parallel between the negative output terminal of the full bridge rectification circuit and another terminal of said resistor R₃ is connected between said diode D₅ and resistor R₁.
In said power regulator, said triggering signal processing circuit is composed of trigger U₁ and trigger U₂ connected in parallel; one input terminal of trigger U₁ is connected between resistors R₁ and R₃, and another input terminal of trigger U₁ is coupled between resistor R₄ and capacitor C₂; another terminal of resistor R₄ is coupled between diode D₅ and capacitor C₁; another terminal of capacitor C₂ is coupled with the negative output terminal of the full bridge rectification circuit; resistor C₃ is connected between the output terminal of trigger U₁ and one input terminal of trigger U₂; a resistor is connected in parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said trigger U₂ and a diode D₇ is coupled in reversal parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said trigger U₂; said resistor in parallel is composed of a varistor VR₁ and a resistor R₇ connected in series; the positive terminal of said diode D₆ is coupled between resistor R₄ and capacitor C₂, and the negative terminal of said diode D₆ is coupled with the output terminal of trigger U₂.
In said power regulator, said delay circuit is composed of trigger U₃ with its two input terminals connected between capacitor C₄ and resistor R₅; the other terminal of said capacitor C₄ is coupled between diode D₅ and capacitor C₁; the other terminal of said resistor R₅ is coupled with the negative output terminal of the full bridge rectification circuit; the output terminal of said trigger U₃ is coupled with the input terminal of trigger U₄.
In said power regulator, said drive has another input terminal of the trigger U₄ coupled with the output terminal of the trigger U₂, and the output terminal of said driving trigger U₄ coupled with a resistor R₆, is connected to the collector of a triode Q₁; the emitter of said triode Q₁ coupled in serial with a resistor R₁₀, is connected to the negative output terminal of the full bridge rectification circuit.
In said power regulator, said short-circuit protection circuit has one terminal of resistor R₈ coupled between diode D₅ and capacitor C₁, and the other terminal is coupled in series with the positive terminal of a diode thyristor Q₂; the negative terminal of said diode thyristor Q₂ is coupled with the negative output terminal of the full bridge rectification circuit; the control electrode of said diode thyristor Q₂ is coupled between the emitter of triode Q₁ and resistor R₁₀; a resistor R₉ is connected in series between the control electrode of said diode thyristor Q₂ and the emitter of said triode Q₁; the input terminal of trigger U₂ is connected between resistor R₈ and the positive terminal of said diode thyristor Q₂.
In said power regulator, a voltmeter V₁ is coupled in parallel between the positive terminal and the negative terminal of said full bridge rectification circuit.
The invention achieves the following effects: the circuit structure is simple and the power consumption is extremely small. The power regulator can be connected in series between the electrical appliance and the power supply to achieve effective regulation of lamplight luminance. The invention uses a power switching element (metal-oxide-semiconductor field-effect transistor) as electronic switch and a small scale extremely-small-power-consumption trigger as control circuit; when power voltage crosses zero, conduction will be triggered and delayed for a period of time, which enables the charging and energy-storing and then the disconnection of electronic ballast; power regulation is achieved by adjusting the energy-storing time, hence the regulation of the luminance of the fluorescent lamp. Said power regulator not only regulates power of inductive load, but also resistant load.

BRIEF DESCRIPTION OF THE DRAWING

FIG.1 is a schematic circuit diagram of the present invention.

DESCRIPTION OF A PREFERRED EMBODIMENT

With reference to FIG.1, a power regulator in accordance with the present invention is connected in series between a power supply and a fluorescent lamp or an incandescent lamp, a full bridge rectification circuit constituted by diodes D₁ to D₄ and a filter capacitor C₅ connected in parallel with the input terminals of diodes D₁ and D₄. Said power regulator comprises two triggers U₁ and U₂ connected in series; said two triggers U₁ and U₂ connected with the peripheral components R₃, R₄, C₂, C₃, R₇, D₇, VR₁ constitutes a triggering signal processing circuit; the output terminal of said triggering signal processing circuit is connected in series with the delay circuit constituted by trigger U₃ and its peripheral components R₅ and C₄. The output terminal of said delay circuit is coupled in series with the drive constituted by trigger U₄ and its peripheral component Q₁. A short-circuit protection circuit is also included in said power regulator.
A current limiting resistor R₁, a diode D₅ and a capacitor C₁ are connected in series between the positive terminal and the negative terminal of said full bridge rectification circuit; a voltage stabilizing diode ZD₁ and a resistor R₂ are connected in parallel to the negative output terminal of the full bridge rectification circuit between capacitor C₁ and diode D₅. A resistor R₃ is connected in parallel between diode D₅ and resistor R₁, and the negative output terminal of the full bridge rectification circuit.
Said triggering signal processing circuit is composed of trigger U₁ and trigger U₂ connected in parallel; one input terminal of trigger U₁ is connected between resistors R₁ and R₃, and another input terminal of trigger U₁ is coupled between resistor R₄ and capacitor C₂; another terminal of resistor R₄ is coupled between diode D₅ and capacitor C₁; another terminal of capacitor C₂ is coupled with the negative output terminal of the full bridge rectification circuit; resistor C₃ is connected between the output terminal of trigger U₁ and one input terminal of trigger U₂; a resistor is connected in parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said trigger U₂ and a diode D₇ is coupled in reversal parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said trigger U₂; said resistor in parallel is composed of a varistor VR₁ and a resistor R₇ is connected in series; the positive terminal of said diode D₆ is coupled between resistor R₄ and capacitor C₂, and the negative terminal of said diode D₆ is coupled with the output terminal of trigger U₂.
Said delay circuit is composed of trigger U₃ with its two input terminals connected between capacitor C₄ and resistor R₅; the other terminal of said capacitor C₄ is coupled between diode D₅ and capacitor C₁; the other terminal of said resistor R₅ is coupled with the negative output terminal of the full bridge rectification circuit; the output terminal of said trigger U₃ is coupled with the input terminal of trigger U₄.
Said drive has another input terminal of the trigger U₄ coupled with the output terminal of the trigger U₂, and the output terminal of said driving trigger U₄ coupled with a resistor R₆, is connected to the collector of a triode Q₁; the emitter of said triode Q₁ coupled in serial with a resistor R₁₀, is connected to the negative output terminal of the full bridge rectification circuit.
Said short-circuit protection circuit has one terminal of resistor R₈ coupled between diode D₅ and capacitor C₁, and the other terminal is coupled in series with the positive terminal of a diode thyristor Q₂; the negative terminal of said diode thyristor Q₂ is coupled with the negative output terminal of the full bridge rectification circuit; the control electrode of said diode thyristor Q₂ is coupled between the emitter of triode Q₁ and resistor R₁₀; a resistor R₉ is connected in series between the control electrode of said diode thyristor Q₂ and the emitter of said triode Q₁; the input terminal of trigger U₂ is connected between resistor R₈ and the positive terminal of said diode thyristor Q₂.
A voltmeter V₁ is coupled in parallel between the positive terminal and the negative termnial of said full bridge rectification circuit.
Capacitor C₁ is charged by the current passing the load via the full bridge rectification circuit constituted by diodes D₁ to D₄; resistor R₁ operates as charging current limiting resistor; diode D₅ prevents discharging of capacitor C₁ when triode Q₁ is conducted; ZD₁ limits the charging voltage for Capacitor C₁, which guarantees the no-higher-than-12 V working voltage for triggers U₁ to U₄.
Triggers U₁ and U₂ and their peripheral components constitute the triggering signal processing circuit; resistor R₃ is the sampling resistor for sensing zero-crossing of voltage. When the voltage crosses zero, the output of trigger U₁ is of high level, and since there is no abrupt change of voltage for capacitor C₁, the output of trigger U₂ is of high level and its input is of low level; at this moment, diode D₆ enables the low level of trigger U₁'s 2PIN, which enables the output high level of trigger U₁. Capacitor C₃ is charged via varistor VR₁ and resistor R₇; when charging is completed, the high level of trigger U₂'s output terminal becomes low with its output terminal 4PIN of high level; at this moment, the voltage level of U₁'s two input terminals also becomes high, which enables the low level of trigger U₁'s output terminal 3PIN, and capacitor C₃ begins its charging. Diode D₇ is set for diminishing discharging duration.
Trigger U₃ operates as a time delay circuit, which enables full power level for the initiation of the fluorescent lamp or the energy-saving lamp, and the initiation lasts 2 to 5 seconds with the duration determined by the combination of capacitor C₄ and resistor R₅.
Trigger U₄ works as the drive of triode Q₁. When trigger U₂ produces low-level output, trigger U₄ produces high-level output, which enables the conduction of triode Q₁, and then the load works. Since the time when trigger U₂ produces low-level output is determined by the values of capacitor C₃, varistor VR₁ and resistor R₇, changing the value of varistor VR₁ enables the change of triode Q₁'s conduction time, and therefore, the power control of load is ensured.
Resistor R₇ is particularly set for dimming of the fluorescent lamps or the energy-saving lamps. Since a certain minimum operation voltage is required for them, the charging duration of C₃ should not be too short. Thus in the invention it is ensured by resistor R₇.
Resistors R₈, R₉, R₁₀ and diode thyristor Q₂ constitute a short-circuit protection circuit. Resistor R₁₀ is a sampling resistor for load shorting or overloading of triode Q₁. When load shorting or overloading appears, diode thyristor Q₂ is conducted, and this disables the conduction of triode Q₁ until diode thyristor Q₂ is reset after power is switched off.
Capacitor C₅, set for power factor enhancement, is used to improve switching waveform, and is also beneficial to diminishing interference of electromagnetic wave on electronic components.

Claims

A power regulator, comprising a full bridge rectification circuit having four diodes (D₁, D₂, D₃, D₄), a filter capacitor (C₅) connected in parallel with the input terminals of the first and fourth diodes (D₁, D₄); wherein said power regulator is connected in series between power source and load; having two triggers (U₁, U₂) connected in series, said two triggers (U₁, U₂) coupled with peripheral components (R₃, R₄, C₂, C₃, R₇, D₇, VR₁) to construct a triggering signal processing circuit; the output terminal of said triggering signal processing circuit connected in series with a delay circuit comprising a third trigger (U₃) and its corresponding peripheral components (R₅, C₄); the output terminal of said delay circuit connected in series with a drive constructed by a fourth trigger (U₄) and its corresponding peripheral component (Q₁); a short-circuit protection circuit being also included in said power regulator.
The power regulator of claim 1, wherein a first resistor (R₁) limiting current, a fifth diode (D₅) and a first capacitor (C₁) are connected in series between the positive terminal and the negative terminal of said full bridge rectification circuit; a voltage stabilizing diode (ZD₁) and a second resistor (R₂) is connected in parallel to the negative output terminal of the full bridge rectification circuit; said full bridge rectification circuit is connected between the first capacitor (C₁) and the fifth diode (D₅); one terminal of a third resistor (R₃) is connected in parallel between the negative output terminal of the full bridge rectification circuit and another terminal of said third resistor (R₃) is connected between said fifth diode (D₅) and the first resistor (R₁).
The power regulator of claim 1, wherein said triggering signal processing circuit is composed of a first trigger (U₁) and a second trigger (U₂) connected in parallel; one input terminal of the first trigger (U₁) is connected between the first and third resistors (R₁, R₃), and another input terminal of the first trigger (U₁) is coupled between a fourth resistor (R₄) and a second capacitor (C₂); another terminal of the fourth resistor (R₄) is coupled between the fifth diode (D₅) and the first capacitor (C₁); another terminal of the second capacitor (C₂) is coupled with the negative output terminal of the full bridge rectification circuit; a third resistor (R₃) is connected between the output terminal of the first trigger (U₁) and one input terminal of the second trigger (U₂); a parallel resistor is connected in parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said second trigger (U₂) and a seventh diode (D₇) is coupled in reversal parallel between the output negative terminal of the full bridge rectification circuit and the input terminal of said second trigger (U₂); said parallel resistor is composed of a varistor (VR₁) and a seventh resistor (R₇) connected in series; the positive terminal of a sixth diode (D₆) is coupled between the fourth resistor (R₄) and the second capacitor (C₂), and the negative terminal of said sixth diode (D₆) is coupled with the output terminal of the second trigger (U₂).
The power regulator of claim 1, wherein said delay circuit is composed of a third trigger (U₃) with its two input terminals connected between a fourth capacitor (C₄) and a fifth resistor (R₅); the other terminal of said fourth capacitor (C₄) is coupled between the fifth diode (D₅) and the first capacitor (C₁); the other terminal of said fifth resistor (R₅) is coupled with the negative output terminal of the full bridge rectification circuit; the output terminal of said third trigger (U₃) is coupled with the input terminal of a fourth trigger (U₄).
The power regulator of claim 1, wherein said drive has another input terminal of the fourth trigger (U₄) coupled with the output terminal of the second trigger (U₂), and the output terminal of said fourth trigger (U₄) coupled with a sixth resistor (R₆), is connected to the collector of a triode (Q₁); the emitter of said triode (Q₁) coupled in series with a tenth resistor (R₁₀), is connected to the negative output terminal of the full bridge rectification circuit.
The power regulator of claim 1, wherein said short-circuit protection circuit has one terminal of an eighth resistor (R₈) coupled between the fifth diode (D₅) and the first capacitor (C₁), and the other terminal is coupled in series with the positive terminal of a diode thyristor (Q₂); the negative terminal of said diode thyristor (Q₂) is coupled with the negative output terminal of the full bridge rectification circuit; the control electrode of said diode thyristor (Q₂) is coupled between the emitter of the triode (Q₁) and the tenth resistor (R₁₀); a ninth resistor (R₉) is connected in series between the control electrode of said diode thyristor (Q₂) and the emitter of said triode (Q₁); the input terminal of the second trigger (U₂) is connected between the eighth resistor (R₈) and the positive terminal of said diode thyristor (Q₂).
The power regulator of claim 1, wherein a voltmeter (V₁) is coupled in parallel between the positive terminal and the negative termnial of said full bridge rectification circuit.