EP1901592B1 - Elektronisches Vorschaltgerät mit asymmetrischer Wechselrichter-Ansteuerung - Google Patents
Elektronisches Vorschaltgerät mit asymmetrischer Wechselrichter-Ansteuerung Download PDFInfo
- Publication number
- EP1901592B1 EP1901592B1 EP07113990A EP07113990A EP1901592B1 EP 1901592 B1 EP1901592 B1 EP 1901592B1 EP 07113990 A EP07113990 A EP 07113990A EP 07113990 A EP07113990 A EP 07113990A EP 1901592 B1 EP1901592 B1 EP 1901592B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- lamp
- control signals
- duty cycles
- inverter
- inverter control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Not-in-force
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/36—Controlling
- H05B41/38—Controlling the intensity of light
- H05B41/39—Controlling the intensity of light continuously
- H05B41/392—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor
- H05B41/3921—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations
- H05B41/3927—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations by pulse width modulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
- H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
- H05B41/295—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices and specially adapted for lamps with preheating electrodes, e.g. for fluorescent lamps
- H05B41/298—Arrangements for protecting lamps or circuits against abnormal operating conditions
- H05B41/2988—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the lamp against abnormal operating conditions
Definitions
- the present invention relates to an electronic ballast (EBG) for AC operation of at least one discharge lamp.
- ECG electronic ballast
- EP 1 269 801 B1 relates to a ballast and associated method for dimming a luminaire provided with a fluorescent lamp, wherein the ballast automatically recognizes certain types of lamps by detecting the lamp voltage and sets those operating data, the currently located in the lamp lamp type are assigned according to an operating data register.
- EP 1 095 543 B1 is an electronic lamp ballast for at least one gas discharge lamp with a powered by a DC voltage source, consisting of two mutually connected in series power transistors inverter half bridge disclosed.
- an asymmetrical operating mode is provided, which is dependent on the respectively set dimming level, in which the duty cycles of the control signals for the first and second power switches of the inverter half bridge varies in a periodic sequence via a control circuit and set to values deviating from 50% of a value range between 0% and 100% become.
- WO 99/34650 describes an electronic ballast for AC operation of at least one gas discharge lamp, which has a powered with a rectified supply voltage inverter half-bridge and a control circuit for controlling the operation of the gas discharge lamp.
- the two semiconductor power switches of the inverter half bridge are controlled by the control circuit so that the output side of the inverter half bridge an alternating voltage of variable frequency is generated.
- EP 0 390 285 B1 discloses a dimmable electronic ballast for AC operation of a mercury vapor discharge lamp having an integrated controllable DC voltage source for stabilizing the Walm s the lamp, especially at low Dimmleveln has.
- the DC voltage source supplies a DC offset which is superimposed on the AC supply voltage of the lamp and whose voltage level is regulated in such a way that the DC voltage source is controlled by the DC voltage source the luminous flux generated by the lamp during dimming operation remains constant.
- the present invention is dedicated to the task of making the control of a lamp more flexible in order to better adapt it to current operating conditions.
- the present invention discloses an electronic lamp ballast for AC operation of at least one lamp.
- the two semiconductor power switches of the inverter half-bridge are controlled by control signals whose duty cycles can be set time-variably adjustable and, for example, as a function of detected operating parameters of the lamp.
- the two inverter switches are driven asymmetrically, the asymmetry of the control by specifying a control signal with a time-varying duty cycle can be defined from a value range between 0% and 100%.
- the present invention relates to a method for AC operation of at least one lamp, wherein asymmetric duty cycles of control signals of a predetermined clock frequency is adjustable, which for driving two connected to a half-bridge in series, separately controllable semiconductor power switch one for supplying the lamp with AC used inverter.
- asymmetrical duty cycles of the two inverter control signals according to the invention in particular with respect to their asymmetry adjustable in time or adjustable depending on at least one feedback signal.
- the asymmetrical duty cycles of the two inverter control signals can be varied in a regular clock cycle by pulse width modulation of the inverter control signals.
- the asymmetrical duty cycles of the two inverter control signals in dependence on detected operating parameters eg lamp current, lamp voltage or respectively the DC portion thereof, lamp resistance, ...), the lamp operating state (eg., Before / after ignition) or environmental parameters (Temperature, etc.) of the lamp operation are adaptively changed by pulse width modulation of the inverter control signals.
- values of two asymmetrical duty cycles are initially specified and the pulse widths of the two control signals serving to drive the inverter are set in accordance with the values predetermined for the two duty cycles. After that, one is made by the Pulse width determinations caused DC component of an effective active power consumption of the lamp representing operating parameter detected.
- the relevant operating parameter is then forwarded to a control and control module, whereupon the values prescribed for the two duty cycles are readjusted depending on the detected operating parameter, so that the aforementioned DC signal component, averaged over the number of the aforementioned clock cycles, is substantially equal to zero.
- the operating parameters which may be considered as the control variable may be lamp and / or environmental parameters, for example the effective or rectified value, the DC and / or alternating signal component of the lamp firing voltage U LA or the effective or rectified value DC and / or alternating signal component of the current flowing through the lamp current I LA , to the lamp in the firing or dimming operation supplied effective active power P w, eff to the calculated lamp impedance Z LA at a positive or negative half-wave of the lamp current or a Detector output signal for detecting a flickering of the lamp, an unreasonably high temperature rise or a stability affecting the stability of the control disturbance (eg, an interference voltage spike occurred due to an overload).
- lamp and / or environmental parameters for example the effective or rectified value, the DC and / or alternating signal component of the lamp firing voltage U LA or the effective or rectified value DC and / or alternating signal component of the current flowing through the lamp current I LA , to the lamp in the firing or dimming operation supplied effective active power P w, eff
- control of the duty ratio according to the invention can also be carried out depending on the operating mode of the power supply (normal operation or emergency power operation).
- the precise signal curve of the lamp current I LA detected, sampled, quantized and evaluated in digitized form to control the recorded by the lamp effective effective power since this on the performance of the lamp both in Brennals and in dimming a has decisive influence.
- the regulation of the effective active power picked up by the lamp can take place such that, when the lamp current is applied with a DC component, the latter, averaged over a predefinable period of time, is substantially equal to zero.
- the generation of this DC component takes place with the aid of an asymmetric half-bridge control via a digital control signal of a preferably high clock rate and a correspondingly small sampling interval to keep the DC component correspondingly low, since in some lamp types already a relatively small DC component with respect to the Walmo the lamp critical is.
- the duty cycles of the two inverter control signals can according to the invention either follow a pulse width modulation of the inverter control signals in each case predetermined, dependent on the time function or briefly assume random values from a value of 50% excluding value range between 0% and 100%. A momentarily caused by these random duty cycles change in the effective effective power absorbed by the lamp is then compensated again after the lapse of a predetermined number of clock cycles by appropriately modified duty cycles are set.
- the duty cycles of the two inverter control signals are either set independently of each other or are correlated to each other, so depend on each other via a functional relationship.
- the duty cycles can be adjusted depending on a dimming level of the lamp.
- the present invention relates to a control module for implementing the method described above.
- the present invention further relates to an electronic ballast for AC operation of at least one discharge lamp, which has a supplied with a DC voltage to supply the lamp with AC serving inverter in the form of two connected to a half-bridge in series, separately controllable semiconductor power switch and a control module for the separate control of the two semiconductor power switches with two digital inverter control signals of a predetermined clock frequency, wherein the duty cycles of these inverter control signals have asymmetrical values.
- the asymmetrical duty cycles of the two inverter control signals are adjustable in accordance with the invention in a time-variable manner.
- the aforesaid electronic ballast can have a power factor correction circuit connected upstream of the inverter half bridge and connected to its supply voltage input with an integrated semiconductor power switch controlled by a pulse width modulated power factor control signal to compensate for the reactive power consumed by the discharge lamp in the firing or dimming operation.
- the power factor control signal can be adaptively changed by pulse width modulation as a function of detected operating parameters of the lamp operation.
- Fig. 1 1 is a block diagram of an electronic ballast (EVG) according to the present invention, which is used to control the operation of an AC-driven discharge lamp driven by the ECG.
- ECG electronic ballast
- a pulse width modulator with a downstream driver serves for controlling an AC / DC converter which is used for the AC supply of the lamp LA and is supplied with a DC voltage U v .
- PWM pulse width modulator
- the control of the pulse width modulator PWM takes place as a function of two digital manipulated variables, which are supplied by two data outputs of a designated as "R & S module” digital control and control device. This Measurement signals concerning abbeer operating parameters are supplied as controlled variables.
- These measurement signals may be, for example, two measurement voltages U M 1 and U M 2 , which are proportional to one of the filament currents I W 1 and I W 2 flowing through the two lamp electrodes (W 1 and W 2, respectively).
- the control and regulating device regulates the two aforementioned manipulated variables in this case depending on the measured signals detected on the detected measurement signals as well as on a reference variable predeterminable via a setpoint input for the radiation power to be generated in the firing or dimming operation by the discharge lamp LA.
- a further power control circuit LRK 3 whose control path is formed by the power factor correction circuit PFC, is used according to the invention as a "power factor control circuit" becomes.
- a semiconductor power switch incorporated in the power factor correction circuit PFC is included a pulse width modulated control voltage U G 3 is driven, which is also supplied by the aforementioned pulse width modulator with downstream driver IC.
- the pulse width modulator PWM ensures a variation of the pulse width t in3 and thus the duty cycle d 3 of the control voltage U G 3 required for driving this semiconductor power switch, generated by the driver IC.
- the control of the pulse width modulator PWM is carried out according to the invention in dependence on a digital manipulated variable, which is supplied by an additional data output of the digital control and regulating device.
- the control and regulating device regulates the aforementioned manipulated variable dependent on a controlled variable, which may be, for example, the supply voltage U V of the inverter DC / AC provided at the output of the power factor correction circuit PFC or the output current of the power factor correction circuit PFC, as well as dependent on the reference variable ⁇ LA, which can be specified at the aforementioned setpoint input , is intended for the radiation power ⁇ LA to be generated in the firing or dimming operation by the discharge lamp LA .
- a controlled variable which may be, for example, the supply voltage U V of the inverter DC / AC provided at the output of the power factor correction circuit PFC or the output current of the power factor correction circuit PFC, as well as dependent on the reference variable ⁇ LA, which can be specified at the aforementioned setpoint input , is intended for the radiation power ⁇ LA to be generated in the firing or dimming operation by the discharge lamp LA .
- the control and control device Upon detection of a control deviation between the control variable tapped via the output of the power factor correction circuit PFC and the reference voltage U ref representing the aforementioned reference variable ⁇ LA, the control and control device changes the duty ratio d 3 required for driving the semiconductor power switch integrated in the power factor correction circuit PFC Control voltages U G 3 so that this setpoint is achieved at least approximately.
- the electronic ballast according to the invention is connected to an AC network via a switched-mode power supply OWF serving for radio interference suppression and filtering of mains harmonics.
- the filtered output signal of the harmonic filter OWF is fed to a rectifier circuit AC / DC, which converts the AC line voltage into a rectified DC link voltage and this via the aforementioned power factor correction circuit PFC, which for harmonic filtering and smoothing the voltage supplied by the rectifier circuit AC / DC and for compensation of the Lamp used in the burning or dimming operation reactive power, the inverter circuit DC / AC as supply voltage U V supplies.
- the inverter circuit DC / AC serves as a controllable AC voltage source, which converts the rectified and with the help of a charging capacitor C smoothed DC link voltage in a high frequency AC voltage adjustable frequency, which is used to operate the discharge lamp LA.
- the output of the inverter DC / AC is connected to a load circuit LK, via which the discharge lamp LA operated by the ECG is driven.
- the load circuit LK comprises a resonant circuit SRK, via which the high-frequency AC voltage at the output of the inverter circuit DC / AC of the discharge lamp LA is supplied.
- the electronic ballast according to the invention can optionally also have a heating circuit HzK serving for preheating the two lamp electrodes W 1 and W 2 .
- a heating circuit HzK serving for preheating the two lamp electrodes W 1 and W 2 .
- This may for example comprise a consisting of a primary winding and two separate secondary windings heating transformer HzTr whose secondary windings L s 1 and L s 2 , as in Fig. 2 represented, for example, to the formed as helical lamp electrodes W 1 and W 2 of the discharge lamp LA are connected in series.
- the electronic ballast has a control module ⁇ C, which monitors various operating parameters of the electronic ballast and generates a control signal for the inverter DC / AC to adjust the frequency of the AC voltage generated by this or the pulse width of its control signals.
- the control module .mu.C example, the lamp operating voltage U LA, the pre-heating voltage U H, the lamp operating current I LA, the impedance monitor Z LK of the load circuit LK and / or the functionality provided by the rectifier circuit AC / DC rectified intermediate circuit voltage U V and or the output frequency of the inverter Set the pulse widths of its control signals such that the respectively detected operating parameters do not exceed or fall short of a predetermined limit value, that the power taken from the rectifier AC / DC is as constant as possible and that a lamp current I LA that is as constant as possible flows through the discharge lamp LA at the lamp LA as constant as possible lamp voltage U LA is applied.
- the electronic ballast may have a number of fault detectors that monitor certain operating parameters of the ECG, in particular of the load circuit LK, and upon detection of a specific error condition, a corresponding control of the inverter DC / AC cause, for. to prevent the occurrence of an overvoltage on the discharge lamp LA.
- the control module .mu.C of the electronic ballast serves to control a pulse width modulator downstream driver IC, which generates the control signals for the two inverter switches T 1 and T 2 described above, wherein the duty cycles of the control signals and in particular their asymmetry can be set time-varying.
- the change in the duty cycle is slow compared to the frequency of the inverter.
- the temporal change can be sudden ("hard commutation”) or gradual, i. in the manner of a ramp (“soft commutation”).
- control signals for the two inverter switches in the firing and dimming operation of the discharge lamp LA are preferably output with an asymmetrical duty cycle, whereby a observable especially at low Dimmleveln Walmen the lamp LA is reduced, while in the preheat and ignition operation of the lamp LA preferably with symmetrical Control signals is worked.
- FIG. 1 sketched electronic lamp ballast with a given in the form of a half-bridge circuit consisting of two mutually connected in series controllable semiconductor power switches inverter circuit DC / AC, the circuit breakers T 1 and T 2 with two pulse width modulated control signals U G 1 and U G 2 via a as "Driver IC" designated bridge driver can be controlled, is in Fig. 2 shown.
- the series connection of the two inverter switches T 1 and T 2 is connected between the voltage-carrying output line of the power factor correction circuit PFC and the ground node of the ECG.
- the supply voltage U v of the inverter half bridge DC / AC via the charging capacitor C a smoothed, rectified mains AC voltage U e1 supplied.
- the output port of the inverter half-bridge DC / AC formed from the connection node between the two controllable semiconductor power switches T 1 or T 2 and the ground node is connected in this embodiment via an integrated in the load circuit LK, a resonant inductor L res and a series-connected thereto Resonant capacitance C res existing series resonant circuit with one (W 2 ) of the two designed as spirals lamp electrodes W 1 and W 2 connected.
- the other lamp electrode (W 1 ) is connected via a coupling capacitor C K to the end of the resonant inductance L res facing away from the output of the inverter half-bridge DC / AC, the series circuit consisting of the coupling capacitor C K and the load impedance Z LA consisting of the discharge lamp LA resonating capacitance C res of the series resonant circuit SRK is connected in parallel.
- the supply voltage U v of the inverter half-bridge DC / AC is converted into a high-frequency alternating voltage by the inverter DC / AC to the series resonant circuit SRK by a switching on and off of the two electronically controllable power switches T 1 and T 2 in alternating sequence is delivered.
- Its resonant capacitance C res has the function of a firing capacitor.
- the power factor correction circuit PFC serving to prevent a load of the power supply network with reactive power is in the in Fig. 2 sketched embodiment of the electronic ballast according to the invention as realized by a DC boost converter (English: “Boost Converter” or “step-up converter”) formed active power factor correction circuit according to the prior art.
- the DC boost converter consists of a power rectifier AC / DC, one connected to the voltage-carrying output, acting as a current-limiting storage inductor inductance L , a series-connected to this inductance L diode D and an output side, to the diode D in series charge capacitor C. to increase from the output voltage U obtained.
- the inductance L is connected by a parallel to the series circuit of diode D and the charging capacitor C , via the aforementioned pulse width modulator PWM with downstream driver IC driven semiconductor power switch, for example, as a gate turn-off thyristor or, as in Fig. 2 outlined as self-locking n-channel MOS field effect transistor T 3 can be realized, connected to ground.
- the coil current I L then commutates to the diode D and continues to flow through the load circuit, wherein the magnetic field of the inductance L collapses and the charging capacitor C is further charged.
- the circuit Since the circuit is in itself neither short-circuit nor idle proof, it must either be adapted exactly to the load impedance Z L of the load circuit LK, or the semiconductor power switch T 3 must, as is the case, be controlled via a control loop in order to prevent an overvoltage or an overcurrent at the output of the power factor correction circuit PFC.
- Fig. 3a and 3b two voltage-time diagrams are shown in which the time profiles of the two generated during two consecutive clock cycles, applied to the control electrodes of the two inverter power switches T 1 and T 2 pulse width modulated control voltages U G 1 and U G 2 exemplified in the form of two clocked Rectangular voltages are shown.
- “High” and “low” levels of these two digital control voltages alternately alternate at regular, predetermined by the clock frequency of the inverter sequence, the voltage U G1 within the off time of U G 2 their "high” level and the voltage U G 2 within the off time of U G 1 assumes its "high” level.
- the two power transistors T 1 and T 2 of the inverter half-bridge DC / AC are controlled so that T 1 blocks while T 2 is conducting and vice versa.
- both the falling clock edges of the rectangular control voltage U G 1 and the rising clock edges of the rectangular control voltage U G 2 can be within the clock durations T 1 or T 1 prescribed by the respective clock cycle of these signals T be moved in both directions along the time axis.
- the setting of the duty cycles of U G 1 and U G 2 to be carried out in each cycle or after a predefinable number of cycles can be carried out independently of each other or coupled to each other, in the latter case d 2 as a function of d 1 or to the same value as d 1 can be set.
- the magnitude and direction of the changes of d 1 and d 2 are controlled in such a way that a DC component of the lamp current I LA generated by the asymmetrical half-bridge control is averaged substantially equal to zero over a predeterminable number of clock cycles.
- Fig. 3c shows a voltage-time diagram in which the time course of a generated during these two consecutive clock cycles pulse width modulated control voltage U G 3 is shown for driving the control electrode of the semiconductor integrated circuit breaker T 3 in the realized as a DC boost converter active power factor correction circuit PFC is used.
- This control voltage is shown as a square wave voltage with a duty cycle of 50%.
- Fig. 3d shows a voltage-time diagram in which the approximately sinusoidal, shifted along the time axis curve of the lamp voltage U LA with variation of the duty cycles d 1 and / or d 2 of the two pulse width modulated control signals U G 1 and U G 2 for controlling the two Operation of the inverter half bridge DC / AC required semiconductor power switch T 1 and T 2 is shown.
- the magnitude of the shift of U L A along the time axis is proportional to the sum
- the duty cycle is preferably 50%, as averaged over time. Between a first, almost stationary duty cycle of more than 50%, the duty cycle can then drop suddenly or, as shown, gradually in the form of a ramp to less than 50% in order to rise again from above this quasi-stationary value to more than 50%.
Landscapes
- Circuit Arrangements For Discharge Lamps (AREA)
- Inverter Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102006043155A DE102006043155A1 (de) | 2006-09-14 | 2006-09-14 | Elektronisches Vorschaltgerät mit asymmetrischer Wechselrichter-Ansteuerung |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1901592A1 EP1901592A1 (de) | 2008-03-19 |
EP1901592B1 true EP1901592B1 (de) | 2010-12-15 |
Family
ID=37745887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07113990A Not-in-force EP1901592B1 (de) | 2006-09-14 | 2007-08-08 | Elektronisches Vorschaltgerät mit asymmetrischer Wechselrichter-Ansteuerung |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1901592B1 (zh) |
CN (1) | CN101146392B (zh) |
AT (1) | ATE492143T1 (zh) |
DE (2) | DE102006043155A1 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102010031219A1 (de) * | 2010-07-12 | 2012-01-12 | Osram Gesellschaft mit beschränkter Haftung | Schaltungsanordnung und Verfahren zum Betreiben mindestens einer Entladungslampe |
DE102010063989A1 (de) * | 2010-12-22 | 2012-06-28 | Tridonic Gmbh & Co. Kg | Verfahren und Vorrichtung zum Betreiben einer Gasentladungslampe |
WO2013038322A1 (en) * | 2011-09-14 | 2013-03-21 | Koninklijke Philips Electronics N.V. | Digitally controlled electronic ballast with anti-striation control and method of operation thereof |
CN103313483B (zh) * | 2013-06-24 | 2015-02-25 | 盐城工学院 | 一种led的调光控制方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5583402A (en) * | 1994-01-31 | 1996-12-10 | Magnetek, Inc. | Symmetry control circuit and method |
US6456015B1 (en) * | 1996-10-16 | 2002-09-24 | Tapeswitch Corporation | Inductive-resistive fluorescent apparatus and method |
US5949197A (en) * | 1997-06-30 | 1999-09-07 | Everbrite, Inc. | Apparatus and method for dimming a gas discharge lamp |
-
2006
- 2006-09-14 DE DE102006043155A patent/DE102006043155A1/de not_active Withdrawn
-
2007
- 2007-08-08 AT AT07113990T patent/ATE492143T1/de active
- 2007-08-08 DE DE502007005932T patent/DE502007005932D1/de active Active
- 2007-08-08 EP EP07113990A patent/EP1901592B1/de not_active Not-in-force
- 2007-09-13 CN CN2007101456990A patent/CN101146392B/zh not_active Expired - Fee Related
Non-Patent Citations (1)
Title |
---|
GUAN-CHYUN HSIEH ET AL: "Group-asymmetrical PWM controller for dimmable fluorescent lamp ballast without striation and thermostat effect", INDUSTRIAL ELECTRONICS SOCIETY, 2005. IECON 2005. 31ST ANNUAL CONFERENCE OF IEEE, IEEE, PISCATAWAY, NJ, USA LNKD- DOI:10.1109/IECON.2005.1569005, 6 November 2005 (2005-11-06), pages 792 - 797, XP010876042, ISBN: 978-0-7803-9252-6 * |
Also Published As
Publication number | Publication date |
---|---|
DE502007005932D1 (de) | 2011-01-27 |
DE102006043155A1 (de) | 2008-03-27 |
EP1901592A1 (de) | 2008-03-19 |
ATE492143T1 (de) | 2011-01-15 |
CN101146392A (zh) | 2008-03-19 |
CN101146392B (zh) | 2012-03-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69710399T2 (de) | Resonanz-Leistungswandler und Verfahren zum Steuern desselben | |
EP1603219B1 (de) | Verfahren und Schaltung zur Leistungsfaktorkorrektur (PFC) | |
EP2837263B1 (de) | Verfahren zum steuern einer leistungsfaktorkorrekturschaltung, leistungsfaktorkorrekturschaltung und betriebsgerät für ein leuchtmittel | |
DE102006022819A1 (de) | Schaltungsanordnung zum Versorgen einer Last mit einem Ausgangsstrom | |
EP3036971B1 (de) | Getakteter elektronischer energiewandler | |
WO2000018197A1 (de) | Schaltungsanordnung zum betreiben von gasentladungslampen | |
EP1465330B1 (de) | Verfahren und Schaltung zum Variieren der Leistungsaufnahme von kapazitiven Lasten | |
EP2837092B1 (de) | Verfahren zum regeln einer leistungsfaktorkorrekturschaltung, leistungsfaktorkorrekturschaltung und betriebsgerät für ein leuchtmittel | |
DE102013208720A1 (de) | Leistungswandlerschaltkreis und Verfahren zum Betrieb eines Leistungswandlerschaltkreises | |
EP1901592B1 (de) | Elektronisches Vorschaltgerät mit asymmetrischer Wechselrichter-Ansteuerung | |
EP2795785A1 (de) | Steuereinrichtung für einen mit einem resonanten lastnetzwerk belasteten wechselrichter | |
DE19849738C2 (de) | Impulsgenerator | |
EP2512207B1 (de) | Treiberschaltung und Verfahren zum Versorgen einer LED sowie Leuchtmittel | |
DE102014220099A1 (de) | Getakteter elektronischer Energiewandler | |
EP1658676B1 (de) | Schaltung und verfahren zum verarbeiten einer speisespannung mit spannungsspitzen | |
DE102017221786A1 (de) | Lampenbetriebsgerät mit Konverter im DCM | |
DE19543720A1 (de) | Elektronischer Transformator | |
EP2266374B1 (de) | Leistungsregelung von gasentladungslampen in halbbrücken- und vollbrückenschaltungen | |
EP1900262B1 (de) | Vorrichtung und verfahren zum betreiben einer hochdruckentladungslampe | |
DE102004037389B4 (de) | Verfahren zur Ansteuerung einer eine Leuchtstofflampe aufweisenden Last zur Optimierung des Zündvorganges | |
DE102010028296A1 (de) | DC-AC Wandler für ein Notlichtbetriebsgerät | |
EP2656697A2 (de) | Geregelte wendelheizung für gasentladungslampen | |
WO2019052974A1 (de) | Betriebsgerät für eine elektrische last und verfahren | |
WO2012083328A1 (de) | Betriebsgerät und verfahren zum betrieb von gasentladungslampen | |
EP2263423B1 (de) | Schaltungsanordnung zum zünden von hid-gasentladungslampen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR |
|
AX | Request for extension of the european patent |
Extension state: AL BA HR MK YU |
|
17P | Request for examination filed |
Effective date: 20080404 |
|
17Q | First examination report despatched |
Effective date: 20080617 |
|
AKX | Designation fees paid |
Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
RTI1 | Title (correction) |
Free format text: ELECTRONIC BALLAST WITH ASYMMETRICAL INVERTER ACTUATION |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: TRIDONIC GMBH & CO KG |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP Ref country code: GB Ref legal event code: FG4D Free format text: NOT ENGLISH |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D |
|
REF | Corresponds to: |
Ref document number: 502007005932 Country of ref document: DE Date of ref document: 20110127 Kind code of ref document: P |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: VDEP Effective date: 20101215 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
LTIE | Lt: invalidation of european patent or patent extension |
Effective date: 20101215 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: SI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: BG Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110315 Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FD4D |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: ES Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110326 Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110415 Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110415 Ref country code: CZ Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110316 Ref country code: EE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: IE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: PL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: RO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
26N | No opposition filed |
Effective date: 20110916 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 Ref country code: MT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R097 Ref document number: 502007005932 Country of ref document: DE Effective date: 20110916 |
|
BERE | Be: lapsed |
Owner name: TRIDONIC GMBH & CO KG Effective date: 20110831 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MC Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110831 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110831 Ref country code: LI Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110831 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: BE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110831 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110808 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: TR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: HU Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20101215 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: AT Payment date: 20130902 Year of fee payment: 7 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20130829 Year of fee payment: 7 |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: MM01 Ref document number: 492143 Country of ref document: AT Kind code of ref document: T Effective date: 20140808 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: AT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20140808 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST Effective date: 20150430 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20140901 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20150901 Year of fee payment: 9 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20151029 Year of fee payment: 9 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R119 Ref document number: 502007005932 Country of ref document: DE |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20160808 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20170301 Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20160808 |