EP1844544A2 - Demodulator and modulator/demodulator by direct frequency conversion - Google PatentsDemodulator and modulator/demodulator by direct frequency conversion
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- EP1844544A2 EP1844544A2 EP20050809116 EP05809116A EP1844544A2 EP 1844544 A2 EP1844544 A2 EP 1844544A2 EP 20050809116 EP20050809116 EP 20050809116 EP 05809116 A EP05809116 A EP 05809116A EP 1844544 A2 EP1844544 A2 EP 1844544A2
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/30—Circuits for homodyne or synchrodyne receivers
- H03—BASIC ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
- H03D7/125—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes with field effect transistors
DEMODULATOR MODULATOR-DEMODULATOR CONVERSION RATE OF DIRECT
The present invention relates to the field of radio frequency applications, especially with that of the radio carrier frequency and transceivers for direct frequency conversion. The invention relates more particularly to a demodulator and a modulator-demodulator suitable for use in particular in such transceivers.
The receivers for direct frequency conversion - also called homodyne - have now become popular due to the simplicity of the circuits which limits costs compared heterodyne architectures. Its principle is based on the vector decomposition of the received modulated signal. Since the received modulated signals are fully characterized by their complex envelopes, a base defined by two orthogonal vectors - said base Cartesian - is sufficient to represent them. However, it is very difficult to realize a circuit of two channels guaranteeing Forthogonalité between two signals in a large frequency range as used in broadband systems and / or multi-band.
Receptors by direct conversion most suitable frequency to broadband systems and / or multiple band are the five receptors or six ports, see, which provide from two inputs, at least three output signals from which can be estimated the Cartesian components of the complex envelope of the modulated signal received. These systems help to overcome the constraints of Cartesian orthogonal receivers through a calibration procedure to the operating frequency band. Similarly, there exists for the uplink of the direct conversion transmitter frequency using modulators two-way transporting Cartesian base signals. It was also proposed modulators based on three vectors.
Such receivers or transmitters by direct frequency conversion providing three or more output signals are presented in the following documents:
• EP-AO 805 561 discloses a demodulator based on a six port junction, power detector and an analog processing circuit for finding the Cartesian I and Q components of the complex envelope of the received signal. • US Patent 6,650,178 a direct conversion receiver with more than two ports. This circuit uses two passive interferometric circuits connected by a phase-shifter element. The information carried by the received signal is recovered from the
R: \ Patent \ 22700 \ 22719.doc - 1/22 power measurements performed in the output port of the interferometric junctions.
• US-A-5,498,969 discloses a junction architecture six port applied to a device for measuring vector with a power divider circuit, a phase shifter, a power sensor adapted and three other non-suitable.
• EP-AO 841 756 discloses a six-port receiver using a correlator circuit in which the received modulated signal is summed to four signals from the reference oscillator, but mutually phase-shifted in each case by 90 °. The values of the Cartesian components of the baseband signal are found by an analog circuit from the powers of the RF signals.
• US Patent 5,095,536 describes a direct conversion receiver based on a three-phase architecture and three mixer circuits. The reference signal is divided into three channels of phase which are then mixed with the received modulated signal. The information is retrieved by digital processing of the signals supplied to the filter outputs and amplifiers placed after the mixers.
• F. Ellinger, U and W. Bächtold Lot describe a modulator circuit using a vector basis of three linearly dependent vectors in the document entitled "An antenna diversity MMIC Vector Modulator for HIPERLAN with Low Power consuption and Calibration Capability" appeared in 964-969 pages of the newspaper IEEE Transactions on Microwave Theory and Technique, Vol. 49, N. 5,
• The article "A 1.4 - 2.7 GHz Analog MMIC Vector Modulator for a crossbar Beamforming Network" J. Grajal Mr. Mahfoudi J. Gismero and FA Petzjparu in 1705-1714 pages of the newspaper IEEE Transactions on Microwave Theory and Technique , Flight. 45, N. 10, 1997, discloses a vector modulator using three phase-shifted vector 120 °.
The object of the invention is to propose a new demodulation technology, and even modulation and demodulation, by direct frequency conversion which is of of simple and economic work, which could notably be implemented at high frequencies such the microwave while allowing it to be integrated more easily than existing technologies and is able to operate in wide frequency band if desired.
To this end, the invention first proposes a vector adding means of two alternating electrical signals modulated or not, comprising:
R \ Patent \ 22700 \ 22719 doctoral 2/22 - a first input for receiving a first alternating electric signal;
- a second input for receiving a second alternating electric signal;
- a first circuit connected to the first input and comprising a number n of outputs, the first circuit providing, from the first AC signal applied to the first input, a respective AC signal on each of the n outputs, said alternating signals supplied on n outputs being all of the same amplitude and same frequency but mutually phase shifted so that each is either in phase or in phase opposition with any other;
- a second circuit connected to the second input and comprising a same number n of outputs, the second circuit dividing the second alternating signal to its n outputs; and
- an even number n of adders each receiving as input a respective output of the first circuit and a respective output of the second circuit; wherein the number n is greater than or equal to 3. According to preferred embodiments, the invention comprises one or more of the following:
- each of the alternating signals supplied by the first circuit on its n outputs is out of phase with respect to each of the other AC signals provided by the first circuit on its n outputs of 20 ° to 160 ° in advance or delay; - the summing each comprise two transistors connected as a differential amplifier;
- the first circuit comprises an even number n of amplifiers, the input of each amplifier being connected to the first input and the output of each of the amplifiers then being connected to a respective phase shift circuit. - the number n is equal to 3
- each of the alternating signals supplied by the first circuit on its three outputs is out of phase with respect to each of the other two alternating signals supplied by the first circuit on its three outputs by an angle of 80 ° to 160 ° in advance or delay; - each of the alternating signals supplied by the first circuit on its three outputs is out of phase with respect to each of the other two alternating signals supplied by the first circuit on its three outputs by an angle of 120 ° in early or late;
- the output of each of the adders is connected to a respective power sensor.
The invention also provides a demodulator by direct frequency conversion, including:
- an addition device vector according to the invention;
R \ Brcvets \ 22700 \ 22719 doc - 3/22 - a same number n of analog / digital each connected to a respective power sensor; and
- a digital processing circuit determining the Cartesian components of the complex envelope of the signal applied to the second input of the vector adding means from the measurements provided by the n power sensors. The invention also provides an RF receiver, including:
- a demodulator according to the invention; a local oscillator connected to the first input of the vector addition device; - an RF receiving antenna; and
- an amplifier of the signal received by the antenna to apply the second input of the vector addition device.
The invention further provides a modulator-demodulator by direct frequency conversion, comprising a demodulator according to the invention and wherein the modulator comprises:
- an even number of n variable gain amplifiers, the input of each amplifier being connected to a respective output of the first circuit of the vector addition device;
- a summing circuit receiving as input the output of each of the n variable gain amplifiers;
- a digital processing circuit providing a same number n of amplifier gain commands from the Cartesian components of the complex envelope to provide modulation; and
- an even number n of digital / analog converters, the input of each being connected to the digital processing circuit and the output of each being connected to the gain control input of a respective amplifier.
The modem can advantageously comprise a circuit for selectively connecting the second input of the addition circuit to the vector output of the adder receiving as input the output of each of the n variable gain amplifiers.
The invention further provides a transceiver, comprising:
- a modulator-demodulator according to the invention;
- a local oscillator connected to the first input of the vector addition device; and - at least one RF antenna and at least one amplifier for supplying the second input of the vector adding means and outputting the signal obtained at the output of the summator connected to n variable gain amplifiers.
R: \ Brcvets \ 22700 \ 22719.doc - 4/22 The invention also provides a modulator of the calibration process of a modem according to the invention at a given frequency, the demodulator having been previously calibrated at the given frequency , the method comprising the steps of: - applying an alternating signal at the selected frequency to the first input of the vector addition device;
- connecting of the second input of the addition circuit to the vector output of the adder receiving as input the output of each of the n variable gain amplifiers; - generation by the signal modulator modulated components from the signal complex envelope Cartesian;
- comparison of the Cartesian components of complex envelope provided by the demodulator as a result of the previous step with the component signals of Cartesian complex envelope used in the generation of modulated signals; and
- calibration of the modulator according to the results of the previous step. The invention finally proposes a method of calibration of a modem demodulator according to the invention at a given frequency, the modulator having previously been calibrated at the given frequency, the method comprising the steps of:
- applying an alternating signal at the selected frequency to the first input of the vector addition device;
- connecting of the second input of the addition circuit to the vector output of the adder receiving as input the output of each of the n variable gain amplifiers;
- generation by the signal modulator modulated components from the signal complex envelope Cartesian;
- comparison of the Cartesian components of complex envelope provided by the demodulator as a result of the previous step with the component signals of Cartesian complex envelope used in the generation of modulated signals; and
- Calibration of the demodulator according to the results of the previous stage. Other features and advantages of the invention will become apparent from reading the following description of a preferred embodiment of the invention, given by way of example and with reference to the accompanying drawings.
Figure 1 is an illustration in the Fresnel plane of existing electrical signals in an adding device vector according to the invention.
R: \ Patent \ 22700 \ 22719.doc - 5/22 Figure 2 is a block diagram of a transceiver implementing the invention.
Figure 3 is an electronic diagram of a particular embodiment of a transceiver according to the invention. Figures 4 to 6 illustrate the results obtained with the circuit described with reference to Figure 3.
The adding device Vector two alternating electrical signals according to the invention comprises a first input for receiving a first alternating electric signal and a second input for receiving a second alternating electric signal. It comprises a first circuit connected to the first input and comprising a number n of outputs, the first circuit providing, from the first AC signal applied to the first input, a respective AC signal on each of the n outputs, said alternating signals contained the n outputs being all of the same amplitude and same frequency but out of phase with each other. These AC signals provided on the n outputs are out of phase so that each is either in phase or in phase opposition with any other of them. In other words, in the Fresnel plane, none of the corresponding vectors is collinear with another of these vectors. The number n is greater than or equal to 3.
It further comprises a second circuit connected to the second input and comprising the same number n of outputs, the second circuit dividing the second alternating signal to its n outputs. Finally, it includes the same number n of input adders, each receiving a respective output of the first circuit and a respective output of the second circuit.
This device allows in particular to provide multiple signals resulting from the sum of the same AC signal with another alternative of the same frequency phase-shifted signal each time a different angle, which then compares the two signals on the basis of resultant signals .
In the Fresnel plane, the first signal provides a kind of vector basis defined by n vectors, each then being added to the second signal. Figure 1 illustrates this situation with the number n equal to 3, the reference 100 indicates the vector corresponding to the second signal which is added repeatedly to the first signal each time phase shifted in this case 120 ° and whose vectors are indicated by 101A, 101B and 101C. The resulting vectors amounts are referenced 102A, 102B and 102C. Such an addition device advantageously makes it possible to compare two alternating signals of the same frequency from the point of view of their phase and their amplitude. To do this, simply apply one to the first input of the device and the other to the second input of the device. In particular, the comparison can be
R \ Patent \ 22700 \ 22719 doc - 6/22 effected on the basis of the modules of the resulting vectors can be measured by a respective power sensor. The fact that the signals of the n outputs of the first circuit are neither in phase nor out of phase with each other ensures that each "projection" of the phasor corresponding to the second signal on the first phasor signal thus phase-shifted is different each time and that in particular one of these "projections" includes a substantial proportion of the real and imaginary components of the corresponding vector in the second signal. This is advantageous compared with the case where the signal is divided into four phase shifted signals in each case by 90 ° as is the case in EP-AO 841 756 because when the signal phase is close to that of one of the four vectors correspondents, the estimation of a component is low and therefore the greater uncertainty.
It is preferable that the alternating signals supplied to the n outputs of the first circuit are each phase-shifted in relation to all the other of these signals by an angle in the range of 20 ° to 160 °, inclusive, whether this either early or late. In other words, in the Fresnel plane, the direction of vector corresponding to any of those signals forms an angle of at least 20 ° relative to the direction of vector corresponding to any of these other signals. This provides sufficient sensitivity to make the comparison. From this point of view, it is advantageous to choose in the case of n equal to three a configuration in which each of the first circuit output signal is phase shifted by + 120 ° and -120 ° with respect to the other two output signals.
This device is advantageously applicable when an incident signal is compared with a reflected signal to determine a reflectance, for example in the analysis of power systems. Similarly, it is applicable for the determination of transmittance from an incident signal and the transmitted signal to implement a radar discriminator.
This device allows also to implement a demodulator by direct frequency conversion by applying to the second input the modulated signal and the first input signal of a frequency controlled local oscillator to that of the modulated signal. This is preferably digital modulation, but the analog modulation is also possible. Preferably, it is modulation in phase and / or amplitude, but frequency modulation is also possible. The fact the use of adders followed by quadratic detectors is advantageous over the use of mixers such as in US-5,095,536 as these are more complex and more expensive.
Having the number n at least equal to three makes it possible to provide an information redundancy for the correction of system faults. First, the third vector eliminates the ambiguity due to the quadratic detection
R \ Patent \ 22700 \ 22719 Doc - 7/22 power measurement. Then, this redundancy also proves useful to reduce the impact of imperfections circuits that appear as phase mismatch and gain, causing a distortion in the constellation of the demodulated signal. If the number n is equal to three is advantageous because of its implementation simplicity and limited cost compared to the case where the number is greater than three as in the case of EP-AO 841 756. Ideally, three signals output by the first circuit are phase shifted by 120 ° in order to maximize the "projections" of the second signal on different vectors of the vector basis. The further away from this ideal case, the more accurate comparison into practice deteriorates, but the comparison is still possible even if the phase difference is no more than about 20 °.
We will now describe a transceiver implementing the invention, a vector addition device three-way (that is to say, with the number n equal to three) with reference to Figure 2.
The receiver portion of the transceiver comprises a demodulator D, a local oscillator LO and a receiving antenna of the modulated signal RFin.
The demodulator D comprises a base vector generator 1, an RF signal divider circuit two, three RF signals of summers 3a, 3b and 3c, three power sensors 4a, 4b and 4c, an analog conversion block / 5 digital and a digital processing circuit 6.
As will appear from the description below, the base generating vector 1, the RF signal splitter circuit 2 and the three RF signals of summers 3a, 3b and 3c constitute an adding device vector as described above.
D demodulator receives as input the modulated signal RFin and the AC signal of a local oscillator LO which serves as a reference.
The signal from the local oscillator LO is input to the vector basis generator 1. From this signal, the base generating vector 1 outputs three AC signals of the same frequency and the same amplitude, but are out of phase with them, each of the three signals being provided on a separate channel. Each of the three channels is connected to an input of a respective adder 3a, 3b and 3c. The phase shift between the three signals can be achieved using passive or active filters, transmission lines, or any other circuit providing a phase shift to a signal in the frequency range of operation of the demodulator.
The modulated signal RFin is amplified by an amplifier low braying, not shown, before being applied to the divider circuit 2. The divider circuit 2 divides the modulated signal RFin to three separate channels without introducing a phase shift between
R: \ Brcvets \ 22700 \ 22719.doc - 8/22 they or amplitude difference. Each of these three ways is connected to the input of a respective adder 3a, 3b and 3c. The divider circuit 2 is shown symbolically in Figure 1 by an input branch to which are connected three branches each connected to an input of a respective adder 3a, 3b and 3c. In practice, the divider circuit 2 may be implemented by the parallel transistors with their matching circuits and bias, which has the advantage of allowing the integration of the circuit and provide a wide operating band by compared to conventional structures based on propagation lines such as Wilkinson dividers. Each of the adders 3a, 3b and 3c thus outputs a signal corresponding to the addition of the signal supplied by a respective channel of the basic vector generator 1 and RFin signal after division. The power of the output signal of each adder 3a, 3b and 3c is measured by a respective power sensor 4a, 4b and 4c which outputs an analog signal representative of the signal strength. Preferably, each power sensor 4a, 4b and 4c is implemented by a nonlinear element such as a Schottky diode, followed by a low pass filter for removing signal components other than the base band.
The analog signal supplied by each power sensor 4a, 4b and 4c is then converted to digital signal by the analog conversion block / digital converter 5, the digital signal being supplied to the digital processing circuit 6. Before digital conversion, the analog signal can optionally be conditioned by a controllable gain amplifier circuit and / or a compensation circuit of the continuous voltage or current offset. The analog / digital conversion block 5 is implemented by an analog / digital converter for each respective power sensor 4a, 4b and 4c, with the sampling of these converters being simultaneous to ensure consistency of the three measurement channels.
In operation, the frequency of the local oscillator LO is based on that of the modulated signal RFin.
The digital processing circuit 6 determines the Cartesian components of the complex envelope - referenced Out (I, Q) in Figure 1 - of the modulated RFin signal by digital processing of signals representative of the powers measured by power sensors 4a, 4b and 4c. In other words, the digital processing circuit 6 supplies the demodulated signal. The digital processing circuit can typically comprise a microprocessor. Digital processing can be based on a suitable algorithm and / or a conversion table such as for example described by FR de Sousa, B. HUYART, SYC Catunda and RN Lima in "A to D Converters and Look-up tables Dimensioning for Five-Port Reflectometer Based Systems "published in the proceedings of the
A: \ Patent \ 22700 \ 22719.doc - 9/22 Company conference Instrumentation and measurement of IEEE, 2003, p. 743- 747 incorporated by reference herein.
This digital processing is based on the transfer functions of the different channels of the demodulator, including phase shifts and attenuations introduced by the base generating vector 1, by the divider circuit 2 and the summing circuits 3a, 3b and 3c as well as defects of linearity of power sensors 4a, 4b and 4c. Furthermore, these transfer functions generally vary with the frequency that the receiver is working.
the transfer function of the parameters can be determined by a calibration procedure similar to those used in the prior art for receivers five ports or the like. For example, sequences of predetermined modulated signals are sent from a base station to the transceiver which has previously stored the Cartesian I and Q components - respectively the real part and the imaginary part - corresponding to the complex envelope of these signals. After demodulation, the digital processing circuit 6 calculates the calibration constants so that the Cartesian components obtained by demodulation are identical to those in memory, and to calibrate the receiver D according to the deviations.
To complete the receiver part, the digital processing circuit 6 may further to decode the signal demodulated before being restored in conventional manner.
We describe below a mathematical model of operation of the demodulator D. The base generator Photo 1 provides three signals each of which can be expressed as follows: v 1 (t) = 1 Go .V L o cos (ωt + γ 1) (1) with:
VLO and ω: the amplitude and angular frequency of the signal supplied by the local oscillator LO respectively;
Yi: the relative phase of the output channel i considered the basic vector generator 1; and ranges: the gain of the output channel i considered the basic vector generator 1. The divider circuit 2 supplies three signals each expressing by: with:
- V RF (t), θ (t) and ω: respectively the instantaneous amplitude, instantaneous phase and the pulsation of the modulated RFm inputted signal;
- λ, that the relative phase of the signal on the output channel i of the divider 2; and
R \ Brevcts \ 22700 \ 22719 doc - 10/22 - Vb; : The gain of the output channel i considered the divider 2.
In the case of power sensors 4a, 4b and 4c functioning as quadratic detectors, each outputs a signal represented by the following equation: Vi (t) = I o L 2 .V. + Bj. VRF (t) 2 + q.Vw <t) cos (θ (t) - φ;) (3) where φi = Yi. λj, Cj is dependent aj and b; , V LO, which is assumed constant, has ;, bj, y; and λ; the above mentioned parameters in Equations 1 and 2.
The components of the baseband, i.e. the real part I (t) = V R p (t) cos θ (t) and the imaginary part Q (t) = VRF (t) .cosθ (t), are determined by a linear combination of the signals V i (t) supplied by the power sensors 4a, 4b and 4c weighted by the calibration constants as shown in the equations below:
β (0 = ΣM (0+ "fl (5)
J = I
wherein n is the number of outputs of adding circuit Vector and CCi, β ;, K and KQ are constants dependent on the values aj, bj, γι, λ; and VLO The calibration procedure mentioned before is to determine have, β ;, K and KQ. In this case, for n = 3, these constants are expressed in terms of the parameters a ;, b; and one from a matrix inversion of the system of three equations relating the three measurement data v 3 (t), v 4 '(t) and v 5' (t) at three unknowns VRFCO 2 'I (t) , Q (t) below:
v 3 (t) = b 3. VRFCO 2 + C 3 - cos φ 3 1 (F) + c 3. sin φ 3 Q (t)
V 4 1 ct) = b 4. VRF (0 2 + c cos φ 4 4 I (t) + c 4 · sin φ 4 Q (t) v 5 '(t) = b 5. VRFCO 2 + c cos φ 5 5 1 (F) + C 5. sin φ 5 Q (t)
3 with v '(t) = v 3 (t) - 3 .V LO 2, v 4 (t) = v 4 (t) - 4 .V LO 2, v 5' (t) = v 5 (t) - 5 SO 2 .V. The variables v 3 (t), v 4 (t), v 5 (t) are the analog output voltages of the power sensors. The constants a, .VLo 2 can be determined before the matrix inversion by making measurements at power sensor outputs with V R Fi (t) = 0 and V L o (t) = VLO-COS ωt. Experimental methods for
R: \ Patent \ 22700 \ 22719.doc - 11/22 solve the system of equations above are well known in the literature, such as that described in FR article de Sousa, B. HUYART and RN Lima entitled "A new method for automatic calibration of 5-port Reflectometers. Journal of Microwave and Optoelectronics, Vol. 3, No.5, pp.135-144, 2004 Juiy "which is incorporated by reference in the present application and wherein the constants are estimated from known two slightly offset RF signals in frequency and voltage measurements to the outputs of quadratic detectors.
The transmitter portion of the transceiver is based on a modulator M. The modulator M comprises a digital processing circuit which may be shared with the demodulator D as shown in Figure 1 by the circuit 6. D also comprises a block digital / analog conversion three RF amplifiers 7 and adjustable gain 8a, 8b and 8c and an RF signal summer 9.
Although not included in the M block in Figure 1, the modulator M further comprises base vector generator 1 is therefore preferably common with the demodulator D. Each of the three output channels 1 VBG is applied to the input a respective amplifier 8a, 8b and 8c.
The gain of each amplifier is controlled by a respective signal determined by the digital processing circuit 6 from the Cartesian components In (I, Q) of the coded signal to be modulated for transmission. This digital processing is based on the transfer functions of each channel of the modulator, including phase shifts and attenuations introduced by the base generating vector 1 and the non-linearities of the amplifiers 8a, 8b and 8c. Here too, these transfer functions generally vary with the frequency of the modulator works. It will be understood that the amplifiers 8a, 8b and 8c do not necessarily work with a gain greater than 1, but can work also or exclusively a gain less than 1, that is to say, attenuator. The gain control signal determined by the digital processing circuit 6 are converted into analog signals by the digital / analog conversion block 7 to be each applied to the control input of a respective amplifier 8a, 8b and 8c. The digital / analog conversion block 7 is implemented by a digital / analog converter for each respective amplifier 8a, 8b and 8c.
The output of each amplifier 8a, 8b and 8c is applied to a respective input of the adder 9. Thus, the adder 9 outputs the modulated signal RFout which is the sum of three signals supplied by the amplifiers 8a, 8b and 8c.
R: \ Patent \ 22700 \ 22719.doc - 12/22 To complete the transmitter, the output signal RFout of the modulator M is then typically amplified and applied to a transmitting antenna. Furthermore, the coding of the signal to be transmitted can be achieved by the digital processing circuit 6 prior to the determination of the gain control signals of the amplifiers 8a, 8b and 8c.
Both the vector adding means according to the invention that the demodulator and the modulator-demodulator which incorporate may be implemented to work at any frequency, which operate the receiver and the transceiver. They are particularly suitable for work at frequencies greater than or equal to 900MHz and can be used in broadband applications or multiband covering several gigahertz.
The receiver and transmitter-receiver according to the invention can work in different frequency bands by calibrating the frequency of the local oscillator to the desired frequency. In the case of the transmitter-receiver, the transmission and reception can be done at the same frequency or at different frequencies by changing the frequency of the local oscillator in correspondence.
The invention provides a transceiver economic solution adapted to work by duplex time division - abbreviated as TDD in English - as the basic vector generator is common to the transmitting part and the receiving part. It is possible to implement a transceiver operating in frequency division duplex in - abbreviated as FDD in English - by adding a second base generating vector, one being specific to the demodulator and the other modulator.
Moreover, the transceiver may be an automatic calibration of the modulator M after its demodulator D has been calibrated. The preliminary calibration of the demodulator D can be carried out conventionally, such as described above. A controlled switch 20 - made, for example by a transistor - to selectively connect the output RFout at the input RFin of the modulator M demodulator D. The connection is shown in dashed lines in Figure 2. The digital processing circuit 6 comprises memory the Cartesian components of the complex envelope of a predetermined sequence of signals. To proceed with the calibration of the modulator M, the digital processing circuit 6 causes the closure of the switch 20. Then, he arranges the modulation from the Cartesian components in the memory by determining the gain controls for the amplifiers 8a , 8b and 8c from the parameters of the modulator M it has in memory. The modulated signals output by the modulator M are then demodulated by the demodulator D. The digital processing circuit 6 then compares the Cartesian components of the envelope
R \ Brcvets \ 22700 \ 227I9 doc - 13/22 complex obtained by demodulation with the corresponding Cartesian components in memory used for the modulation. The digital processing circuit 6 then proceeds to the calibration of the modulator M based on the differences found during comparison. This calibration is made possible that the demodulator D has previously been calibrated and so the differences observed when comparing only from the error on the parameters of the memory modulator M in the digital processing circuit 6.
Similarly, the transceiver can be an automatic calibration of its demodulator D after its modulator M has been calibrated in a conventional manner.
The automatic calibration procedures can be implemented even if the modulator (M) and the demodulator (D) each have their own basic generator Vector. They can also be applied in the modems of the prior art. Figure 3 shows a simplified electronic diagram of the transceiver of Figure 2 which has been implemented in MMIC (monolithic microwave integrated circuit) using GaAs technology (ED02AH) of OMMIC society. In particular, the matching circuits and bias were not shown for convenience. Base vector generator 1 has a divider circuit a path toward three-way directed by three amplifiers the input of which each is connected to the local oscillator LO. In this case, each amplifier is implemented as a Tl type FET 20 .mu.m x 4. The fact of using an amplifier based divider circuit keeps a constant response over a wide band frequency.
The transistors Tl are followed by respective phase shift circuits to provide three output signals phase shifted between them. In this case, it is used two-pass filters and band pass filter of the fourth order. The following component values provide a phase shift of 120 ° between two consecutive output channels of the basic vector generator 1 in the frequency band 1.8 to 5.5 GHz CIa: 0.16 pF Cb: 0.47 pF CIC 0.31 pF
C2a: 0.65 pF Lb: 4,2 nH C2c: 1, 25 pF
The 2.9 nH Lk 5.6 nH
The adders 3a, 3b and 3c as well as power sensors 4a, 4b and 4c are formed identically. For this reason, only the components of the adder 3a and 4a of the power sensor are referenced in Figure 3.
The adders 3a, 3b and 3c are each formed by a pair of transistor T2 connected as a differential amplifier. In this case, the transistors T2 are of the type
R \ Patent \ 22700 \ 22719 doc - 14/22 x 20 .mu.m FET 2. The use of the transistors has the advantage of operating in a wide frequency band compared to the adders using transmission lines. In addition, they offer the choice of amplification, which can be an advantage when considering using the system with RF signals of low power. power sensors 4a, 4b and 4c are each formed by a transistor T3 in this case of the type FET lOμm x 1 with the channel near the pinch, which does operate in a highly non-linear regime which approximates that of a Schottky diode. They are each followed by a low pass filter to retain the second order terms resulting from addition of signals made by the adders 3a, 3b and 3c. In this case, each low-pass filter includes resistors Rl and R2 and the capacitor C3 whose values are:
Rl: 0.5 kW R2: 10 kW C3: 10 pF
The low-pass filter of each power sensor 4a, 4b and 4c delivers a respective output voltage Va, Vb and Vc which is then digitized by the analog conversion block / D 5 - not shown in Figure 3 - for the purposes of digital processing to provide the Cartesian components of the complex envelope of the modulated signal RFin.
It is specified that in the circuit of Figure 3, the modulated signal RFin is applied to the gates of three transistors of the adder 3a, 3, and 3c. The connecting their gates is possible because the insulation between drain and gate is extremely high, which allows to consider the transistor as being unidirectional. The matching circuit - not shown - takes into account the reflectance of the three transistors for adaptation. Individually, each transistor functions as an amplifier. In this way is obtained the reference divider circuit 2 in Figure 2.
The variable gain amplifiers 8a, 8b and 8c of the modulator M are all made the same way, for which reason only the components of the amplifier 8a are referenced in Figure 3. Each amplifier comprises two transistors T4 and T5 connected in cascode. gain control voltages are symbolized by the generators 10a, 10b and 10c respectively. In this case, the transistors T4 are of the FET 25 .mu.m and 4 x T5 transistors are of the type FET 22,5μm x 2. The use of amplifiers 8a, 8b and 8c cascode is advantageous because you only have connect all their outputs to achieve the adder 9 given their isolation. Finally, T transceiver includes a switching unit 11 that selectively allows to interconnect or isolate the output RFout of the modulator and the input RFin of the demodulator in accordance with a control signal applied to the input 12. This possible to implement automatic calibration procedure
R \ Patent \ 22700 \ 22719 doc - 15/22 modulator or the demodulator as described above with reference to Figure 2. The block 11 is based on four transistors T6, namely type FET 8 x 65μm.
Figures 4 to 6 illustrate the results obtained with the circuit described with reference to Figure 3.
More particularly, Figure 4 shows the coefficients of transmission of the three channels of the basic vector generator 1. The coefficients module lies between -7 dB and -17 dB in the band between 1.8 GHz and 5.5 GHz. Regarding the phase shift, we get 120 ° on the three routes around 3.5 GHz, and ends phase differences are about 80 ° and 160 °.
The voltages measured at the output of detectors before and after linearization procedure is presented in Figure 5. The detectors can not be characterized in isolation, we applied a power gradient ranging from - 10 dBm to +10 dBm at input of the demodulator circuit for two separate frequencies, i.e. 2 GHz and 5 GHz.
We applied a signal at 0 dBm at the input of base generating vector 1 and another signal to -3 dBm at the input of the demodulator. We performed measurements at 2 GHz and 5 GHz by setting an offset of 1 kHz between the two generators. The measured voltages are illustrated in FIG. 6. These results show that the circuit is able to provide baseband voltages corresponding to the signal resulting from the addition of two RF signals combined in different phase shifts, which calculates the complex ratio of the two signals and thus to perform the demodulation function. In addition, it has been shown that the amplitude of RP three phase signals is varied according to a voltage control, which allows for the modulation function.
Of course, the present invention is not limited to the examples and the embodiment described and shown, but is capable of many variants accessible to the skilled person.
R \ Patent \ 22700 \ 22719 doctoral 16/22
Priority Applications (2)
|Application Number||Priority Date||Filing Date||Title|
|FR0410644A FR2876517B1 (en)||2004-10-08||2004-10-08||Demodulator and modulator-demodulator by direct frequency conversion|
|PCT/FR2005/002476 WO2006040453A3 (en)||2004-10-08||2005-10-07||Demodulator and modulator/demodulator by direct frequency conversion|
|Publication Number||Publication Date|
|EP1844544A2 true true EP1844544A2 (en)||2007-10-17|
Family Applications (1)
|Application Number||Title||Priority Date||Filing Date|
|EP20050809116 Withdrawn EP1844544A2 (en)||2004-10-08||2005-10-07||Demodulator and modulator/demodulator by direct frequency conversion|
Country Status (4)
|US (1)||US7890081B2 (en)|
|EP (1)||EP1844544A2 (en)|
|FR (1)||FR2876517B1 (en)|
|WO (1)||WO2006040453A3 (en)|
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|US9325282B2 (en) *||2009-09-08||2016-04-26||California Institute Of Technology||Self-healing technique for high frequency circuits|
|JP2011205283A (en) *||2010-03-25||2011-10-13||Yamaha Corp||Signal processor|
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