EP1844544A2

EP1844544A2 - Demodulator and modulator/demodulator by direct frequency conversion

Info

Publication number: EP1844544A2
Application number: EP05809116A
Authority: EP
Inventors: Bernard Huyart; Fernando Rangel De Sousa
Original assignee: Groupe Des Ecoles De Telecommunications - Ecole Nationale Superieure Des Telecommunications; GROUPE DE ECOLES DE TELECOMM E; Groupe de Ecoles de Telecommunications Ecole National Superieure des Telecommunications
Current assignee: Groupe Des Ecoles De Telecommunications - Ecole Na
Priority date: 2004-10-08
Filing date: 2005-10-07
Publication date: 2007-10-17
Also published as: FR2876517A1; WO2006040453A3; FR2876517B1; US7890081B2; WO2006040453A2; US20080064433A1

Abstract

The demodulator by direct frequency conversion comprises a vector addition device having: a first circuit (1) that furnishes, starting from a first AC signal (LO), a respective AC signal to n outputs that are not all of the same amplitude and of the same frequency, but are out of phase with regard to one another in such a manner that each one is not either in phase nor in opposite phase with any other; a second circuit (2) that splits a second AC signal (RFin) toward n outputs; a number n of summers (3a, 3b, 3c) each receiving, at the input, a respective output of the first circuit (1) and a respective output of the second circuit (2), and; a respective power sensor (4a, 4b, 4c) for each summer, whereby the number n is greater than or equal to 3. The demodulator also comprises digital processing means (5, 6) that furnish the result of the demodulation.

Description

DEMODULATOR AND MODULATOR-DEMODULATOR BY DIRECT FREQUENCY CONVERSION

The present invention relates to the field of radio frequency applications, in particular that of radiocommunication with carrier frequency and transceivers by direct conversion of frequency. The invention more particularly relates to a demodulator and a modulator-demodulator adapted to be used in particular in such transceivers.

Direct frequency conversion receivers - also known as homodynes - have become widespread today because of the simplicity of the circuits which makes it possible to limit the costs in comparison with heterodyne architectures. Its principle is based on the vector decomposition of the modulated signal received. Since the modulated signals received are completely characterized by their complex envelopes, a base defined by two orthogonal vectors - the so-called Cartesian base - is sufficient to represent them. However, it is very difficult to provide a two-way circuitry ensuring orthogonality between two signals in a high frequency range as used in broadband and / or multiple band systems.

Direct frequency conversion receivers more suitable for broadband and / or multiple band systems are the five or six port receivers, see more, which provide from two inputs at least three output signals from which it can be estimated the Cartesian components of the complex envelope of the modulated signal received. These systems make it possible to overcome the orthogonality constraints of Cartesian receivers by means of a calibration procedure throughout the operating frequency band. Similarly, there are uplinks for direct conversion transmitters using two-way modulators carrying Cartesian base signals. Modulators based on three vectors have also been proposed.

Such receivers or transmitters by direct frequency conversion providing three or more output signals are presented in the following documents:

EP-A-0 805 561 discloses a six-port junction based demodulator, power detectors and an analog processing circuit for retrieving the I and Q Cartesian components of the complex envelope of the received signal. US-A-6,650,178 a direct conversion receiver with at least three ports. This circuit uses two passive interferometric circuits connected by a phase shifter element. The information carried by the received signal is recovered from the

R: \ Patents \ 22700 \ 22719.doc - 1/22 power measurements taken at the exit ports of the interferometric junctions.

US-A-5,498,969 discloses a six-port junction architecture applied to a vector measurement device with a power divider circuit, a phase shifter circuit, a suitable power sensor and three other non-adapted.

EP-A-0 841 756 discloses a six-port receiver using a correlator circuit in which the received modulated signal is summed with four signals from the reference oscillator, but out of phase with each other by 90 °. The values of the Cartesian components of the baseband signal are found by an analog circuit from the powers of the RF signals.

US-A-5,095,536 discloses a direct conversion receiver based on a three-phase architecture and three mixer circuits. The reference signal is divided into three out of phase channels which are then mixed with the received modulated signal. The information is recovered by digital processing of the signals supplied to the filter and amplifier outputs placed after the mixers.

F. Ellinger, U. Lot and W. Bâchtold describe a modulator circuit that uses a vector base of three linearly dependent vectors in the document entitled "An antenna Diversity MMIC Vector Modulator for HIPERLAN with Low Power Consuption and Calibration Capability" published in pages 964-969 of IEEE Transactions on Microwave Theory and Technique, Vol. 49, N. 5,

2001.

• The article "A 1.4 - 2.7 GHz Analog MMIC Vector Modulator for a Crossbar Beamforming Network" by J. Grajal, M. Mahfoudi, J. Gismero and FA Petzjparu in the pages 1705-1714 of the IEEE Journal Transactions on Microwave Theory and Technique , Flight. 45, N. 10, 1997, discloses a vector modulator using three phase-shifted vector 120 ^°.

The aim of the invention is to propose a new technology for demodulation, or even modulation and demodulation, by direct frequency conversion which is of a simple and economical implementation, which can notably be implemented at high frequencies such as as microwave but allow to be integrated more easily than existing technologies and that is capable of operating in wide frequency band if this is desirable.

To this end, the present invention firstly proposes a vector addition device of two modulated or non-modulated alternating electrical signals, comprising:

R \ Patents \ 22700 \ 22719 doc- 2/22 a first input for receiving a first alternating electrical signal;

a second input for receiving a second alternating electrical signal;

a first circuit connected to the first input and comprising a number n of outputs, the first circuit supplying, from the first alternating signal applied to the first input, a respective alternating signal on each of the n outputs, the said alternative signals supplied on the n outputs being all of the same amplitude and the same frequency but out of phase with each other so that each is neither in phase nor in phase opposition with any other;

a second circuit connected to the second input and comprising the same number n of outputs, the second circuit dividing the second alternating signal towards its n outputs; and

the same number n of summators each receiving at input a respective output of the first circuit and a respective output of the second circuit; wherein the number n is greater than or equal to 3. According to preferred embodiments, the invention comprises one or more of the following features:

each of the alternating signals supplied by the first circuit on its n outputs is out of phase with each of the other alternating signals supplied by the first circuit on its n outputs of 20 ° to 160 ° in advance or late; the summators each comprise two transistors mounted in a differential amplifier;

the first circuit comprises the same number n of amplifiers, the input of each of the amplifiers being connected to the first input and the output of each of the amplifiers being then connected to a respective phase shift circuit. the number n is equal to 3

each of the alternating signals supplied by the first circuit on its three outputs is out of phase with each of the other two alternative signals supplied by the first circuit on its three outputs by an angle of 80 ° to 160 ° in advance or late; each of the alternating signals supplied by the first circuit on its three outputs is out of phase with each of the other two alternative signals supplied by the first circuit on its three outputs by an angle of 120 ° in advance or late;

the output of each of the summers is connected to a respective power sensor.

The invention also proposes a direct conversion demodulator, comprising:

a vector addition device according to the invention;

R \ Brcvets \ 22700 \ 22719 doc - 3/22 the same number n of analog / digital converters each connected to a respective power sensor; and

a digital processing circuit determining the Cartesian components of the complex envelope of the signal applied to the second input of the vector addition device from the measurements provided by the n power sensors. The invention also proposes an RF receiver, comprising:

a demodulator according to the invention; a local oscillator connected to the first input of the vector addition device; - an RF receiving antenna; and

an amplifier of the signal received by the antenna for applying it to the second input of the vector addition device.

The invention also proposes a direct conversion modulator-demodulator comprising a demodulator according to the invention and in which the modulator comprises:

a same number n of variable gain amplifiers, the input of each amplifier being connected to a respective output of the first circuit of the vector addition device;

an adder receiving as input the output of each of the n variable gain amplifiers;

a digital processing circuit providing the same number of amplifier gain controls from the Cartesian components of the complex envelope to be provided by modulation; and

a same number n of digital / analog converters, the input of each being connected to the digital processing circuit and the output of each being connected to the gain control input of a respective amplifier.

The modulator-demodulator may advantageously comprise a circuit for selectively connecting the second input of the vector addition circuit to the output of the adder receiving as input the output of each of the n variable gain amplifiers.

The invention also proposes a transceiver, comprising:

a modulator-demodulator according to the invention;

a local oscillator connected to the first input of the vector addition device; and at least one RF antenna and at least one amplifier for supplying the second input of the vector addition device and for transmitting the signal obtained at the output of the summator connected to the n variable gain amplifiers.

R: \ Brcvets \ 22700 \ 22719.doc - 4/22 The invention also proposes a method of calibrating the modulator of a modulator-demodulator according to the invention at a given frequency, the demodulator having been previously calibrated at the given frequency, the method comprising the steps of: - application of a signal alternating with the frequency given at the first input of the vector addition device;

connecting the second input of the vector addition circuit to the output of the summator receiving as input the output of each of the n variable gain amplifiers; - Generation by the modulator of modulated signals from Cartesian components of complex envelope of signals;

comparing the complex envelope Cartesian components provided by the demodulator as a consequence of the previous step with the Cartesian complex signal envelope components used to generate the modulated signals; and

- calibration of the modulator according to the results of the previous step. The invention finally proposes a method of calibrating the demodulator of a modulator-demodulator according to the invention at a given frequency, the modulator having been previously calibrated at the given frequency, the method comprising the steps of:

applying an alternating signal at the frequency given to the first input of the vector addition device;

connecting the second input of the vector addition circuit to the output of the summator receiving as input the output of each of the n variable gain amplifiers;

- Generation by the modulator of modulated signals from Cartesian components of complex envelope of signals;

- Calibration of the demodulator according to the results of the previous step. Other characteristics and advantages of the invention will appear on reading the following description of a preferred embodiment of the invention, given by way of example and with reference to the appended drawing.

FIG. 1 is an illustration in the Fresnel plane of the electrical signals existing in a vectorial addition device according to the invention.

R: \ Patents \ 22700 \ 22719.doc - 5/21 Figure 2 is a block diagram of a transceiver embodying the invention.

FIG. 3 is an electronic diagram of a particular embodiment of a transceiver according to the invention. FIGS. 4 to 6 illustrate the results obtained with the circuit described with reference to FIG.

The vector addition device of two alternative electrical signals according to the invention comprises a first input for receiving a first AC electrical signal and a second input for receiving a second AC electrical signal. It comprises a first circuit connected to the first input and comprising a number n of outputs, the first circuit providing, from the first alternating signal applied to the first input, a respective alternating signal on each of the n outputs, said alternative signals provided on the n outputs being all of the same amplitude and the same frequency but out of phase with each other. These alternative signals provided on the n outputs are out of phase so that each is neither in phase nor in phase opposition with any other of them. In other words, in the Fresnel plane, none of the corresponding vectors is collinear with another of these vectors. The number n is greater than or equal to 3.

It further comprises a second circuit connected to the second input and comprising the same number n of outputs, the second circuit dividing the second AC signal to its n outputs. Finally, it comprises the same number n of summers each receiving at input a respective output of the first circuit and a respective output of the second circuit.

This device makes it possible, in particular, to supply several signals resulting from the sum of the same alternating signal with another alternating signal of the same frequency each time being out of phase at another angle, which then makes it possible to compare the two signals on the basis of the resulting signals. .

In the Fresnel plane, the first signal provides a kind of vector base defined by n vectors, each of which is then added to the second signal. FIG. 1 illustrates this situation with the number n equal to 3, the reference 100 indicating the vector corresponding to the second signal, which is added several times to the first signal each time out of phase in this case by 120 ° and whose vectors are indicated by 101A, 101B and 101C. The resulting vectors of the sums are referenced 102A, 102B and 102C. Such an addition device advantageously makes it possible to compare two alternating signals of the same frequency both from the point of view of their phase and of their amplitude. For this, simply apply one to the first input of the device and the other to the second input of the device. In particular, the comparison can be

R \ Patents \ 22700 \ 22719 doc - 6/22 performed on the basis of the resulting vector modules that can be measured by a respective power sensor. The fact that the signals of the n outputs of the first circuit are neither in phase nor in phase opposition between them makes it possible to ensure that each "projection" of the Fresnel vector corresponding to the second signal on the Fresnel vectors of the first signal thus out of phase each time different and in particular one of these "projections" comprises a large proportion of the real and imaginary components of the vector corresponding to the second signal. This is advantageous with respect to the case where the signal is divided into four 90 ° phase-shifted signals, as is the case in EP-A-0 841 756, because when the signal phase is close to that of one of the four vectors corresponding, the estimation of one of the components is small and therefore the uncertainty is greater.

It is preferable that the AC signals provided on the n outputs of the first circuit are each out of phase with all other of these signals by an angle in the range of 20 ° to 160 °, including terminals, regardless of whether either early or late. In other words, in the Fresnel plane, the direction of the vector corresponding to any one of these signals forms an angle of at least 20 ° with respect to the direction of the vector corresponding to any of these other signals. This makes it possible to obtain a sufficient sensitivity to make the comparison. From this point of view, it is advantageous to choose in the case where n equal to three a configuration for which each output signal of the first circuit is out of phase by + 120 ° and -120 ° with respect to the other two output signals.

This device advantageously finds application when an incident signal is compared with a reflected signal to determine a reflection factor, for example in the analysis of electrical networks. Similarly, it finds application for the determination of transmission factor from an incident signal and the transmitted signal to implement a radar discriminator.

This device also makes it possible to implement a demodulator by direct frequency conversion by applying the modulated signal to the second input and to the first input the signal of a local oscillator frequency-adjusted to that of the modulated signal. This is preferably digital modulation, but analog modulation is also possible. Preferentially, this is phase and / or amplitude modulation, but frequency modulation is also possible. The use of summators followed by quadratic detectors is advantageous over the use of mixers as in US-A-5,095,536 since the latter are more complex and more expensive.

Having the number n at least equal to three provides information redundancy for the correction of system defects. First, the third vector makes it possible to eliminate the ambiguity due to quadratic detection by

R \ Patents \ 22700 \ 22719 doc - 7/22 power measurement. Then, this redundancy is also useful to reduce the impact of circuit imperfections that appear in the form of phase mismatch and gain, causing distortion on the demodulated signal constellation. The case where the number n is equal to three is advantageous because of its simplicity of implementation and its limited cost compared to the case where this number is greater than three as in the case of EP-AO 841 756. Ideally, the three signals output by the first circuit are out of phase by 120 ° in order to maximize the "projections" of the second signal on the different vectors of this vector base. The further we move away from this ideal case, the more the accuracy of the comparison in practice is degraded, but the comparison remains possible even in the case where the phase shift is only about 20 °.

We will now describe a transceiver embodying the invention a three-way vector addition device (that is to say with the number n equal to three) with reference to Figure 2.

The receiver portion of the transceiver comprises a D demodulator, a LO local oscillator and a modulated signal receiving antenna RFin.

The demodulator D comprises a vector base generator 1, an RF signal splitter circuit 2, three RF signal summers 3a, 3b and 3c, three power sensors 4a, 4b and 4c, an analog conversion block. digital 5 and a digital processing circuit 6.

As will become apparent from the description below, the vector base generator 1, the RF signal divider circuit 2 and the three RF signal adder 3a, 3b and 3c constitute a vectorial adjuster as previously described.

The demodulator D receives as input the modulated signal RFin and the alternating signal of a local oscillator LO which serves as a reference.

The signal of the local oscillator LO is applied to the input of the vector base generator 1. From this signal, the vector base generator 1 outputs three alternating signals of the same frequency and of the same amplitude, but which are out of phase between they, each of the three signals being provided on a separate path. Each of the three channels is connected to an input of a respective summator 3a, 3b and 3c. The phase shift between the three signals can be obtained using passive or active filters, transmission lines or any other circuit providing a phase shift to a signal in the operating frequency interval of the demodulator.

The modulated RFin signal is amplified by a low brait amplifier, not shown, before being applied to the divider circuit 2. The divider circuit 2 divides the modulated RFin signal into three distinct channels without introducing a phase difference between

R: \ Brcvets \ 22700 \ 22719.doc - 8/22 they do not differ in amplitude. Each of these three paths is connected to the input of a respective summator 3a, 3b and 3c. The divider circuit 2 is represented symbolically in FIG. 1 by an input branch on which three branches each connected to an input of a respective summator 3a, 3b and 3c are connected. In practice, the divider circuit 2 can be implemented by placing the transistors in parallel with their matching and polarization circuits, which has the advantage of allowing the integration of the circuit and providing a wide band of operation by compared to classical structures based on propagation lines such as Wilkinson splitters. Each of the summers 3a, 3b and 3c thus provides at the output a signal corresponding to the addition of the signal provided by a respective channel of the vector base generator 1 and the RFin signal after division. The power of the output signal of each adder 3a, 3b and 3c is measured by a respective power sensor 4a, 4b and 4c which outputs an analog signal representative of the signal power. Preferably, each power sensor 4a, 4b and 4c is implemented by a non-linear element such as a Schottky diode, followed by a low-pass filter to eliminate signal components other than those of the baseband.

The analog signal supplied by each power sensor 4a, 4b and 4c is then converted into a digital signal by the analog / digital conversion unit 5, the digital signal being supplied to the digital processing circuit 6. Before digital conversion, this analog signal can optionally be conditioned by an adjustable gain amplifier circuit and / or a compensation circuit of the voltage or DC offset. The analog / digital conversion block 5 is implemented by a respective analog / digital converter for each power sensor 4a, 4b and 4c, with the sampling of these converters being simultaneous to ensure the coherence of the three measurement channels.

In operation, the frequency of the local oscillator LO is set to that of the modulated signal RFin.

The digital processing circuit 6 determines the Cartesian components of the complex envelope - referenced by Out (I, Q) in FIG. 1 - of the modulated signal RFin by digital processing of the signals representative of the powers measured by the power sensors 4a, 4b and 4c. In other words, the digital processing circuit 6 provides the demodulated signal. The digital processing circuit can conventionally comprise a microprocessor. The digital processing may be based on an appropriate algorithm and / or on a conversion table such as for example described by FR de Sousa, B. Huyart, SYC Catunda and RN de Lima in "A to D Converters and Look-up Tables Dimensioning". for Five-Port Reflectometer Based Systems "published in the Proceedings of the

R: \ Patents \ 22700 \ 22719.doc - 9/22 IEEE Instrumentation and Measurement Conference, 2003, p. 743-747 incorporated by reference in the present application.

This digital processing is based on the transfer functions of the different channels of the demodulator, in particular the phase shifts and attenuations introduced by the vector base generator 1, the divider circuit 2 and the summers 3a, 3b and 3c, as well as the faults. linearity of the power sensors 4a, 4b and 4c. Moreover, these transfer functions generally vary according to the frequency with which the demodulator works.

The parameters of the transfer function can be determined by a calibration procedure similar to those used in the prior art for five-port receivers or the like. For example, predetermined modulated signal sequences are sent by a base station to the transceiver which has previously stored the Cartesian components I and Q - respectively the real part and the imaginary part - corresponding to the complex envelope of these signals. After demodulation, the digital processing circuit 6 calculates the calibration constants so that the Cartesian components obtained by the demodulation are identical to those in memory, thus making it possible to calibrate the demodulator D as a function of the differences noted.

To complete the receiver part, the digital processing circuit 6 can further decode the demodulated signal before being restored in a conventional manner.

We will describe below a mathematical model of operation of the demodulator D. The vector base generator 1 provides three signals each of which can be expressed as follows: v _L o ₁ (t) = Va ₁ .V _L o-cos (ωt + γ ₁ ) (1) with:

VLO and ω: respectively the amplitude and the pulsation of the signal supplied by the local oscillator LO;

Yi: the relative phase on the output channel i of the vector base generator 1; and goes: the gain of the output channel i of the vector base generator 1. The divider circuit 2 provides three signals each expressing: with:

- V _RF (t), θ (t) and ω: respectively the instantaneous amplitude, the instantaneous phase and the pulsation of the modulated signal RFm received at the input;

- λ,: the relative phase of the signal on the output channel i of the divider 2; and

R \ Brevcts \ 22700 \ 22719 doc - 10/22 - Vb; : the gain of the output channel i considered of the divisor 2.

In the case of power sensors 4a, 4b and 4c functioning as quadratic detectors, each outputs a signal represented by the following equation: _Vi (t) = _ai .V _L o ² . + bj. VRF (t) ² + q.Vw <t) .cos (θ (t) - φ _; ) (3) in which φi = Yi. λj, Cj is dependent on aj and b; , V _LO which is supposed constant, a ;, bj, y; and λ; the parameters mentioned above in Equations 1 and 2.

The baseband components, namely the real part I (t) = V _R p (t) .cos θ (t) and the imaginary part Q (t) = VRF (t) .cosθ (t), are determined by a linear combination of the signals Vj (t) provided by the power sensors 4a, 4b and 4c weighted by the calibration constants as shown by the equations below:

β (0 = ΣM (0+ _fl (5)

J = I

in which n is the number of outputs of the vector addition circuit and CCi, β; K, and KQ are dependent constants of the values of aj, bj, γι, λ; and VLO The calibration procedure mentioned previously therefore consists of determining ai, β, Ki and KQ. In fact, for n = 3, these constants are expressed as a function of the parameters a ;, b; and ci from a matrix inversion of the system of three equations connecting the 3 measurement data v ₃ '(t), v ₄ ' (t) and v ₅ '(t) to the three unknowns VRFCO ² ' I (t) , Q (t) below:

v ₃ '(t) = b ₃ . VRFCO ² + C ₃ - cos φ ₃ 1 (t) + c ₃ . sin φ ₃ Q (t)

V ₄ ¹ Ct) = b ₄ . VRF (0 ² + c ₄ .cos φ ₄ I (t) + c ₄ .sin φ ₄ Q (t) v ₅ '(t) = b _5. VRFCO ² + c ₅ .cos φ ₅ 1 (t) + C _5. sin φ ₅ Q (t)

with v ₃ '(t) = v ₃ (t) - a ₃ .V _LO ² , v ₄ ' (t) = v ₄ (t) - a ₄ .V _LO ² , v ₅ '(t) = v ₅ (t) - a ₅ .V _LO ² . The variables v ₃ (t), v ₄ (t), v ₅ (t) are the analog output voltages of the power sensors. The constants a; VLo ² can be determined before the matrix inversion by making measurements at the outputs of the power sensors with V _R Fi (t) = 0 and V _L o (t) = VLO-COS ωt. Experimental methods allowing

R: \ Patents \ 22700 \ 22719.doc - 11/22 solve the above equation system are well known in the literature, as for example that described in the article by FR de Sousa, B.Huyart, and RN of Lima entitled "A new method for automatic calibration of 5-port Reflectometers. Journal of Microwave and Optoelectronics, Vol. 3, N.5, pp.135-144, July 2004 "which is incorporated by reference in the present application and in which the constants are estimated from two known RF signals slightly shifted in frequency and measurements of the voltages at the outputs of quadratic detectors.

The transmitter part of the transceiver is based on a modulator M. The modulator M comprises a digital processing circuit which can be common with the demodulator D as shown in FIG. 1 by the circuit 6. D also comprises a block of digital-to-analog conversion 7 and three RF amplifiers with adjustable gain 8a, 8b and 8c and an RF signal summer 9.

Although not included in the block M in FIG. 1, the modulator M furthermore comprises the vector base generator 1, which is therefore advantageously common with the demodulator D. Each of the three output channels of the VBG 1 is applied to the input D a respective amplifier 8a, 8b and 8c.

The gain of each amplifier is controlled by a respective signal determined by the digital processing circuit 6 from the Cartesian components In (I, Q) of the coded signal to be modulated for its transmission. This digital processing is based on the transfer functions of each channel of the modulator, including phase shifts and attenuations introduced by the vector base generator 1 and the linearity defects of the amplifiers 8a, 8b and 8c. Here again, these transfer functions generally vary according to the frequency with which the modulator is working. It will be understood that the amplifiers 8a, 8b and 8c do not necessarily work at a gain greater than 1, but can work equally or exclusively at a gain less than 1, that is to say attenuator. The gain control signals determined by the digital processing circuit 6 are converted into analog signals by the digital-to-analog converter block 7 to each be applied to the control input of a respective amplifier 8a, 8b and 8c. The digital / analog conversion block 7 is implemented by a respective digital / analog converter for each amplifier 8a, 8b and 8c.

The output of each amplifier 8a, 8b and 8c is applied to a respective input of the adder 9. Therefore, the adder 9 outputs the modulated signal RFout which is the sum of the three signals provided by the amplifiers 8a, 8b and 8c.

R: \ Patents \ 22700 \ 22719.doc - 12/22 To complete the transmitter, the output signal RFout of the modulator M is then conventionally amplified and applied to a transmitting antenna. Furthermore, the coding of the signal to be transmitted can be carried out by the digital processing circuit 6 prior to the determination of the gain control signals of the amplifiers 8a, 8b and 8c.

Both the vector addition device according to the invention and the demodulator and the modulator-demodulator which incorporate it can be implemented to work at any frequency at which the receiver and the transceiver operate. They are particularly suitable for working at frequencies greater than or equal to 900MHz and can be used in broadband or multiband applications covering several gigahertz.

The receiver and the transceiver according to the invention can work in different frequency bands by setting the frequency of the local oscillator to the desired frequency. In the case of the transceiver, transmission and reception can be at the same frequency or at different frequencies by changing the frequency of the local oscillator in correspondence.

The invention provides a cost-effective time division duplex transceiver solution - abbreviated as TDD in English - since the vector base generator is common to the transmitting part and the receiving part. It is possible to implement a transceiver operating in frequency division duplex in - abbreviated as FDD in English - by adding a second vector base generator, one being specific to the demodulator and the other to the modulator.

Furthermore, the transceiver may be subject to an automatic calibration of its modulator M after its demodulator D has been calibrated. The preliminary calibration of the demodulator D can be carried out in a conventional manner, in particular as described above. A controlled switch 20 - made for example by a transistor - makes it possible to selectively connect the output RFout of the modulator M to the input RFin of the demodulator D. The connection is shown in dashed lines in FIG. 2. The digital processing circuit 6 comprises in FIG. memory the Cartesian components of the complex envelope of a predetermined sequence of signals. To proceed with the calibration of the modulator M, the digital processing circuit 6 causes the switch 20 to close. Then, it causes the modulation to proceed from these Cartesian components in memory by determining the gain controls for the amplifiers 8a. , 8b and 8c from the parameters of the modulator M he has in memory. The modulated signals output by the modulator M are then demodulated by the demodulator D. The digital processing circuit 6 then compares the Cartesian components of the envelope

R \ Brcvets \ 22700 \ 227I9 doc - 13/22 complex obtained by demodulation with the corresponding Cartesian components in memory used for modulation. The digital processing circuit 6 then calibrates the modulator M according to the differences observed during the comparisons. This calibration is made possible because the demodulator D has been previously calibrated and therefore the discrepancies observed during the comparisons come only from the error on the parameters of the modulator M in memory in the digital processing circuit 6.

In the same way, the transceiver can be subjected to an automatic calibration of its demodulator D after its modulator M has been calibrated in a conventional manner.

These automatic calibration procedures can also be implemented even in the case where the modulator (M) and the demodulator (D) each have their own vector base generator. They can also be applied in the modulator-demodulators of the prior art. FIG. 3 shows a simplified electronic transceiver diagram of FIG. 2 which has been implemented in MMIC technology (microwave monolithic integrated circuit) using the GaAs technology (ED02AH) of OMMIC. In particular, the matching and polarization circuits have not been represented for convenience. The vector base generator 1 has a three-way channel divider circuit realized by three amplifiers, the input of each of which is connected to the local oscillator LO. In this case, each amplifier is implemented in the form of a Tl transistor type FET 20μm x 4. The fact of using an amplifier-based divider circuit makes it possible to maintain a constant response over a very wide band frequency.

The transistors T1 are followed by respective phase-shifting circuits to provide the three output signals out of phase with each other. In this case, two all-pass filters and a fourth-order bandpass filter are used. The following values of the components provide a phase shift of 120 ° between two consecutive output channels of the vector base generator 1 in the frequency band 1.8-5.5 GHz: CIa: 0.16 pF Cb: 0.47 pF CIc : 0.31 pF

C2a: 0.65 pF Lb: 4.2 nH C2c: 1, 25 pF

The: 2.9 nH Lc: 5.6 nH

The summers 3a, 3b and 3c as well as the power sensors 4a, 4b and 4c are made identically. For this reason, only the components of the summator 3a and the power sensor 4a are referenced in FIG.

The summers 3a, 3b and 3c are each made by a pair of transistor T2 mounted as a differential amplifier. In this case, the transistors T2 are of the type

R \ Patents \ 22700 \ 22719 doc - 14/22 FET 20μm x 2. The use of transistors provides the advantage of operating in a wide band of frequencies in comparison with the adder using transmission lines. In addition, they offer the choice of amplification, which can be an advantage when considering using the circuit with low power RF signals. The power sensors 4a, 4b and 4c each consist of a transistor T3, in this case of the FET type 10μm × 1, with the channel close to the nip, which makes it operate in a very non-linear regime that approaches that of a Schottky diode. They are each followed by a low-pass filter to retain the terms of the second order resulting from the addition of signals operated by the summers 3a, 3b and 3c. In this case, each low-pass filter comprises the resistors R1 and R2 and the capacitor C3 whose values are:

R1: 0.5 kΩ R2: 10 kΩ C3: 10 pF

The low-pass filter of each power sensor 4a, 4b and 4c delivers a respective output voltage Va, Vb and Vc which is then digitized by the analog / digital conversion block 5 - not shown in FIG. 3 - for the purpose of digital processing to provide the Cartesian components of the complex envelope of the RFin modulated signal.

It is specified that in the circuit of FIG. 3, the modulated signal RFin is applied to the gates of three transistors of the summator 3a, 3, and 3c. The connection of their gates is possible because the isolation between drain and gate is very high, which makes it possible to consider the transistor as unidirectional. The matching circuit - not shown - takes into account the reflection factor of the three transistors to allow adaptation. Individually, each transistor works as an amplifier. In this way, the reference divider circuit 2 is obtained in FIG.

The variable gain amplifiers 8a, 8b and 8c of the modulator M are all identical, which is why only the components of the amplifier 8a are referenced in FIG. 3. Each amplifier comprises two transistors T4 and T5 mounted in cascode. The gain control voltages are symbolized by the generators 10a, 10b and 10c respectively. In this case, the transistors T4 are of the FET 25μm × 4 type and the T5 transistors are of the 22.5μm × 2 FET type. The fact of using cascode-type amplifiers 8a, 8b and 8c is advantageous because it suffices to connect together their outputs to realize the adder 9 given their great isolation. Finally, the transceiver comprises a switching block 11 which selectively allows to connect or isolate the RFout output of the modulator and the RFin input of the demodulator according to a control signal applied to the input 12. allows to implement the automatic calibration procedure of the

R \ Patents \ 22700 \ 22719 doc - 15/22 modulator or demodulator as described above with reference to Figure 2. The block 11 is based on four transistors T6, in this case the FET type 65μm x 8.

FIGS. 4 to 6 illustrate the results obtained with the circuit described with reference to FIG.

More particularly, FIG. 4 shows the transmission coefficients of the three channels of the vector base generator 1. The coefficient module is between -7 dB and -17 dB in the band between 1.8 GHz and 5.5 GHz. With regard to the phase shift, we obtain 120 ° relative between the three channels at about 3.5 GHz, and at the extremities the phase differences are about 80 ° and 160 °.

The voltages measured at the detector outputs before and after a linearization procedure are shown in Figure 5. Because the detectors can not be characterized in isolation, we applied a power slope ranging from -10 dBm to + 10 dBm at input of the demodulator circuit for two distinct frequencies, namely 2 GHz and 5 GHz.

We applied a signal at 0 dBm at the input of the vector base generator 1 and another signal at -3 dBm at the input of the demodulator. We measured at 2 GHz and 5 GHz by setting a 1 kHz offset between the two generators. The measured voltages are illustrated in FIG. 6. These results show that the circuit is capable of providing baseband voltages which correspond to the signal power resulting from the addition of two combined RF signals on different phase shifts, which makes it possible to calculate the complex ratio between these two. signals and thus perform the function of demodulation. In addition, it has been shown that the amplitude of three out of phase RP signals is varied as a function of a control voltage, which makes it possible to perform the modulation function.

Of course, the present invention is not limited to the examples and to the embodiment described and shown, but it is capable of numerous variants accessible to those skilled in the art.

R \ Patents \ 22700 \ 22719 doc- 16/22

Claims

1. Device for the vectorial addition of two alternating modulated or non-modulated electrical signals, comprising:

a first input for receiving a first alternating electric signal (LO);

a second input for receiving a second alternating electrical signal (RHn); a first circuit (1) connected to the first input and comprising a number n of outputs, the first circuit providing, from the first alternating signal (LO) applied to the first input, a respective alternating signal on each of the n outputs, said alternating signals provided on the n outputs being all of the same amplitude and the same frequency but out of phase with each other so that each is neither in phase nor in phase opposition with any other;

a second circuit (2) connected to the second input (RFin) and comprising the same number n of outputs, the second circuit dividing the second alternating signal to its n outputs; and

a same number n of summators (3a, 3b, 3c) each receiving at the input a respective output of the first circuit (1) and a respective output of the second circuit

(2); in which the number n is greater than or equal to 3.

2. Device according to claim 1, wherein each of the AC signals supplied by the first circuit on its n outputs is out of phase with each of the other AC signals supplied by the first circuit on its n outputs of 20 ° to 160 ° in advance. or late.

3. Device according to claim 1 or 2, wherein the summators each comprise two transistors (T2) mounted as a differential amplifier.

4. Device according to any one of claims 1 to 3, wherein the first circuit comprises the same number n of amplifiers (T1), the input of each of the amplifiers being connected to the first input (LO) and the output each of the amplifiers is then connected to a respective phase shift circuit.

5. Device according to any one of claims 1 to 4, wherein the number n is equal to 3.

R \ Brevcls \ 2270O \ 22719 doc - 17/22

6. Device according to claim 5, wherein each of the AC signals provided by the first circuit on its three outputs is out of phase with each of the other two alternative signals provided by the first circuit on its three outputs by an angle of 80 ° to 160 ° in advance or late.

7. Device according to claim 6, wherein each of the AC signals supplied by the first circuit on its three outputs is out of phase with each of the other two alternative signals provided by the first circuit on its three outputs by an angle of 120 ° in ahead or late.

8. Device according to any one of claims 1 to 7, wherein the output of each of the summers (3a, 3b, 3c) is connected to a respective power sensor (4a, 4b, 4c).

A direct conversion demodulator, comprising:

a vector addition device according to claim 8;

- the same number n of analog / digital converters (5) each connected to a respective power sensor (4a, 4b, 4c); and - a digital processing circuit (6) determining the Cartesian components of the complex envelope of the signal (RFin) applied to the second input of the vector addition device from the measurements provided by the n power sensors (4a, 4b , 4c).

RF Receiver, comprising:

a demodulator according to claim 9;

a local oscillator (LO) connected to the first input of the vector addition device;

- an RF receiving antenna; and an amplifier of the signal received by the antenna for applying it to the second input (RFin) of the vector addition device.

A direct conversion modulator-demodulator, comprising a demodulator according to claim 9 and wherein the modulator (M) comprises:

a same number n of variable gain amplifiers (8a, 8b, 8c), the input of each amplifier being connected to a respective output of the first circuit (1) of the vector addition device;

R: \ Patents \ 22700 \ 22719.doc - 18/22 an adder (9) receiving as input the output of each of the n variable gain amplifiers (8a, 8b, 8c);

a digital processing circuit (6) providing the same number n of amplifier gain controls from the Cartesian components of the complex envelope to be provided by modulation; and

a same number n of digital / analog converters (7), the input of each being connected to the digital processing circuit (6) and the output of each being connected to the gain control input of a respective amplifier.

12. Modulator-demodulator according to claim 11, comprising a circuit (20) for selectively connecting the second input (RFin) of the vector addition circuit to the output (RFout) of the summator (9) receiving as input the output of each n amplifiers with variable gain.

13. Transceiver, comprising:

- a modulator-demodulator according to claim 11 or 12;

a local oscillator (LO) connected to the first input of the vector addition device; and

at least one RF antenna and at least one amplifier for supplying the second input (RFin) of the vector addition device and for transmitting the signal obtained at the output (RFout) of the summator (9) connected to the n variable gain amplifiers.

14. A method of calibrating the modulator (M) of a modulator-demodulator according to claim 12 at a given frequency, the demodulator (D) having been previously calibrated at the given frequency, the method comprising the steps of:

applying an alternating signal at the frequency given to the first input of the vector addition device; connecting the second input (RFin) of the vector addition circuit to the output (RFout) of the summator (9) receiving as input the output of each of the n variable gain amplifiers;

generation by the modulator (M) of signals modulated from Cartesian components of complex envelope of signals; comparing the complex envelope Cartesian components provided by the demodulator (D) as a consequence of the previous step with the Cartesian complex signal envelope components used to generate the modulated signals; and

R \ Brcvels \ 22700 \ 22719 doc - 19/22 - calibration of the modulator (M) according to the results of the previous step.

15. A method of calibrating the demodulator (D) of a modulator-demodulator according to claim 12 at a given frequency, the modulator (M) having been previously calibrated at the given frequency, the method comprising the steps of:

connecting the second input (RFin) of the vector addition circuit to the output (RFout) of the summator (9) receiving as input the output of each of the n variable gain amplifiers;

generation by the modulator (M) of signals modulated from Cartesian components of complex envelope of signals;

comparing the complex envelope Cartesian components provided by the demodulator (D) as a consequence of the previous step with the Cartesian complex signal envelope components used to generate the modulated signals; and

- Calibration of the demodulator (D) according to the results of the previous step.

R \ Patents \ 22700 \ 22719 doc - 20/22