Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
  • H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
  • H03F1/0244—Stepped control
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
  • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
  • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
  • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
  • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
  • H03F1/3252—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using multiple parallel paths between input and output
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
  • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
  • H03F3/195—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03F—AMPLIFIERS
  • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
  • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
  • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
  • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only

Definitions

• This invention relates to power control in a wireless communication unit .
• the invention is applicable to, but not limited to, improving the performance of wireless Power Amplifier control loops having a log detector.
• Wireless communication systems typically provide for radio telecommunication links to be arranged between a plurality of base transceiver stations (BTS) and a plurality of subscriber units .
• BTS base transceiver stations
• GSM Global System for Mobile Communications
• GSM is often referred to as 2 nd >> generation cellular technology.
• GPRS General Packet Radio System
• EDGE Enhanced Data Rate for Global Evolution
• GPRS Enhanced GPRS
• UMTS universal mobile telecommunication system
• UMTS is intended to provide a harmonised standard under which cellular radio communication networks and systems will provide enhanced levels of interfacing and compatibility with many other types of communication systems and networks, including fixed communication systems such as the Internet . Due to this increased complexity, as well as the features and services that it supports , UMTS is often referred to as a third generation (3G) cellular communication technology.
• UE user equipment
• GMSK Gaussian Minimum Shift-keyed
• 8-PSK 8-phase shift keyed
• each BTS has associated with it a particular geographical coverage area (or cell) .
• the coverage area is defined by a particular range over which the BTS can maintain acceptable communications with subscriber units operating within its serving cell . Often these cells combine to produce an extensive coverage area.
• Wireless communication systems are distinguished over fixed communication systems, such as the public switched telephone network (PSTN) , principally in that mobile stations/subscriber equipment move between coverage areas served by different BTS (and/or different service providers) . In doing so, the mobile stations/subscriber equipment encounter varying radio propagation environments . In particular, in a mobile communication
• PSTN public switched telephone network
• a received signal level can vary rapidly due to multipath and fading effects .
• One feature associated with most present day wireless communication systems allows the transceivers in either or both the base station and/or subscriber unit to adjust their transmission output power to take into account the geographical distance between them. The closer the subscriber unit is to the BTS' s transceiver, the less power the subscriber unit and BTS' s transceiver are required to transmit, for the transmitted signal to be adequately received and decoded by the other unit .
• the transmit power is typically controlled, i . e . set to a level that enables the received signal to be adequately decoded, yet reduced to minimize potential radio frequency (RF) interference .
• RF radio frequency
• Initial power settings for the subscriber unit, along with other control information, are set by the information provided on a beacon (control) physical channel for a particular cell .
• a "raised cosine type waveform is typically employed as the reference; as it can be shown to best satisfy both the transient and spectral specifications .
• application of a log detector as the power detection mechanism will distort the desired raised cosine profile at the PA output and compromise spectral emission performance . Hence, a scheme to avoid this log distortion is therefore required.
• PA power amplifier
• a log detector design provides an extended closed loop power control range as compared to a peak detector. In practice this extended range is used to simplify the activation or turn on of the PA, e . g . in general the loop can therefore be closed at a relatively- lower power with a log detector compared to a peak detector.
• the activation process is non-linear and requires a more complex signal to be applied to the bias point, for example in the case of a Gaussian Minimum Shift Keyed (GMSK) bias control system.
• GMSK Gaussian Minimum Shift Keyed
• the more complex waveform used with a peak detector typically needs to be calibrated/phased in the factory with respect to output target power .
• critical standards' test specifications 1 may be failed if accurate control of ramp generation and PA activation/turn on is not achieved, such as : (i) Power versus time (PvT) , or (ii) Out-of-band spectral emission performance .
• a wireless communication unit comprising a power control system, as defined in the appended claims .
• FIG . 1 illustrates a functional block diagram of a subscriber unit, adapted in accordance with various inventive concepts of a preferred embodiment of the present invention
• FIG. 2 illustrates a functional block diagram of a subscriber unit transmitter having a power control function adapted to operate in GMSK mode incorporating the preferred embodiment of the present invention
• FIG . 3 shows an auto-scaled ramp-generator operation of the power control processing function of the preferred embodiment of the present invention
• FIG . 4 shows a block schematic diagram and associated signal characteristics of the inner analogue loop in the preferred embodiment of the invention
• FIG. 5 illustrates a graph of control slope versus output power for a power amplifier combined with a log detector in the preferred embodiment of the present invention
• FIG. 6 illustrates a functional block diagram of a subscriber unit transmitter having a power control function and a predictor sub-system adapted to operate in an 8-PSK mode incorporating the preferred embodiment of the present invention
• FIG. 7 illustrates an 8-PSK ramp-up diagram indicating an open loop/closed loop ramping operation in an enhanced embodiment of the present invention.
• Some of the aforementioned problems are generally solved by adopting a low-latency, high-gain inner analogue loop comprising a log-detector .
• the log-detector simplifies the activity detection - process; as detection can be performed at a much lower transmit power, for example at -1OdBm for, which allows greater range in the activity detection process .
• the extended log detector range allows the PA to be activated by switching out step attenuators coupled in the loop, until such time as the detected power first exceeds a desired threshold value .
• a raised cosine (or similar) type of signal is applied to the reference ramp signal, as it has a minimal high frequency transient or switching content . This property is desirable in terms of satisfying the switching or transient spectrum emission specifications of wireless communication standards .
• the use of a log detector in the feedback path distorts the raised cosine response at the PA output; thereby having the effect of compromising the communication unit' s switching emissions performance .
• a log ⁇ pre-distortion' function is therefore applied to the reference ramp signal .
• the preferred embodiment of the present invention predistorts the reference ramp signal used in a power control loop to overcome a problem caused by the log nature of the detector .
• a pre- distortion function is utilised with no consideration of the PA or with any effect on the signal information content .
• a constant step voltage level is applied to the inner analogue loop, whereby the magnitude of the step voltage is selected to be marginally larger than a maximum offset voltage of the log detector .
• a step voltage level By applying a step voltage level in this manner, a positive error is produced to the analogue controller. Assuming the controller has an integral action, the integrator will then integrate this error and increase in a linear fashion (i . e . slew) .
• the bias voltage of the PA has a slew rate, that causes the PA output power, and hence the detector voltage, to increase . As the detector voltage increases to the step voltage value, the error will decrease and the slewing will ⁇ slow' down.
• the controller output will stop increasing and hold its value constant, as shown in greater detail with respect to FIG. 3.
• the integrator will cease slewing and thus hold the output power at a constant value . In this manner, an improved ramp generation process is achieved.
• the ramp generator In an enhanced embodiment of the ramp generator, a mechanism of autoscaling the ramp reference, particularly when targeting high output powers from the PA, is described.
• the inventors of the present invention have identified that an initial value of the reference ramp affects the communication unit' s switching emissions performance .
• the enhanced embodiment of the present invention proposes a ' Ti-- use of a linear translator.
• the linear translator achieves an autoscaling of the ramp reference that automatically scales the reference enabling the initial value to be a programmable value below the final target power value .
• the loop When a known power control loop is closed, the loop will temporarily drive the power down, which may potentially fail to satisfy PvT and switching emissions, if the initial value of the reference is lower than the initial value of the detector. Thus, a ⁇ bump-less transfer' from open to closed lop is required. Therefore, in an enhanced embodiment of the present invention, the initial detector value is sampled just prior to closing the loop, whereby the reference is limited to be always greater than the sample to ensure a bump-less transfer .
• FIG. 1 a block diagram of a subscriber unit, sometimes referred to as user equipment (UE) 100; adapted to support the inventive concepts of the preferred embodiments of the present invention, is illustrated.
• the subscriber unit 100 contains an antenna
• a duplex filter or antenna switch 104 that provides isolation between receive and transmit chains within subscriber unit 100.
• the receiver chain includes receiver front-end circuit 106 (effectively providing reception, filtering and intermediate or base-band frequency conversion) .
• the receiver front-end circuit 106 receives signal transmissions from another wireless communication unit, for example its associated Base station, associated BTS or direct from another subscriber unit .
• the receiver front-end circuit 106 is serially coupled to a signal processing function (generally. «•realised by a digital signal processor (DSP) ) 108.
• DSP digital signal processor
• the processing function 108 performs de-interleaving, signal demodulation, error correction, data formatting, etc. of the received signal .
• Recovered information from the signal processing function 108 is serially coupled to a power control processing function 109, which extracts pertinent power control information from the received and decoded beacon signal and interprets the information to determine an appropriate transmit output level for the subscriber unit' s transmissions .
• the signal processing function 108, power control processing function 109 and baseband processing function 112 may be provided within the same physical signal-processing device .
• received signals that have been processed by the power control processing function 109 are typically input to a baseband-processing function 110.
• the baseband processing device 110 takes the received information formatted in a suitable manner and sends it to an output device 112, such as an audio speaker or liquid crystal display or visual display unit (VDU) .
• a controller 114 controls the information flow and operational state of each circuit/element/function .
• a timer 118 is preferably operably coupled to the entire signal processing functions to provide synchronisation in both the signal recovery and signal generation processes .
• this essentially includes an input device 120, such as a microphone or keypad, coupled in series through baseband processor 110, a power control processing function 109, signal processing function 108, transmitter/modulation circuitry 122 and a power amplifier 124.
• the processor 108, transmitter/modulation circuitry 122 and the power amplifier 124 are operationally responsive to the controller 114, with an output from the power amplifier coupled to the duplex filter or antenna switch 104 , as known in the art .
• the transmit chain in subscriber unit 100 takes the baseband signal from input device 120 and converts this into a signal whose level can be baseband adjusted by the power control processor 109.
• the power control processor forwards the amplitude-adjusted signal to the signal processor 108, where it is encoded for transmission by transmit/ modulation circuitry 122 , thereafter amplified by power amplifier 124, and radiated from antenna 102.
• the adjustment of the transmit output power can be effected by any amplitude or attenuation means in the transmit chain, and the above baseband adjustment is described as one example only.
• the transmitter employs a power control feature, whereby a sample of the transmitted signal is fed back to a power control function 132 via a coupler and a log detector 130.
• the power control function 132 is also responsive to the power control processor function 109.
• the signal processor function 108 in the transmit chain may be implemented as distinct from the processor in the receive chain. Alternatively, a single processor 108 may be used' to implement processing of both transmit and receive signals , as shown in FIG. 1. Furthermore, the various components within the subscriber unit 100 can be realised in discrete or integrated component form.
• the majority of the power control functions are preferably implemented in a digital signal processor (DSP) .
• DSP digital signal processor
• the power control processor circuitry described in the above embodiments can be embodied in any suitable form of software, firmware and/or hardware.
• the various components within the subscriber unit 100 are realised in this embodiment in integrated component form. Of course, in other embodiments, they may be realized in discrete form, or a mixture of integrated components and discrete components, or indeed any other suitable form.
• FIG. 2 a functional block diagram of a predictor sub-system 200 of the power control function 132 of a subscriber unit, adapted to incorporate the present invention, is shown in more detail .
• the predictor sub-system 200 has been incorporated to mitigate against loop latency limitations .
• the operation of the predictor sub-system is incorporated herein by reference from co-pending PCT application filed by the Applicant on the same date (with Applicant ref : SC13319EC-A) As such, the predictor aspects will not be described further here .
• the power control function 132 comprises an analog inner (or minor) feedback loop, which can be used, for example, for power amplifier control when the subscriber unit is - operating in a Gaussian Minimum Shift Keyed' (GMSK) mode .
• GMSK Gaussian Minimum Shift Keyed'
• the feedback loop comprises a log-detector function 130 that allows the feedback loop to be closed at low ( ⁇ -5dBm) power levels .
• the inner analog loop has been incorporated to desensitize the system from ⁇ large' variations in the control-slope of the power control signal .
• the digital control system incorporates two feedback loops : an inner loop (comprising summing junction 206, controller 208 and gain stage 212) that is closed using the estimated or predicted version : of the latency free detector voltage, and an outer loop
• summing junction 204 (comprising summing junction 204 , summing junction 206 controller 208 , gain stage 212, delay 216 and summing junction 218) that is closed using a modelling or predictor error,
• the inner digital loop can be understood in terms of ensuring satisfactory ramping behaviour . Intuitively, as this inner loop is latency free, the loop gain and bandwidth can be increased to improve system robustness .
• the outer digital loop can be understood in terms of rejecting disturbances and predictor/modelling errors .
• Additional transmitter sub systems such as one designed to detect and correct for PA saturation, can advantageously remain unchanged, with the controller error :
• existing threshold mechanism/values for saturation detection can be used, with the controller and integrator being frozen once saturation has been detected .
• the predictor is preferably configured with 2 constants, an unsigned control-slope gain estimate :
• an enhanced embodiment of the present invention comprises a novel use of a power activity detection mechanism with a self-activating inner
• an analogue inner loop comprises a low-pass (input ramp) filter 222 receiving an analogue output from the digital-to-analogue convertor (DAC) 220.
• the filter outputs the transmit signal to a summing junction 224.
• V/ is designed to be lower then the off-voltage of the log detector 130, i. e. when the (worst case) minimum power is applied to the detector, the resultant detector output voltage
• the digital controller may comprise an integral action and functionality of an accumulator, and DAC register are then loaded with a value resulting in the analog voltage , being applied to the inner analog loop reference .
• the value is preferably selected such that the analog voltage :
• This condition triggers or activates the inner analog loop such that :
• the integrator which is assumed to be part of the controller Gc (s) , is reset, and the analogue controller output set to zero and held there until the next burst .
• the log detector 130 is nonlinear in nature. Therefore, as mentioned, a ⁇ pre-distortion' log function is incorporated in the reference ramp generation circuit in order to minimise switching transient problems at high output power levels .
• the detected voltage will then track the log of the reference while the output power will actually track the antilog or linear profile of the reference, and thus follow the true profile of the reference ramp (such as 1/2-raised cosine reference for example) .
• this pre-disortion function of the reference is not essential as the inner analog loop tends to linearise the effect of the log detector .
• the auto-scaled ramp generator function 400 of the yet further enhanced embodiment of the present invention comprises a ramp generator 405 generating a normalised ramp look-up table (LUT) (based on a 1/2 & 1/4 wave raised cosine) signal .
• the reference ramp generator contains H and H wave raised cosine profiles that are designed to ensure satisfactory PvT and switching transients where the spectral content of these ramps have minimum high frequency content .
• the normalised ramp signal is input to a programmable linear translator (autoscaling) function 410.
• the programmable linear translator (autoscaling) function 410 comprises a scaling block, to provide the necessary gain of the signal from the power amplifier output to the ADC output (in dB/V) .
• the normalised ramp LUT is translated linearly to extend over a programmable range depending on the variable, ⁇ m' 440, where 'JH' is simply the slope of the linearly translator 410.
• the constant offset ⁇ l-m f is calculated by subtracting the slope value from unity.
• the slope 450 is switched to unity and the offset becomes ⁇ 0' .
• the output from the programmable linear translator (autoscaling) function 410 is then able to provide three distinct signals 415, dependent upon the mode of operation of the subscriber unit .
• a first output is applied to the pre-distorting logarithmic block 418.
• a second output is used in the low power GMSK mode and a third output is used in the 8-PSK mode .
• the linearly translated reference ramp from the programmable linear translator (autoscaling) function 410 is then converted into a dB equivalent via the 201oglO (predistortion dB/V) function 418.
• the 201oglO function (predistortion dB/V) 418 pre-distorts the reference to compensate for the log nonlinearity of the log detector . This feature is crucial for the 8-PSK mode to provide sufficient switching transient margin .
• the 201oglO pre-disortion function 418 is not necessarily the optimal pre-distortion function for GMSK.
• gain function 420 which corresponds to the gain from the power amplifier output to the ADC .
• This relative value is then converted into an absolute value by adding the factory phased power (PWR) value 425, in adder function 430.
• PWR factory phased power
• the output power is at -15dBm. Then, for a final target power of ⁇ 10dBm when the outer loop is engaged with 25dB autoscaling, the inital response will be to drive the power below -15dBm.
• the initial value of the ramp up is limited by limiter function 335 in the enhanced embodiment of the present invention .
• the detector voltage should be sampled prior to the digital loop closing.
• the ramp-up is limited such that :
• this detector voltage is sampled prior to the commencement of the closed loop ramp-up phase .
• This limiting feature is applied only during the ramp up sequence and disabled during the ramp- down sequence to allow the PA to ramp-down to its Off condition .
• an output from the log-detector 130 is compared with the output of the DAC bias reconstruction filter 222.
• the resultant error is then applied to the analog controller to produce the PA bias voltage :
• the ⁇ high' integral gain ensures the necessary robustness to the control-slope variation and, in particular, provides adequate bandwidth when the control-slope is at its minimum during ramp-down from the maximum power .
• the proportional gain introduces a phase compensating, which is necessary to avoid ringing at sub-activity during the initial ramp-up when the control-slope is at its maximum.
• the GMSK system controls the power amplifier (PA) output power by adjusting the PA bias; often termed the bias control mode .
• the 8-PSK system controls the PA output power by adjusting the power of the signal at the PA input . This is often referred to as the input power control mode .
• the PA bias is set to a constant value based on desired output power and efficiency goals .
• the accompanying plot in FIG. 5 shows a graph 500 of an example control-slope 510 versus output power (in dBm) 520 for a PA combined with a log detector.
• Closing the loop over the range of -1OdBm to 33dBm can present a gain variation of around 6OdB .
• the predictor alone is unable to offer sufficient robustness to such a large variation in gain .
• a single gain setting of the digital controller would not be able to satisfy PvT requirements . For instance, at high power where the control-slope falls off, a ⁇ high/ controller gain setting is required to maintain the loop bandwidth and ensure satisfactory PvT during ramp-down . Conversely, at lower power, the controller gain has to be reduced. Otherwise, the ⁇ high' control-slope 530 could cause ringing and again failure of the PvT .
• a high-gain, low-latency analogue loop is placed around the PA, coupler and detector . Moreover, this loop will be closed - 1 I permanently (whilst in GMSK mode) , such that.' the activity detect is also performed in a closed loop fashion . Again, the motivation being a much more robust activity- detect behaviour.
• a classical two-term PI controller can adequately meet this requirement. This has the general form of: s ⁇ s
• the integral gain term is chosen primarily to ensure adequate loop gain for the ramp-down condition.
• the proportional gain term is then selected to introduce a zero at a specific location, so as to maintain the gain- phase margin.
• the small signal response of the inner analog loop, (including the PA, coupler, detector and controller) is modelled by:
• analog controller is :
• the ADC is modelled as an ideal sampler .
• An underlying tenet of closed loop control can be employed to desensitise the system from slope variation by having:
• the source of this limitation can be traced back to the excessive loop latency within the system with the primary contributors being the ADC and DAC conversion times the reconstruction and anti-aliasing filter and the small signal ac phase response through the control path of the PA and detector.
• This latency results in the loop phase response decreasing from -90° (set by the integrator of the controller) towards -180° at a restrictively low BW, e . g.. 10OkHz .
• an alternative control algorithm is required that will maintain the phase response above -180 ° for a much ⁇ larger' bandwidth.
• the inner analog loop on its own offers adequate robustness to the range of expected variations, as a low gain, single setting of the digital integrator would suffice . In fact, the analog loop alone, without any outer digital loop, would be sufficient . However, as the existing digital interface is needed for ramp generation and saturation detection plus correction, the existing digital controller augmented by the predictor is used to enhance the overall robustness of the system. The inner analog loop is not used for the 8-PSK mode of operation. The extra overhead arising from the introduction of a predictor is minimum as the same hardware is needed for the 8-PSK mode .
• a power control function comprises an analog inner feedback loop, which can be used, for example, for power amplifier control when the subscriber unit is operating in a 8- phase shift keyed (PSK) mode .
• PSK phase shift keyed
• the feedback loop preferably comprises a log-detector function 130 that allows the feedback loop to be closed at low ( ⁇ -6dBm) power levels .
• the power control function i . e . power control function 132 of FIG. 1
• the power control function comprises a predictor sub-system 600, which will not be further described here, as indicated earlier . It is noteworthy that the analogue inner loop is disabled in 8-PSK mode .
• a signal A ⁇ n) 642 is the amplitude portion of the 8-PSK modulated signal .
• Other signals are the same as described for the GMSK mode in FIG. 2.
• the difference in the predictor for transmitter operation in the 8-PSK mode are in its control input A 0 (n) and the estimates for the gain and delay.
• the control input A 0 (n) 642 includes the effects of the amplitude data, as scaled by the ramp generator 640.
• the PA bias is not manipulated, i . e . it is actually held constant in 8-PSK mode . Instead the gain of the AM signal is manipulated to affect the desired output power .
• the autoscaled, predistorted reference ramp waveform is used as a reference for the loop, while a normalised ramp is used to profile the AM input via DAC 620.
• the 8-PSK system performs ramp-up using an open-loop ramping phase followed by a closed loop ramping phase .
• the system Prior to transmitting an 8-PSK burst, the system must ⁇ perform an open loop ramping operation.
• the operation is performed using a step attenuator control 640, which is located between the analog loop and the outer digital loop.
• a sample of the RF power from the PA 124 is taken by the directional coupler 228 and input to log detector 630.
• the analague signal output from the log detector 630 is then input to the ADC 632 and the digital output attenuated and fed to an AM buffer stage 634 in the feedback loop of the outer digital loop .
• the main purpose of the step attenuator control 640 is to provide extra dynamic range for the system so that the AM buffer only needs to be able to provide a ramping range of approx. 2OdB during the closed loop ramp-up phase .
• a number of step attenuators may be used.
• a default step attenuator value is set at maximum attenuation, and reduction of attenuation is done in, for example, 3dB steps .
• the step attenuator control 640 may also be used in GMSK mode, where the step attenuator control 640 is programmed to its minimum attenuation setting to provide maximum power at the PA input . No ramping of the step attenuator is performed in GMSK mode .
• the basic sequence of events for the step attenuator control 640 in 8-PSK mode is as follows .
• the step attenuator 640 is programmed to an initial value and a control sequence commenced, say approx. l ⁇ usec, prior to the first data bit being transmit .
• a specified • delay say of about 21 clock cycles in 8-PSK mode, is expected before a change in step attenuation is seen at the detected signal at the output of the ADC 632.
• the detected signal is greater than the desired detected power for the beginning of the closed loop ramp- up, usually 2OdB below the PWR setting.
• the step attenuation value is then held for a period of time . Otherwise, the step attenuation is reduced by 3dB and the specified delay is then re-enacted.
• a major function of the 8-PSK PAC system design is the performing of the closed loop ramp-up .
• the output power at the beginning of this stage is typically set to be 2OdB below the final output power .
• the final output power can be determined from the setting for PWR.
• the ramp range is programmable and of the order of 2OdB .
• the 8-PSK system for closed loop ramp-up utilises an integrator controller with the Predictor 600. The output of the integrator is used to adjust the gain of the amplitude path.
• the input power is manipulated at two nodes within the loop; first at the input to the PA 124 via a digitally controlled step attenautor 660 and at the AM DAC input via a digital gain/multiplier function 670.
• An attenuator algorithm brings the output power from an ⁇ off state to approx -2OdB below the final target power. This is achieved in an open loop mode with the digitally, predictor-based controller turned ⁇ off' .
• the digital predictor loop is closed and the power is ramped up to the desired target power .
• the PA bias is not manipulated, for example, it is actually held constant in 8-PSK mode. Instead the gain of the AM trajectory is manipulated to effect the desired output power .
• the autoscaled, predistorted reference ramp waveform is used as a reference for the loop while a normalised ramp is used to profile the AM input via DAC 620. In fact, during the ramp-up phase the amplitude modudlated A (n) 642 is held constant .
• the loop opens with the controller 'frozen' or held constant .
• the AM signal 642 becomes constant .
• the true 8- PSK AM trajectory is scaled by the constant control output and applied to the AM DAC 620 and suitably filtered, via filters 622. Phase modulation is acheived via the AM buffer.
• the loop After modulation and during ramp-down the loop remains open in that the controller remains constant .
• the ramp- down is effected by using the normalised reference ramp output to scale the AM trajectory via 620. This will then bring the AM path down in a raised cosine manner . It is noteworthy that the inner analog loop is also disengaged during 8-PSK mode .
• the GMSK system During the active part of the burst, the GMSK system remains in a closed-loop operation, to keep the PA running at maximum efficiency. Since 8-PSK data has amplitude modulation, the 8-PSK system runs open-loop and does not attempt to track PA variations over a timeslot . At the end of a burst, the GSMK system remains in a closed-loop mode and ramps down the power by reducing the PA bias . However, the 8-PSK system remains open loop and the ramp generator ramps down the amplitude signal to zero . Then the step attenuator control 640 is programmed back to maximum attenuation to prepare for the next burst .
• a signal A (n) 642 is an amplitude portion of the 8-PSK modulated signal .
• Other signals are the same as described for the GMSK mode in FIG. 2.
• the control input A 0 (n) and the estimates for the gain and delay are used.
• the control input A (n) 642 includes the effects of the amplitude data, as scaled by the ramp generator 640.
• FIG. 7 illustrates an 8-PSK ramp-up diagram indicating an open loop/closed loop ramping operation when employing the inventive concepts hereinbefore described.
• the predictor gain need not necessarily be a constant as the gain could be changed, for example, depending on the target power .
• the predictor latency need not necessarily be a constant and can be arranged, for example, to be dependent upon target power, frequency setting, etc .
• the power control system preferably comprises an inner analogue loop and an outer digital loop .
• the inner analogue feedback power control loop is arranged to feedback a signal to the input to set an output power level of the transmitter .
• the inner analogue loop also linearises a response output from the power amplifier, for example, linearise for any distortion between a bias point of the power amplifier and a detector .
• the outer digital loop controls the inner analogue loop with regard to saturation detection and correction as well as providing a simpler mechanism for supporting multi-mode operation .
• a step voltage level is applied to the inner analogue loop, where a magnitude of the step voltage is larger than a maximum offset voltage of, say, the log detector .
• the magnitude of the step voltage is arranged to create a positive error within the analogue loop .
• This mode of operation for ramp generation is particularly suited to GMSK within a GSM communication system.
• the multi-loop arrangement comprises a detector in a feedback path.
• the detector is preferably a log detector .
• other detectors such as peak detectors, could also benefit from the inventive concepts described herein.
• the inner analogue loop is used to linearise a response between the- bias point of the power amplifier and the ' detector.
• the outer digital loop is arranged to control the inner analogue loop with regard to saturation detection and correction . Furthermore, the provision of the outer digital loop enables multi-mode operation to be more easily supported.
• a digital outer control loop comprises a detector, a controller and a digital to analogue converter operably coupled to the digital outer control loop.
• the digital outer control loop comprises a number of step attenuators within the digital outer loop.
• a power amplifier output is detected by the detector and the power amplifier is activated by the controller by stepping out attenuators to increase a power output from the power amplifier in a step like manner until such time as a detected power level exceeds a desired threshold value .
• a wireless communication unit comprises a transmitter a power control loop with an input, a power amplifier having a power amplifier output and a log-detector located within a feedback path of the power control loop and operably coupled to the power amplifier output .
• a reference ramp generator is operably coupled to a linear translator and a log predistortion function that are arranged to counteract a distortion effect of the log detector in autoscaling a ramp reference signal .
• the concept of power amplifier predistortion is not applied to the signal to be ' • « ⁇ transmitted, as is the case in the known .sart .
• a predistortion is applied to the ⁇ power of the signal' as compared to the ⁇ information' contained within the signal .
• inventive concepts are not limited to a 3G or 2.xG wireless communication device, but are applicable to any wireless communication device that utilizes power control .
• inventive concepts may also be applied to a large number transceiver architectures and platform solutions, i . e . a semiconductor manufacturer may employ the inventive concepts in a design of a stand-alone RFIC and/or applioation specific integrated circuit (ASIC) and/or any other sub-system element .
• ASIC applioation specific integrated circuit
• the aforementioned method and arrangement for providing power control substantially negates at least the aforementioned problems associated with autoscaling and activity detection.

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• 2004
  • 2004-12-23 EP EP04805019A patent/EP1831992A1/de not_active Withdrawn
  • 2004-12-23 WO PCT/EP2004/053691 patent/WO2006066628A1/en active Application Filing
  • 2004-12-23 US US11/722,296 patent/US8014737B2/en not_active Expired - Fee Related
• 2005
  • 2005-12-12 TW TW094143854A patent/TW200637138A/zh unknown

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