EP1798714A1 - Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage - Google Patents

Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage Download PDF

Info

Publication number
EP1798714A1
EP1798714A1 EP06123242A EP06123242A EP1798714A1 EP 1798714 A1 EP1798714 A1 EP 1798714A1 EP 06123242 A EP06123242 A EP 06123242A EP 06123242 A EP06123242 A EP 06123242A EP 1798714 A1 EP1798714 A1 EP 1798714A1
Authority
EP
European Patent Office
Prior art keywords
picture
sustain pulses
value
sus
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06123242A
Other languages
German (de)
English (en)
Inventor
Carlos Correa
Cédric Thebault
Rainer Zwing
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
THOMSON LICENSING
Original Assignee
Thomson Licensing SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP05292395A external-priority patent/EP1785975A1/fr
Application filed by Thomson Licensing SAS filed Critical Thomson Licensing SAS
Priority to EP06123242A priority Critical patent/EP1798714A1/fr
Publication of EP1798714A1 publication Critical patent/EP1798714A1/fr
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
    • G09G3/2944—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge by varying the frequency of sustain pulses or the number of sustain pulses proportionally in each subfield of the whole frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the invention relates to a method for power level control of a display device and an apparatus for carrying out the method.
  • the invention improves contrast and environment light operating ranges of display devices like plasma display panels (PDP) and all kind of display devices based on the principle of duty cycle modulation (pulse width modulation) of light emission, at the same time that picture quality is kept approximately constant for the whole range and substantially improved for the low contrast value settings.
  • PDP plasma display panels
  • pulse width modulation pulse width modulation
  • the Plasma technology makes possible to achieve flat colour panel of large size (out of the CRT limitations) and with very limited depth without any viewing angle constraints.
  • CRT Cathode Ray Tube
  • PDP is a technology that generates its own light.
  • both technologies use a power management (or brightness regulation) circuit which allows a higher peak white brightness value than a full white value.
  • the CRT screens use a so called ABL (for Average Beam-current Limiter) circuit, which is implemented by analog means usually in the video controller, and which decreases video gain as a function of average luminance usually measured over an RC stage.
  • ABL Average Beam-current Limiter
  • the plasma display panels use a so called APL (for Average Power Level) control circuit that generates less or more sustain pulses as a function of the average power level of the displayed picture.
  • APL Average Power Level
  • the APL control starts from the reflection that for larger peak white luminance values in plasma displays more sustain pulses are necessarily required.
  • more sustain pulses correspond also to a higher power consumption of the PDP.
  • Such an APL control circuit is described in the international patent application WO 00/46782 . For pictures having relatively low picture power, i.e.
  • a mode will be selected which uses a high number of sustain pulses to create the different video levels because the overall power consumption will be limited due to a great amount of pixels with low luminance value.
  • a mode will be selected which uses a low number of sustain pulses to create the different video levels because the overall power consumption will be high due to a great amount of pixels with high luminance value.
  • the APL control is implemented as follows: first the average video level of the input signal after de-gamma is computed. This value is a good estimation of the total luminance power required for reproducing the input picture. Secondly, by means of a look-up table, the total number of sustain pulses that can be generated for the input picture to keep the power consumption in an authorized range is determined and a corresponding subfield organisation is simultaneously selected. As described in the international patent application WO 00/46782 , the sub-field organisations can vary in respect to one or more of the following characteristics:
  • this APL control allows a higher peak-white value without overloading the set power supply but it can have a functioning that is not compatible with the contrast and/or brightness control defined by the user or defined automatically according to the user viewing conditions (day-time viewing vs. evening-time viewing with dimmed environment light).
  • the contrast and/or brightness control defined by the user or defined automatically according to the user viewing conditions (day-time viewing vs. evening-time viewing with dimmed environment light).
  • the APL control increases the number of sustain pulses within the video frame and when the user tries to increase the contrast of the picture, the APL control decreases the number of sustain pulses. So, these two controls are contradictory.
  • this problem has become more severe, because due to recent advantages in PDP technology, plasma brightness has improved, which requires a larger reduction in contrast in case of dark viewing environment.
  • the subfield organisation that corresponds to a power level mode
  • the subfield organisation that corresponds to a power level mode
  • the picture power is thus controlled by selecting an appropriate power level mode (with an appropriate number of sustain pulses within the frame) instead of modifying the video levels to be displayed.
  • the invention concerns a method for power level control in a display device having a plurality of luminous elements corresponding to the pixels of an input picture, wherein the time duration of a video frame is divided into a plurality of subfields during which each luminous element can be activated for light emission in small pulses, called hereinafter sustain pulses, corresponding to a subfield code word representative of the video level of the corresponding pixel, wherein a set of power level modes is provided for subfield coding wherein to each power level mode a characteristic subfield organization belongs, the subfield organizations being variable in respect to the number of sustain pulses during a frame. It comprises :
  • it further comprises a step for selecting a video gain value based on said power value and said picture control value and a step for applying said video gain value to the video levels of the pixels of the picture to be displayed.
  • This video gain value is particularly useful when the number of sustain pulses required to obtain the desired picture power is lower than the number of sustain pulses of any one of the power level modes.
  • the picture control value is based on a contrast value and/or a brightness value that can be selected by a user or derived from user viewing conditions.
  • the invention concerns also an apparatus for power level control in a display device having a plurality of luminous elements corresponding to the pixels of an input picture, wherein the time duration of a video frame is divided into a plurality of subfields during which each luminous element can be activated for light emission in small pulses, called hereinafter sustain pulses, corresponding to a subfield code word representative of the video level of the corresponding pixel.
  • the apparatus comprises :
  • the second selection circuit is also used for selecting a video gain value based on said power value and said picture control value.
  • the video gain is applied to the video levels of the pixels of the picture to be displayed when the number of sustain pulses required to obtain the desired picture power is lower than the number of sustain pulses of any one of the power level modes.
  • multiplier circuits are provided in the apparatus for applying said video gain value to the video levels.
  • the second selection circuit comprises :
  • the first selection circuit can be an ambient light detector delivering a brightness and/or contrast value as a function of the user viewing conditions and/or a contrast/brightness selector controlled by the user.
  • Fig.1 shows a block diagram of a power control device of a Plasma display Panel of the prior art. It comprises an APL control circuit for controlling the power consumption of the panel and a picture control circuit for controlling the contrast/brightness of the picture to be displayed. These two circuits work independently.
  • the picture power control is made by modifying the levels of the input video signals of the picture to be displayed. So it consists in multiplying the input video signals RED[7:0], GREEN[7:0], BLUE[7:0] by a picture control signal PICT_CTRL[7:0] representative of a picture power selected by the user.
  • This picture control circuit is implemented by the multiplier circuits 10.
  • the APL control consists in computing the average power of the picture to be displayed and selecting an appropriate power level mode (corresponding to a subfield organization) for sub-field coding to have a good management of the power consumption.
  • the video signals RED[7:0], GREEN[7:0], BLUE[7:0] outputted by the multipliers 10 are provided to an Average Power Level computation circuit 20 after a de-gamma processing 30.
  • the APL computation circuit 20 outputs a 10-bit APL signal, called APL[9:0], that is representative of the total luminance power required for displaying the input picture.
  • the average power value APL[9:0] of a picture can be calculated by simply summing up the pixel values for all video input data and dividing the result through the number of pixel values multiplied by three.
  • the signal APL[9:0] is then used by an APL mode decoder 40 for converting it into a power level mode, called APL_MODE[9:0], representing a subfield organization.
  • APL mode decoder 40 is a simple Look Up Table. Different examples of power level modes are given here :
  • the number of sustain pulses of a power level mode given in this example is identical to the mode number.
  • the sustain pulses are distributed among the different subfields of the video frame. This distribution is not described because it does not have consequences on the power consumption.
  • the input video signals RED[7:0], GREEN[7:0], BLUE[7:0] outputted by the multipliers 10 are also provided to a PDP display engine 50 after being delayed by a frame delay circuit 60 and a de-gamma processing 70.
  • input video signals have to be de-gammed by because the PDP display engine 50 has a linear gamma transfer function (the displayed brightness is proportional to number of generated sustain pulses). They also have to be delayed from a frame duration in order that the power level mode APL_MODE[9:0] determined by the decoder 40 corresponds to the video data supplied to the PDP display engine 50.
  • the linear display engine 50 receives three 16-bit de-gammed input video signals RED[15:0], GREEN[15:0], BLUE[15:0] and the 10-bit APL mode value APL_MODE[9:0] that controls the number of sustain pulses to be generated.
  • the subfield organization selected by the signal APL_MODE[9:0] is used by the display engine 50 for coding the video signals RED[15:0], GREEN[15:0], BLUE[15:0] and the signals outputted by the display engine 40 are then provided to the PDP drivers 80 for displaying the corresponding images.
  • the power level mode is selected as a function of the average power level of the image to be displayed and the picture power control selected by the user or defined by an ambient light sensor.
  • FIG. 2 shows a block diagram of a power level control device of a Plasma display Panel according to the invention.
  • the same reference signs are used in figures 1 and 2 for the identical circuit blocks.
  • the multipliers 10 are removed and the APL mode decoder 40 is replaced by an APL control circuit 40' that receives, in addition to the signal APL[9:0], the picture control signal PICT_CTRL[7:0].
  • the circuit 40' delivers the power level mode signal APL_MODE[9:0] and advantageously a video gain signal GAIN[9:0].
  • the power level mode signal APL_MODE[9:0] is used by the display engine 50 for subfield coding.
  • the video gain GAIN[9:0] is applied to the video signals RED[15:0], GREEN[15:0], BLUE[15:0] by means of multiplier circuits 90.
  • the function of the APL power control circuit 40' is to modify the power level mode defined by the APL control in accordance with the picture control PICT_CTRL[7:0] selected by the user or defined as a function of the user environment light.
  • the mode selected will have at most the same number of sustain pulses than the mode selected by the APL mode decoder of figure 1.
  • the basic principle of this circuit is to increase or decrease the picture power by changing the value of the total number of sustain pulses within a frame, i.e by selecting an appropriate power level mode.
  • FIG. 3 shows a block diagram of the APL control circuit 40'.
  • the circuit comprises a first look up table 401 for transforming the APL value APL[9:0] into a first number of sustain pulses SUS_NB1[9:0] corresponding to the number of sustain pulses of a power level mode adapted to the considered APL value. It comprises also a second look up table 402 that converts each picture control value PICT_CTRL[7:0] into three values :
  • the number of sustain pulses SUS_NB1[9:0] is then multiplied by the gain SUS_GAIN[9:0] by the means of a multiplier circuit 403. It delivers a second number of sustain pulses SUS_NB2[9:0].
  • the gain factor SUS_GAIN[9:0] is comprised between 0 and 1023 in order to have gain factors with enough precision for different picture control values. Consequently, the gain factor SUS_GAIN[9:0] is divided by 1024 in the multiplier circuit 304.
  • the second number of sustain pulses SUS_NB2[9:0] is then compared to the highest allowed number of sustain pulses SUS_LOW[9:0] by a circuit 404 that selects the maximal value between these two values.
  • the number of sustain pulses, referenced SUS_NB3[9:0], outputted by the circuit 404 is then compared to the highest allowed number of sustain pulses SUS_HIGH[9:0] by a circuit 405 that selects the minimal value between these two values.
  • the number of sustain pulses, referenced SUS_NB4[9:0], outputted by the circuit 405 is converted by a sustain mode look up table 406 into a power level mode APL_MODE[9:0] as defined before and a gain value GAIN[9:0] representing a gain factor to be applied to the video input signals RED[15:0], GREEN[15:0], BLUE[15:0].
  • a power level mode APL_MODE[9:0] if the LUTs 401 and 406 were directly connected in series, they were equivalent to the APL mode decoder 40 of the figure 1.
  • the proposed circuit is to be used to reduce the PDP picture power in relation to the nominal value of the PDP panel specification ratings (which are usually max values) and should not be used to increase it in order to prevent overloading of the power supply.
  • Examples of the signals PICT_CTRL[7:0], SUS_GAIN[9:0], SUS_LOW[7:0] and SUS_HIGH[9:0] are given below.
  • the video frame comprises 200 sustain pulses for a full white picture and 1000 sustain pulses for a peak white picture.
  • a reduced number (16) of picture power control values, PICT_CTRL[7:0], instead of 256 picture power control values are given.
  • the picture power control values can be selected by the user or come from an ambient light sensor. They can also be a mix of these two commands.
  • a high picture power control value indicates that a high brightness and/or contrast is requested.
  • PICT_CTRL[7:0] SUS_HIGH[9:0] (peak white)
  • SUS_GAIN[9:0] intermediate)
  • SUS_LOW[9:0] full white
  • the PDP manufacturer has in fact the freedom to decide how the power is reduced in terms of full white picture and peak white picture power levels.
  • the factor POWER_SUSTAIN_GAIN[9:0] is provided for specifying the power gain to be used for the intermediate modes comprised between the mode corresponding to a full white picture and the mode corresponding to a peak white picture.
  • the invention presented here is an improvement of the classical power management circuit. It proposes a simple and easy way for having a power management of the panel which is not in contradiction with the picture power selected by a user or by an ambient light sensor. More particularly, the present invention is an efficient way to adapt the panel operation to the actual user viewing conditions (day-time viewing vs. evening-time viewing with dimmed environment light).
  • PIC_CTRL 7 : 0 AMBIENT_LIGHT 7 : 0 * USER_CONTRAST 7 : 0 / 256
  • This invention improves also picture quality because the number of discrete video levels available for coding video is higher if compared to the solution where brightness or contrast is controlled exclusively by means of video gain on the input side.
  • the invention can be used for all kinds of displays which are controlled by using a PWM like control of the light emission for grey-level variation.
EP06123242A 2005-11-10 2006-10-31 Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage Withdrawn EP1798714A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP06123242A EP1798714A1 (fr) 2005-11-10 2006-10-31 Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05292395A EP1785975A1 (fr) 2005-11-10 2005-11-10 Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage
EP06123242A EP1798714A1 (fr) 2005-11-10 2006-10-31 Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage

Publications (1)

Publication Number Publication Date
EP1798714A1 true EP1798714A1 (fr) 2007-06-20

Family

ID=38039073

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06123242A Withdrawn EP1798714A1 (fr) 2005-11-10 2006-10-31 Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage

Country Status (1)

Country Link
EP (1) EP1798714A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0841652A1 (fr) * 1996-11-06 1998-05-13 Fujitsu Limited ContrÔle de la consommation de puissance d'une unité d'affichage
US5757343A (en) * 1995-04-14 1998-05-26 Pioneer Electronic Corporation Apparatus allowing continuous adjustment of luminance of a plasma display panel
EP1149374A1 (fr) * 1999-02-01 2001-10-31 Thomson Licensing Procede de commande du niveau de puissance d'un dispositif d'affichage et appareil de mise en oeuvre de ce procede
US6380943B1 (en) * 1998-09-18 2002-04-30 Matsushita Electric Industrial Co., Ltd. Color display apparatus
EP1321923A1 (fr) * 2001-12-13 2003-06-25 NEC Viewtechnology, Ltd. Appareil d'affichage d'images, méthode de commande de la quantité de lumiére, et moyen de stockage du programme pour cette méthode

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5757343A (en) * 1995-04-14 1998-05-26 Pioneer Electronic Corporation Apparatus allowing continuous adjustment of luminance of a plasma display panel
EP0841652A1 (fr) * 1996-11-06 1998-05-13 Fujitsu Limited ContrÔle de la consommation de puissance d'une unité d'affichage
US6380943B1 (en) * 1998-09-18 2002-04-30 Matsushita Electric Industrial Co., Ltd. Color display apparatus
EP1149374A1 (fr) * 1999-02-01 2001-10-31 Thomson Licensing Procede de commande du niveau de puissance d'un dispositif d'affichage et appareil de mise en oeuvre de ce procede
EP1321923A1 (fr) * 2001-12-13 2003-06-25 NEC Viewtechnology, Ltd. Appareil d'affichage d'images, méthode de commande de la quantité de lumiére, et moyen de stockage du programme pour cette méthode

Similar Documents

Publication Publication Date Title
US8188966B2 (en) Image display device and method capable of adjusting brightness
JP5187691B2 (ja) 低電力映像表示装置および映像表示方法
EP2175437A1 (fr) Dispositif d'affichage d'images, appareil électronique, poste de télévision à cristaux liquides, appareil d'attaque pour cristal liquide, méthode d'affichage d'images, programme de gestion d'affichage et support d'enregistrement lisible sur ordinateur
KR101073006B1 (ko) 표시장치 및 표시장치의 이미지 밝기조절방법
US8279214B2 (en) Method and apparatus for power level control of a display device
US7088313B2 (en) Method and apparatus for compensating white balance of plasma display panel
JP4547129B2 (ja) ビデオ画像を処理する方法及び装置
US7982730B2 (en) Method and apparatus for power control in a display device
US7515119B2 (en) Method and apparatus for calculating an average picture level and plasma display using the same
JP5744815B2 (ja) 制御方法及び制御装置
US7098874B2 (en) Method and apparatus of driving plasma display panel
EP1798714A1 (fr) Procédé et appareil pour le contrôle de la puissance dans un dispositif d'affichage
EP1798713B1 (fr) Procédé et dispositif pour le contrôle du niveau de puissance dans un dispositif d'affichage
EP1526500A2 (fr) Procédé et dispositif pour réduction de rémanence d'image sur un dispositif d'affichage à plasma
JP4318136B2 (ja) 表示デバイスの駆動方法
EP1798712B1 (fr) Procédé et appareil pour le contrôle du niveau de puissance d'un dispositif d'affichage
JP2005156838A (ja) 画像表示装置
JP2008052068A (ja) プラズマディプレイ装置

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK YU

17P Request for examination filed

Effective date: 20071214

AKX Designation fees paid

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 20080206

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: THOMSON LICENSING

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20110610