Video format detector and integrated circuit comprising such video format detector as well as method for distinguishing different standards and/or types of video formats
The present invention relates in general to the field of integrated circuits for digital T[ele]Vi[sion] applications and is intended for distinguishing different standards and/or types of video formats in a digital video input stream by a video format detector comprising at least one horizontal reference pulse and - at least one vertical reference pulse, wherein the reference pulse is based on at least one high level and at least one low level. The present invention further relates to a method for distinguishing different standards and/or types of video formats in such a digital video input stream.
In prior art document US 6 108 046 a method and apparatus for automatically detecting the format of a H[igh]D[efinition]T[ele]Vi[sion] signal at a video encoder in order to allow proper encoding of the signal, including progressive and interlaced scan, and specific pixel and vertical line resolutions is disclosed. A video format detector as described above with respect to the technical field is disclosed in prior art document EP 1 370 090 Al. This video format detector comprises a measurement stage for counting the number of pixels of a specific section of an input video stream, and a classification stage for determining the type of video format based on the number of pixels counted by the measurement stage. In these prior art documents, the number of clock pulses between the horizontal reference pulses (line in prior art document US 6 108 046; rising edge or falling edge of Hsync oder SAV or EAV of 656 video stream in prior art document EP 1 370 090 Al) is determined; this number is used sole criterion; in particular, there is no analysis of the polarity of the reference pulses.
Since the number of different standards and/or types of video formats has already been very high and is expected to increase further, the art of video format detection requires improvement compared to the prior art. Starting from the disadvantages and shortcomings as described above and taking the prior art as discussed into account, an object of the present invention is to provide a video format detector which is able to reliably recognize the rapidly rising number of different standards and/or types of video formats, in particular of different standards and/or types of H[igh]D[efinition] video sources.
The object of the present invention is achieved by a video format detector comprising the features of claim 1 , by an integrated circuit comprising the features of claim 7 as well as by a method comprising the features of claim 8. Advantageous embodiments and expedient improvements of the present invention are disclosed in the respective dependent claims. The present invention relates in general to the automatic detection of H[igh]D[efinition] video input standards and covers the field of integrated circuits for digital T[ele]V[ision] applications. In particular, the present invention is based on the analysis and/or investigation of at leastone video data stream and is directed to the recognition of the standard and/or the type of such video data stream being provided by high definition video sources. In an essential embodiment of the present invention at least one horizontal] sync [hronization] pulse and/or at least one v[ertical]sync[hronization] pulse is sampled, for example hsync with at least one clock, vsync with Hsync. In this context, in TV applications often the hsync is the reference signal, from which a clock signal or a clock pulse is derived that has got multiples of the input frequency, for instance with a factor of 2048 times higher, or parts of it. Moreover according to an essential embodiment of the present invention, the hsync signal and/or the vsync signal, in particular the sampled at least one value of the hsync pulse and/or of the vsync pulse, is stored in at least one hardware register, in particular in at least one register unit. According to the method of the present invention, the video format is
determined on the basis of the sampled horizontal reference pulse(s) and/or on the basis of the sampled vertical reference pulse(s) by means of at least one evaluation step. For this reason in a preferred embodiment of the present invention the distance and/or the duration and/or the polarity of the horizontal reference pulse(s), in particular of the hsync pulse(s), is calculated. Independently thereof or in connection therewith, the distance and/or the duration and/or the polarity of the vertical reference pulse(s), in particular of the vsync pulse(s), can optionally be calculated. According to a preferred embodiment of the present invention, comparison of the calculated distance and/or of the duration and/or of the polarity of the horizontal reference pulse(s) respectively of the vertical reference pulse(s) with at least one reference value defines and gives the standard and/or the type of the digital video input stream, for example the H[igh]D[efinition]T[ele]V[ision] standard. To summarize and in comparison with the prior art documents as discussed in the chapter "background and prior art" above, it may be an advantageous feature of the present invention that the time distance or time interval between the reference pulses is composed of the sum of the time distances or time intervals of the reference pulses H[igh Level] or L[ow Level]; in addition, the polarity of the reference pulses can be determined. In this context, the method of differentiating or distinguishing different standards and/or types of video formats by way of the polarities of the horizontal and/or vertical time references is particularly practicable for systems where the horizontal and/or vertical time references are transmitted separately from the video data stream (such separation of the time references from the video stream normally occurs with digital video sources). In the contrary case of the horizontal and/or vertical time references being part of the video data stream (which normally occurs with originally analog video sources), the width of the vertical time reference constitutes the preferred parameter. The present invention finally relates to the use of at least one video format detector as described above and/or of at least one integrated circuit as described
above and/or of the method as described above for the recognition of at least one standard and/or type of H[igh]D[efinition] video source referring to digital television, in particular to H[igh]D[efinition]T[ele]V[ision]. As already discussed above, there are several options to embody as well as to improve the teaching of the present invention in an advantageous manner. To this aim, reference is made to the claims respectively dependent on claim 1 and on claim 8; further improvements, features and advantages of the present invention are explained below in more detail with reference to a preferred embodiment by way of example and to the accompanying drawings where
Fig 1 schematically shows a timing diagram (— > time t on the abscissa) of the digital video input stream comprising the horizontal reference pulses (= upper part of Fig. 1) as well as the vertical reference pulses (= lower part of Fig. 1); Fig. 2A schematically shows the first part, in particular the measurement part, of an embodiment of a video format detector according to the present invention, being operated according to the method of the present invention; and Fig. 2B schematically shows the second part (= the "right hand side" continuation of Fig. 2 A), in particular the evaluation part, of the video format detector of Fig. 2A, being operated according to the method of the present invention.
The same reference numerals are used for corresponding parts in Fig. 1, in Fig. 2A and in Fig. 2B. In the following, an example for analyzing and/or for investigating a video data stream as exemplified in figure 1 is given. Said video data stream comprises horizontal reference pulses 10 (= upper part of figure 1) as well as vertical reference pulses 12 (= lower part of figure 1) and is analyzed and/or investigated in an embodiment of a video format detection device 100 which is embedded in an integrated
circuit 200. The horizontal reference pulses 10 and the vertical reference pulses 12 are extracted from the video data stream in advance. For a standard recognition, the feature is used that some basic parameters of these reference pulses are TV standard specific, for example the duration or time period 16 of the horizontal reference pulse 10, the width 24 of the vertical reference pulse 12, the polarity 26 of the horizontal reference pulse 10 and/or the polarity 28 of the vertical reference pulse 12 (cf. figure 1). In this context, the polarity 26 of the horizontal reference pulse 10 refers to the feature whether this time reference 10 takes up the high level 20 (= digital state "1") or the low level 22 (= digital state "0") during the dominant part of its duration or period 16; in an analogous manner, the polarity 28 of the vertical reference pulse 12 refers to the feature whether this time reference 12 takes up the high level 20 (= digital state "1") or the low level 22 (= digital state "0") during the dominant part of its duration or period 18. From this feature, it can be concluded whether there is the low level "0" or the high level " 1 " at the position denoted by the respective reference numeral 26, 28. In order to derive the above-mentioned parameters (duration or time period 16 of the horizontal reference pulse 10; width 24 of the vertical reference pulse 12; polarity 26 of the horizontal reference pulse 10; and/or polarity 28 of the vertical reference pulse 12), the shape of the horizontal reference pulses 10 and the shape of the vertical reference pulses 12 is analyzed and/or investigated. Since the reference pulses 10, 12 have only two levels, namely the high level 20 (= digital state "1") and the low level 22 (= digital state "0") respectively, this analysis and/or investigation is done by measurement of the time (duration or interval) each pulse stays at each level (cf. figure 1 and figure 2A). For determining the duration or period 16 of the horizontal reference pulse 10, at least one clock pulse 30o is provided by a time base unit 30
(cf. figure 2A), wherein the time base 30 of the clock is independent of the horizontal reference pulse 10, the number of clock pulses 30o being present during the high level 20 of the horizontal reference pulse 10 is counted by a first counter 40 (cf. figure 2A), the number of clock pulses 30o being present during the low level 22 of the horizontal reference pulse 10 is counted by a second counter 42 (cf. figure 2A), and the duration of the horizontal reference pulse 10 during the high level 20 and the duration of the horizontal reference pulse 10 during the low level 22 is added by an addition unit 70 (cf. figure 2B being the "right hand side" continuation of figure 2A). Thus the number of clock pulses 30o that are present during each level 20, 22 within one period 16 of the horizontal reference pulse 10 is counted. For determining the distance and/or width 24 of the vertical reference pulse 12, the number of horizontal reference pulses 10 being present during the high level 20 of the vertical reference pulse 12 is counted by a third counter 44 (cf. figure 2A), - the number of horizontal reference pulses 10 being present during the low level 22 of the vertical reference pulse 12 is counted by a fourth counter 46 (cf. figure 2A), and the duration of the vertical reference pulse 12 during the high level 20 and the duration of the vertical reference pulse 12 during the low level 22 is compared by a comparison unit 82 (cf. figure 2B), wherein the distance and or width 24 of the vertical reference pulse 12 is defined by the lower value of these durations. Thus in case of the vertical reference pulse 12 the number of horizontal reference pulses 10 during each level 20, 22 within one duration or time period 18 of the vertical reference pulse 12 is counted. As can be taken from figure 2A, the respective values of the four counters 40, 42, 44, 46 are periodically (Enable) stored in four assigned registers 50,
52, 54, 56. In other words, the storing of the respective output signal 40o, 42o, 44o, 46o is enabled periodically by a respective enabling signal 60o, 62o, 64o, 66o provided by a respective enabling unit 60, 62, 64, 66. In more detail, - the output signal 40o of the first counter 40 is stored in the first register unit 50, the output signal 42o of the second counter 42 is stored in the second register unit 52, the output signal 44o of the third counter 44 is stored in the third register unit 54, and the output signal 46o of the fourth counter 46 is stored in the fourth register unit 56. Thus, for each reference pulse 10, 12 a register 50 respectively 54 for the counter value 40o respectively 44o representing the time reference pulse 10 respectively 12 having high level 20 and a register 52 respectively 56 for the counter value 42o respectively 46o representing the time reference pulse 10 respectively 12 having low level 22 is used. The counters 40, 42, 44, 46 and the registers 50, 52, 54, 56 are embodied as hardware units. Merely for reasons of transition in viewing, the same four register units 50, 52, 54, 56 are shown on the right border of figure 2A as well as on the left border of figure 2B. Regarding the evaluation process as illustrated in figure 2B, the content of these registers 50, 52, 54, 56 is used so as to evaluate the parameters which are specific for the HD video data stream standards. By applying some calculations on the stored values, by comparison with reference values and by logical combination (cf. figure 2B) the received HD video standard can be derived. In the detailled embodiment as shown in figure 2B, an addition unit 70 is provided for firstly determining the period 16 of the horizontal reference pulse 10 by adding the duration of the horizontal reference pulse 10 being at high level 20 with the duration of the horizontal reference pulse 10 being at low level 22 because most of the
standards and/or types can be distinguished by this parameter. For this aim, the number of clocks 30o during high level 20 being stored in the first register unit 50 and ~ representing the duration of the horizontal reference pulse 10 being at high level 20 and the number of clocks 30o during low level 22 being stored in the second register unit 52 and representing the duration of the horizontal reference pulse 10 being at low level 22 and are added. As can further be taken from figure 2B, a first comparator unit 80 is provided in series to the output terminal of the adder 70 in order to compare the determined period 16 of the horizontal reference pulse 10 with a reference value 90 of each standard and/or type of video format. A final logical combination unit 86 is provided in series to the output terminal of the comparator 80 in order to create a desired output signal 86a, namely the H[igh]D[efinition] standard and/or the H[igh]D[efinition] type of the video format to be detected. In case more than one input standard matches with the reference value, further parameters need to be checked as follows: One of these further parameters to be analyzed and/or investigated is the width 24of the vertical blanking interval. The polarity 28 of this vertical blanking interval is not determined but the level 20, 22 that covers the lower time within one period 18 of the vertical reference pulse 12 always represents this vertical blanking period. For this aim, the register 54, 56 containing the lower value for the level 20, 22 of the vertical reference pulse 12 reflects the width 24 of the vertical blanking period. The content of this register 54, 56 is used for comparison with the reference values for each standard. In the detailled embodiment as shown in figure 2B, a first minimum detection unit 72 for determining the distance and/or the width 24 and/or the polarity 28 of the vertical reference pulse 12 is provided. A second comparator unit 82
is provided with this distance and/or the width 24 of the vertical reference pulse 12 as well as with a second reference value 92 of each standard and/or type of video format and compares the determined distance and/or width 24 with this second reference value 92. The final logical combinator 86 is provided in series to the output terminal of the second comparator 82 in order to create the desired output signal 86a, namely the H[igh]D[efmition] standard and/or the H[igh]D[efmition] type of the video format to be detected. In case the width 24 of the vertical blanking period cannot be used as further parameter of analysis and/or of investigation, the polarity 26 of the horizontal reference pulses 10 and/or - the polarity 28 of the vertical reference pulses 12 may be taken as further parameter(s) of analysis and/or of investigation. By checking which one of the four registers 50, 52, 54, 56 for the horizontal reference signal 10 and for the vertical reference signal 12 contains the lower value, the polarity 26, 28 can be determined. This polarity 26, 28 then has to be compared with the expected polarities for each standard. In the detailled embodiment as shown in figure 2B, a further (or second) minimum detection unit 74 for determining the polarity 26 of the horizontal reference pulse 10 is provided. A third comparator unit 84 is provided — with this polarity 26 of the horizontal reference pulse 10, with the polarity 28 of the vertical reference pulse 12 as determined by the first minimum detector 72 as well as with a third reference value 94, namely with an expected polarity, of each standard and/or type of video format - and compares the determined polarities 26, 28 with this third reference value 94. The final logical combinator 86 is provided in series to the output
terminal of the third comparator 84 in order to create the desired output signal 86a, namely the H[igh]D[efmition] standard and/or the H[igh]D[efmition] type of the video format to be detected. As described above, an advantageous way of choosing a kind of partitioning of steps, for example measurement (cf. figure 2A) by hardware and evaluation (cf. figure 2B) by software, significantly reduces the effort in hardware and keeps the functionality of the present invention flexible for further extensions.
LIST OF REFERENCE NUMERALS
100 video format detector
10 horizontal reference pulse
12 vertical reference pulse 16 (time) period of the horizontal reference pulse 10
18 (time) period of the vertical reference pulse 12
20 high level of the reference pulse 10, 12
22 low level of the reference pulse 10, 12
24 distance and/or width of the vertical reference pulse 12 26 polarity of the horizontal reference pulse 10
28 polarity of the vertical reference pulse 12
30 time base or time base unit
30o clock pulse of the time base 30
40 first counter 40o output signal of the first counter 40
42 second counter
42o output signal of the second counter 42
44 third counter
44o output signal of the third counter 44 46 fourth counter
46o output signal of the fourth counter 46
50 first register unit
52 second register unit
54 third register unit 56 fourth register unit
60 first enabling unit
60o enabling signal of the first enabling unit 60
62 second enabling unit
62o enabling signal of the second enabling unit 62 64 third enabling unit
64o enabling signal of the third enabling unit 64
66 fourth enabling unit
o enabling signal of the third enabling unit 66 addition unit minimum detection unit, in particular first minimum detection unit second minimum detection unit comparator unit, in particular first comparator unit second comparator unit third comparator unit logical combination unito output signal of the logical combination unit 86, in particular standard and/or type of video format, more particularly H[igh]D[efinition] standard reference value, in particular first reference value second reference value third reference value0 integrated circuit time