EP1656473A2 - Metal nano-objects, formed on semiconductor surfaces, and methods for making said nano-objects - Google Patents

Metal nano-objects, formed on semiconductor surfaces, and methods for making said nano-objects

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Publication number
EP1656473A2
EP1656473A2 EP03762740A EP03762740A EP1656473A2 EP 1656473 A2 EP1656473 A2 EP 1656473A2 EP 03762740 A EP03762740 A EP 03762740A EP 03762740 A EP03762740 A EP 03762740A EP 1656473 A2 EP1656473 A2 EP 1656473A2
Authority
EP
European Patent Office
Prior art keywords
metal
nano
objects
monocrystalline
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03762740A
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German (de)
French (fr)
Inventor
Marie D'angelo
Victor Aristov
Patrick Soukiassian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universite Paris Sud Paris 11
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
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Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to EP10169399A priority Critical patent/EP2233615A3/en
Publication of EP1656473A2 publication Critical patent/EP1656473A2/en
Withdrawn legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • C30B29/605—Products containing multiple oriented crystallites, e.g. columnar crystallites
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide

Definitions

  • METAL NANO-OBJECTS FORMED ON SEMICONDUCTOR SURFACES, AND METHOD FOR MANUFACTURING SUCH NANO-OBJECTS
  • the present invention relates to metallic nano-objects, formed on the surfaces of a semiconductor, and more particularly of a semiconductor having a large "gap", that is to say having a large forbidden bandwidth, as well as 'a manufacturing process for these nano-objects.
  • the invention relates more particularly to metallic nano-objects, such as, for example, atomic wires, one-dimensional nano-structures and metallic quantum dots, formed in particular on silicon carbide surfaces, as well as a process for manufacturing such nano-objects.
  • metallic nano-objects such as, for example, atomic wires, one-dimensional nano-structures and metallic quantum dots, formed in particular on silicon carbide surfaces, as well as a process for manufacturing such nano-objects.
  • the invention applies in particular to the field of nano-electronics.
  • the fabrication of the nano-objects is done by self-organization, in particular at room temperature and above, without individual manipulation of atoms, for example by near field microscopy, which is done mostly cold (using liquid nitrogen or liquid helium) to avoid the migration of atoms (see documents [7] to [9] cited below).
  • the present invention provides metallic nano-objects, such as atomic wires, one-dimensional nanostructures and metallic quantum dots, which are likely to be very useful in the fields of nano-electronics and opto-electronics.
  • the invention also solves the problem of manufacturing such nano-objects on the surface of a large gap semiconductor, in particular silicon carbide.
  • the substrates candidates for such an organization, are the substrates for which the diffusion barrier of. surface is anisotropic as a function of a parameter such as temperature, a mechanical stress
  • Nano-objects are produced by controlling the very delicate balance between the adsorbate-adsorbate and adsorbate-substrate interactions (the adsorbate being the metal) and by controlling the diffusion barrier of the atoms of the metal.
  • the invention makes it possible to obtain atomic wires and nanostructures of a metal, in particular silver, the direction of which is perpendicular to that of atomic lines, or atomic wires, of silicon which has been previously formed on the surface of a silicon carbide substrate.
  • the present invention firstly relates to a set of nano-objects, in particular atomic wires, one-dimensional nano-structures and quantum dots, this set being characterized in that the nano-objects are made of a metal and formed on the surface of a substrate of a monocrystalline semiconductor material.
  • This monocrystalline semiconductor material can be chosen from monocrystalline silicon carbide, monocrystalline diamond, monocrystalline covalent semiconductors and monocrystalline compound semiconductors.
  • This substrate can be a monocrystalline substrate of silicon carbide in the cubic phase.
  • the surface is a surface of cubic silicon carbide, rich in silicon ⁇ -SiC (100) 3x2.
  • Nano-objects can be three-dimensional clusters of metal on the surface.
  • the aggregates are distributed in an ordered fashion over the surface and thus form a network of metal studs.
  • the surface is a surface of cubic silicon carbide, terminated Si ⁇ -SiC (100) c (4x2), and the nano-objects are parallel atomic wires or parallel nanometric one-dimensional bands of metal .
  • the surface may include parallel atomic wires of Si, the atomic wires and one-dimensional bands of the metal being perpendicular to these atomic wires of Si.
  • the surface may include passivated zones and non-passivated zones, the nano-objects being formed on these non-passivated zones of the surface.
  • the present invention also relates to a method for manufacturing a set of nano-objects in which a surface of a substrate made of a monocrystalline semiconductor material is prepared and a metal is deposited on the surface thus prepared.
  • This .semiconducteur monocrystalline material may be selected from the monocrystalline silicon carbide, monocrystalline diamond, covalent monocrystalline semiconductors and semiconductor monocrystalline compounds.
  • This substrate can be a monocrystalline substrate of silicon carbide in cubic phase.
  • the metal can be deposited at a temperature above room temperature.
  • a surface of cubic silicon carbide, rich in ⁇ -SiC (100) 3 ⁇ 2 silicon is prepared and the metal is deposited on the surface thus prepared.
  • a finished silicon carbide surface Si, ⁇ -SiC (100) c (4x2) is prepared.
  • the metal is deposited at room temperature on the surface thus prepared and atomic wires of the metal are obtained by surface migration of the metal atoms along rows of Si-Si dimers from the surface c (4x2). are parallel to the rows of Si-Si dimers or silicon wires.
  • a thermal annealing of the substrate can be carried out at a temperature below the total desorption temperature of the metal.
  • the metal can be deposited by evaporation under vacuum or in an inert atmosphere. Passivated zones can be formed on the prepared surface and then the metal is deposited on non-passivated zones on this surface.
  • the metal can be chosen from metals whose band is full, metals of the jellium type, alkali metals (in particular sodium and potassium) and transition metals.
  • a laser can be used to obtain the desorption of metal either by thermal interaction of the beam emitted by this laser on the surface covered with metal, or by desorption of the metal, induced by electronic transitions (DIET ).
  • DIET electronic transitions
  • the surface can be a finished surface C of sp type, namely the ⁇ -SiC (100) c (2x2) surface.
  • This surface can include atomic lines of C of sp3 type.
  • a network of metal studs is formed on the surface of the substrate in monocrystalline semiconductor material, the material of the material is locally transformed substrate located under the pads and eliminating the network of pads to obtain a super-network of pads made of the transformed material.
  • the local transformation of the material of the substrate is chosen from oxidation, nitriding and oxynitriding in order to obtain a super-network of studs made of the oxide, niture or oxynitride of the material.
  • FIG. 1 is a schematic view of aggregates three-dimensional metal, obtained in accordance with the invention
  • FIG. 2 is a schematic top view of metallic atomic wires, obtained in accordance with the invention and parallel to atomic lines of Si
  • FIG. 3 is a schematic top view of wires metallic atoms and metallic one-dimensional bands, obtained in accordance with the invention and perpendicular to atomic lines of Si
  • FIG. 4 is a schematic top view of such atomic wires and one-dimensional bands, obtained in accordance with the invention, on non-passivated areas of a silicon carbide surface
  • FIG. 5 is a schematic view of a network of sodium aggregates obtained in accordance with the invention on an SiC substrate
  • Figure 6 is a schematic sectional view of this substrate, carrying a super-network of studs silica obtained by a process in accordance with the invention
  • - Figure 7 represents photographs of LEED of a clean surface ⁇ -SiC (100) 3x2 (A), of the same surface covered by aggregates of Na and organized in 3x1 network (B) and the same surface covered by • Na aggregates and organized into a 3x2 network (C).
  • quantum dots By forming an image of the surface by STM or scanning tunneling microscopy, we see that the silver does not wet the surface and forms three-dimensional aggregates whose sizes range from 0.9nm to 3nm and are therefore likely to constitute quantum dots ("quantum dots").
  • the number, size and spacing of these aggregates or islands can vary depending on the amount of silver deposited and the annealing temperatures. This mode of growth indicates a dominant interaction between silver atoms.
  • FIG. 1 is a schematic top view of the surface 2 on which the aggregates 4 are formed.
  • the deposit of silver takes place in an enclosure where the pressure is less than 2 ⁇ 10 -8 Pa and is for example 6 ⁇ 10 -9 Pa; the distance between the surface and the source of silver is approximately 15cm; the current passing through the silver source during the deposit is worth 4A; the deposit time is between 2 minutes and 8 minutes (8 minutes corresponding to approximately a silver monolayer); the deposit takes place leaving the sample of SiC at room temperature (approximately 20 ° C).
  • the necessary annealing is carried out at approximately 500 ° C.
  • FIG. 2 is a schematic top view of the surface 6 carrying the parallel rows 8 of Si-Si dimers and the atomic wires of metal 9, which are parallel to these rows.
  • annealing is carried out below the total silver desorption temperature (700 ° C).
  • the silver layer is selectively desorbed and the atoms remaining on the surface organize themselves to make parallel one-dimensional bands of silver, nanometric in size, or parallel atomic wires of silver.
  • the direction of these atomic wires and of these one-dimensional bands is perpendicular to the rows of dimers.
  • FIG. 3 is a schematic top view of the surface 6 carrying the parallel rows 8 of Si-Si dimers and the atomic silver wires 10 as well as the one-dimensional nanometric silver bands 12.
  • the deposit of silver takes place in an enclosure where the pressure is equal to 2.1 ⁇ 10 ⁇ 9 Pa; the silver is deposited for 8 minutes by means of a silver source traversed by a current of 4A; during silver deposition, the sample is left at room temperature; after deposition, the annealing of the sample takes place by passing it through a current of 0.5A for 5 minutes.
  • silver wires can be constructed perpendicular to the Si atomic wires (see document [5]). This is extremely important for building artificial nanoscale networks, which can be very useful in nanoelectronics.
  • Silver can be replaced by other metals with a solid band, such as gold or copper, or by metals of the jellium type, such as aluminum.
  • jellium-type metal is a metal whose electron gas is substantially homogeneous and whose positive ionic charges are substantially "spread" ("smeared") throughout the volume of the metal to give a background (“ background ”) positive and consistent.
  • Silver can also be replaced by transition metals such as Mo,, Ta, Nb, Co, Fe, Mn, Cr, Ti for example.
  • the invention makes it possible to dope or to manufacture nanostructures having, for example, advantageous magnetic properties in spin electronics.
  • Silver can also be replaced by other metals such as alkali metals, which are remarkable catalysts for surface reactions with organic or inorganic molecules (see documents [1] and [2]).
  • the alkali metals also have the remarkable property of considerably lowering the work of output of the electrons, and of reaching the regime of negative electro-affinity, that is to say of constituting natural emitters of electrons.
  • the present invention allows this emission to be made from nanostructures of alkali metals (Cs, Rb, K or Na for example).
  • this evaporation can be carried out at higher pressure, in an inert atmosphere (rare gas, etc.).
  • the process which is the subject of the invention makes it possible to selectively control the migration or the desorption of the atoms of the metal (for example silver) by acting on the temperature.
  • a variation of the latter acts on the movement of the Si-Si dimers on SiC or causes this movement.
  • the surface of cubic SiC is prepared, finished Si ⁇ -SiC (100) c (4x2) and without the atomic lines of silicon, the metal is deposited and annealed below the total desorption temperature of the metal.
  • atomic wires of the metal and / or nanometric one-dimensional bands of this metal are obtained. These atomic wires and these one-dimensional bands are parallel to each other and are perpendicular to the direction in which the parallel rows of Si-Si dimers would be formed.
  • a prepared surface of a cubic SiC sample is locally passivated with hydrogen and the atomic wires and / or one-dimensional bands of the metal are formed in the non-passivated areas.
  • Figure 4 is a schematic top view of the surface 14 passively passivated and thus comprising passivated zones, such as zone 15, and non-passivated zones 16 and 18.
  • the parallel atomic lines of silicon, which are present in these zones 16 and 18, have the reference 20.
  • the areas that are not to be passivated are covered with a photoresist layer and the latter is eliminated after passivation of the non-covered areas. Knowing a priori the direction of the rows of Si-Si dimers, it is possible to form rectangular non-passivated zones of which one of the sides is parallel to this direction.
  • this surface is prepared in order to present, on an atomic scale, a controlled organization of c symmetry (4x2). This surface is then exposed to molecular hydrogen until saturation. Upon exposure to molecular hydrogen, the SiC is kept at room temperature.
  • the cubic SiC is placed in a treatment enclosure, in which a pressure of less than 5 ⁇ 10 -10 hPa prevails, and heated by passing an electric current directly through this SiC substrate.
  • the latter is heated for several hours at 650 ° C. and then brought several times to 1100 ° C. for one minute Using a source of silicon heated to 1300 ° C., several monolayers of silicon are deposited on the surface (100) of the cubic SiC.
  • part of the deposited silicon is evaporated in a controlled manner until the surface has an organization on the atomic scale (reconstruction) of 3 ⁇ 2 symmetry. This symmetry of the surface can be controlled by electron diffraction.
  • the surface is maintained at room temperature.
  • the SiC surface is exposed until saturation (greater than 50L). This saturation can be monitored by a tunneling microscope or by a valence band photoemission technique.
  • the Na aggregates are identified using a 3.1 eV plasmon which exactly corresponds to the energy of spherical Na aggregates. Results also suggest that sodium aggregates are regularly spaced and their size tends to decrease when their coverage rate increases. Indeed, for the largest deposits (of the order of the atomic monolayer up to several monolayers - atomic) and after gradual annealing up to 350 ° C, the diffraction pattern of slow electrons becomes very contrasted, thus showing that the Na aggregates are well organized and regularly spaced on the ⁇ -SiC (100) 3 ⁇ 2 surface.
  • Self-organized quantum Na dots are thus formed by varying the balance between adsorbate-adsorbate and adsorbate-substrate interactions, by controlling the temperature and the quantity of metal deposited. This result is very important and the plots obtained differ very significantly from other quantum plots by the intrinsic properties of alkali metals such as sodium.
  • these pads are produced on the surface of a semiconductor, which is unprecedented, and what is more, it is a large gap semiconductor.
  • alkali metals such as Na have a very low electroaffinity. They considerably lower, by several electronvolts, the work function ("work function") of the surface and one can arrive at a negative electroaffinity regime (with the surface alone or exposed to oxygen), c i.e. a natural electron emitter, or a photoelectron emitter when the system is exposed to light.
  • a comparable phenomenon is used for the manufacture of light amplifiers in night vision devices from gallium arsenide surfaces coated with Cs and oxygen.
  • the polymer (respectively organometallic) studs which are discussed above, can also serve as anchoring points, on the surface where they are formed, for the molecules which have made it possible to form these studs.
  • small quantities approximately of the order of langmuir
  • inorganic or organic molecules for example hydrogen, oxygen, or any other molecule or element known to those skilled in the art as being capable of interacting with Na or alkali metals.
  • a sample thus prepared is then placed in a vacuum chamber. In the latter, a pressure of approximately 10 ⁇ 9 Pa is established.
  • Sodium is then deposited on the sample using a zeolite source, of the type which are sold by the SAES Getters company, after having perfectly degassed this source, so that the pressure increase in the enclosure during the deposition does not exceed 3 ⁇ 10 ⁇ 9 Pa. This gives sodium aggregates on the surface.
  • the deposit takes place at room temperature
  • Annealing is then carried out (at temperatures of a few hundred degrees, for example 350 ° C., for a period of a few seconds to a few minutes) of the surface of ⁇ -SiC (100) 3 ⁇ 2 covered with the sodium aggregates.
  • These anneals optimize the number, size and position of these aggregates. They can be done by Joule effect, by passing an electric current through the sample of SiC and by controlling the temperature of this last using a pyrometer or a thermocouple for example.
  • sodium was used to form the aggregates.
  • sodium could be replaced by other alkali metals, more particularly potassium, Cs, Rb or alkaline earth metals such as Mg, Ca and Ba for example.
  • a SiC substrate was used, which may be, in the context of the present invention, of cubic or hexagonal type, rich in Si and / or C.
  • substrate by a diamond substrate or by a substrate made of a covalent semiconductor material, for example Si or Ge, or by a substrate made of a semiconductor material composed III-V (for example GaAs, InP, GaSb, GaP or InAs) or II-VI (for example CdTe, ZnO or ZnTe).
  • III-V for example GaAs, InP, GaSb, GaP or InAs
  • II-VI for example CdTe, ZnO or ZnTe
  • the low-temperature thermal desorption which was discussed above, can be implemented in a range of temperatures from ambient temperature (about 25 ° C) to the desorption temperature of the metal considered on the substrate considered.

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Abstract

The invention concerns metal nano-objects, formed on semiconductor surfaces, and a method for making said nano-objects. The invention is applicable in nanoelectronics for example to obtain nano-objects (4) by deposition of a metal on a prepared cubic SiC surface (2).

Description

NANO-OBJETS METALLIQUES, FORMES SUR DES SURFACES DE SEMICONDUCTEURS, ET PROCEDE DE FABRICATION DE CES NANO- OBJETS METAL NANO-OBJECTS, FORMED ON SEMICONDUCTOR SURFACES, AND METHOD FOR MANUFACTURING SUCH NANO-OBJECTS
DESCRIPTIONDESCRIPTION
DOMAINE TECHNIQUETECHNICAL AREA
La présente invention concerne des nano- objets métalliques, formés sur des surfaces d'un semiconducteur, et plus particulièrement d'un semiconducteur ayant un grand « gap », c'est-à-dire ayant une grande largeur de bande interdite, ainsi qu'un procédé de fabrication de ces nano-objets.The present invention relates to metallic nano-objects, formed on the surfaces of a semiconductor, and more particularly of a semiconductor having a large "gap", that is to say having a large forbidden bandwidth, as well as 'a manufacturing process for these nano-objects.
L'invention concerne plus particulièrement des nano-objets métalliques, tels que, par exemple, des fils atomiques, des nano-structures unidimensionnelles et des plots quantiques (« quantum dots ») métalliques, formés en particulier sur des surfaces de carbure de silicium, ainsi qu'un procédé de fabrication de tels nano-objets . L'invention s'applique notamment au domaine de la nano-êlectronique.The invention relates more particularly to metallic nano-objects, such as, for example, atomic wires, one-dimensional nano-structures and metallic quantum dots, formed in particular on silicon carbide surfaces, as well as a process for manufacturing such nano-objects. The invention applies in particular to the field of nano-electronics.
ETAT DE LA TECHNIQUE ANTERIEURESTATE OF THE PRIOR ART
La fabrication des nano-objets se fait par auto-organisation, en particulier à température ambiante et au dessus, sans manipulation individuelle d'atomes, par exemple par microscopie en champ proche, qui se fait la plupart du temps à froid (en utilisant de l'azote liquide ou de l'hélium liquide) pour éviter la migration des atomes (voir les documents [7] à [9] cités plus loin) .The fabrication of the nano-objects is done by self-organization, in particular at room temperature and above, without individual manipulation of atoms, for example by near field microscopy, which is done mostly cold (using liquid nitrogen or liquid helium) to avoid the migration of atoms (see documents [7] to [9] cited below).
En ce qui concerne le traitement de surfaces, en particulier de surfaces semiconductrices, et la fabrication de nanostructures, en particulier de nanostructures unidimensionnelles, on consultera les documents suivants :With regard to the treatment of surfaces, in particular semiconductor surfaces, and the manufacture of nanostructures, in particular one-dimensional nanostructures, the following documents will be consulted:
[1] . Electronic promotion of silicon nitridation by alkali metals P. Soukiassian, H.M. Bakshi, H.I.[1]. Electronic promotion of silicon nitridation by alkali metals P. Soukiassian, H.M. Bakshi, H.I.
Starnberg, Z. Hurych, T. Gentle and K.P. SchuetteStarnberg, Z. Hurych, T. Gentle and K.P. Schuette
Physical Review Letters 59, 1488 (1987)Physical Review Letters 59, 1488 (1987)
[2]. CH3CI adsorption on a Si (100) 2x1 surface modified by an alkali métal overlayer studied by photoemission using synchrotron radiation[2]. CH 3 CI adsorption on a Si (100) 2x1 surface modified by an alkali metal overlayer studied by photoemission using synchrotron radiation
T. M. Gentle, P. Soukiassian, K.P. Schuette, M . H. Bakshi and Z . HurychT. M. Gentle, P. Soukiassian, K.P. Schuette, M. H. Bakshi and Z. Hurych
Surface Science Letters 202, L 568 (1988)Surface Science Letters 202, L 568 (1988)
[3] . Nitridation of silicon and other semiconduc ors using alkali métal catalysts[3]. Nitridation of silicon and other semiconduc ors using alkali metal catalysts
P. SoukiassianP. Soukiassian
US 4 735 921 AUS 4,735,921 A
[4] . Process of depositing an alkali métal layer onto the surface of an oxyde superσonductor P. Soukiassian and R.V. Kaso ski[4]. Process of depositing an alkali metal layer onto the surface of an oxide superσonductor P. Soukiassian and R.V. Kaso ski
US 4 900 710 AUS 4,900,710 A
[5] . Fils atomiques de grande longueur et de grande stabilité, procédé de fabrication de ces fils, application en nanoélectronique G. Dujardin, A. Mayne, F. Semond et P.[5]. Atomic wires of great length and great stability, process for manufacturing these wires, application in nanoelectronics G. Dujardin, A. Mayne, F. Semond and P.
Soukiassian Demande de brevet français N° 96 15435 du 16 décembre 1996 (voir aussi US 6 274 234 A)Soukiassian French patent application No. 96 15435 of December 16, 1996 (see also US 6,274,234 A)
[6] . Couche monoatomique de grande taille, en carbone de type diamant, et procédé de fabrication de cette couche[6]. Large-size monoatomic layer, made of diamond-type carbon, and method of manufacturing this layer
V. Derycke, G. Dujardin, A. Mayne et P. SoukiassianV. Derycke, G. Dujardin, A. Mayne and P. Soukiassian
Demande de brevet français N° 98 15218 du 2 décembre 1998 [7] L.J. hitman, J.A. Stroscio, R.A.French patent application No. 98 15218 of December 2, 1998 [7] L.J. hitman, J.A. Stroscio, R.A.
Dragoset and R.J. Celotta, Science 251, 1206 (1991)Dragoset and R.J. Celotta, Science 251, 1206 (1991)
[8] T.C. Shen, C. Wang, G.C. Abaln, J.R. Tacker, J.W. Lyding, Ph. Avouris and R.E. Walkup, Science 268, 1590 (1995) [9] M.F. Crommie, C.P. Lutz, D.M. Eigler and E.J. Heller, Surf. Rev. Lett . 2, 127 (1995)[8] T.C. Shen, C. Wang, G.C. Abaln, J.R. Tacker, J.W. Lyding, Ph. Avouris and R.E. Walkup, Science 268, 1590 (1995) [9] M.F. Crommie, C.P. Lutz, D.M. Eigler and E.J. Heller, Surf. Rev. Lett. 2, 127 (1995)
EXPOSÉ DE L'INVENTIONSTATEMENT OF THE INVENTION
La présente invention propose des nano- objets métalliques, tels que des fils atomiques, des nanostructures unidimensionnelles et des plots quantiques métalliques, qui sont susceptibles d'être très utiles dans les domaines de la nano-électronique et de 1 'opto-électronique. L'invention résout en outre le problème de la fabrication de tels nano-objets sur la surface d'un semiconducteur à grand gap, notamment le carbure de silicium.The present invention provides metallic nano-objects, such as atomic wires, one-dimensional nanostructures and metallic quantum dots, which are likely to be very useful in the fields of nano-electronics and opto-electronics. The invention also solves the problem of manufacturing such nano-objects on the surface of a large gap semiconductor, in particular silicon carbide.
Il s'agit d'une fabrication auto-organisée sur cette surface. Les substrats, candidats pour une telle organisation, sont les substrats pour lesquels la barrière de diffusion de. surface est anisotrope en fonction d'un paramètre tel que la température, une contrainte ("stress") mécaniqueIt is a self-organized production on this surface. The substrates, candidates for such an organization, are the substrates for which the diffusion barrier of. surface is anisotropic as a function of a parameter such as temperature, a mechanical stress
Les nano-objets sont fabriqués grâce au contrôle de l'équilibre très délicat entre les interactions adsorbat-adsorbat et adsorbat-substrat (l'adsorbat étant le métal) et au contrôle de la barrière de diffusion des atomes du métal.Nano-objects are produced by controlling the very delicate balance between the adsorbate-adsorbate and adsorbate-substrate interactions (the adsorbate being the metal) and by controlling the diffusion barrier of the atoms of the metal.
Dans un mode de réalisation particulièrement avantageux, l'invention permet d'obtenir des fils atomiques et des nano-structures d'un métal, en particulier l'argent, dont la direction est perpendiculaire à celle de lignes atomiques, ou fils atomiques, de silicium que l'on a préalablement formés sur la surface d'un substrat de carbure de silicium.In a particularly advantageous embodiment, the invention makes it possible to obtain atomic wires and nanostructures of a metal, in particular silver, the direction of which is perpendicular to that of atomic lines, or atomic wires, of silicon which has been previously formed on the surface of a silicon carbide substrate.
De façon précise, la présente invention concerne tout d'abord un ensemble de nano-objets, notamment de fils atomiques, de nano-structures unidimensionnelles et de plots quantiques, cet ensemble étant caractérisé en ce que les nano-objets sont faits d'un métal et formés sur la surface d'un substrat en un matériau semiconducteur monocristallin.Specifically, the present invention firstly relates to a set of nano-objects, in particular atomic wires, one-dimensional nano-structures and quantum dots, this set being characterized in that the nano-objects are made of a metal and formed on the surface of a substrate of a monocrystalline semiconductor material.
Ce matériau semiconducteur monocristallin peut être choisi parmi le carbure de silicium monocristallin, le diamant monocristallin, les semiconducteurs covalents monocristallins et les semiconducteurs composés monocristallins. Ce substrat peut être un substrat monocristallin -de carbure de silicium en phase cubique.This monocrystalline semiconductor material can be chosen from monocrystalline silicon carbide, monocrystalline diamond, monocrystalline covalent semiconductors and monocrystalline compound semiconductors. This substrate can be a monocrystalline substrate of silicon carbide in the cubic phase.
Selon un mode de réalisation particulier de l'ensemble, objet de l'invention/, la surface est une surface de carbure de silicium cubique, riche en silicium β-SiC(lOO) 3x2.According to a particular embodiment of the assembly, object of the invention /, the surface is a surface of cubic silicon carbide, rich in silicon β-SiC (100) 3x2.
Les nano-objets peuvent être des agrégats ("clusters") tridimensionnels du métal sur la surface.Nano-objects can be three-dimensional clusters of metal on the surface.
Selon un mode de réalisation avantageux de l'invention, les agrégats sont répartis de façon ordonnée sur la surface et forment ainsi un réseau de plots du métal .According to an advantageous embodiment of the invention, the aggregates are distributed in an ordered fashion over the surface and thus form a network of metal studs.
Selon un autre mode de réalisation particulier, la surface est une surface de carbure de silicium cubique, terminée Si β-SiC(100) c(4x2), et les nano-objets sont des fils atomiques parallèles ou des bandes unidimensionnelles nanométriques parallèles du métal .According to another particular embodiment, the surface is a surface of cubic silicon carbide, terminated Si β-SiC (100) c (4x2), and the nano-objects are parallel atomic wires or parallel nanometric one-dimensional bands of metal .
La surface peut comporter des fils atomiques parallèles de Si, les fils atomiques et les bandes unidimensionnelles du métal étant perpendiculaires à ces fils atomiques de Si.The surface may include parallel atomic wires of Si, the atomic wires and one-dimensional bands of the metal being perpendicular to these atomic wires of Si.
La surface peut comporter des zones passivées et des zones non passivées, les nano-objets étant formés sur ces zones non passivées de la surface.The surface may include passivated zones and non-passivated zones, the nano-objects being formed on these non-passivated zones of the surface.
La présente invention concerne aussi un procédé de fabrication d'un ensemble de nano-objets dans lequel on prépare une surface d'un substrat en un matériau semiconducteur monocristallin et l'on dépose un métal sur la surface ainsi préparée. Ce matériau .semiconducteur' monocristallin peut être choisi parmi le carbure de silicium monocristallin, le diamant monocristallin, les semiconducteurs covalents monocristallins et les semiconducteurs composés monocristallins.The present invention also relates to a method for manufacturing a set of nano-objects in which a surface of a substrate made of a monocrystalline semiconductor material is prepared and a metal is deposited on the surface thus prepared. This .semiconducteur monocrystalline material may be selected from the monocrystalline silicon carbide, monocrystalline diamond, covalent monocrystalline semiconductors and semiconductor monocrystalline compounds.
Ce substrat peut être un substrat monocristallin de carbure de silicium en phase cubique. Le dépôt du métal peut être réalisé à une température supérieure à la température ambiante . Selon un premier mode de mise en œuvre particulier du procédé objet de l'invention, on prépare une surface de carbure de silicium cubique, riche en silicium β-SiC(100) 3x2 et l'on dépose le métal sur la surface ainsi préparée. Selon un deuxième mode de mise en œuvre particulier, on prépare une surface de carbure de silicium terminée Si, β-SiC(100) c(4x2). On dépose à température ambiante le métal sur la surface ainsi préparée et l'on obtient, par migration de surface des atomes de métal le long de rangées de dimères Si-Si de la surface c(4x2), des fils atomiques du métal, qui sont parallèles aux rangées de dimères Si-Si ou fils de silicium.This substrate can be a monocrystalline substrate of silicon carbide in cubic phase. The metal can be deposited at a temperature above room temperature. According to a first particular embodiment of the process which is the subject of the invention, a surface of cubic silicon carbide, rich in β-SiC (100) 3 × 2 silicon, is prepared and the metal is deposited on the surface thus prepared. According to a second particular implementation mode, a finished silicon carbide surface Si, β-SiC (100) c (4x2) is prepared. The metal is deposited at room temperature on the surface thus prepared and atomic wires of the metal are obtained by surface migration of the metal atoms along rows of Si-Si dimers from the surface c (4x2). are parallel to the rows of Si-Si dimers or silicon wires.
Ensuite, on peut effectuer un recuit thermique du substrat à une température inférieure à la température de désorption totale du métal.Then, a thermal annealing of the substrate can be carried out at a temperature below the total desorption temperature of the metal.
On obtient ainsi des fils atomiques parallèles entre eux ou des bandes unidimensionnelles nanométriques, parallèles entre elles, du métal sur la surface. Alors, ces fils atomiques et ces bandes unidimensionnelles du métal, ainsi préparés à plus haute température, sont perpendiculaires aux fils atomiques de Si .One thus obtains atomic wires parallel to one another or one-dimensional nanometric bands, parallel to one another, of metal on the surface. So these atomic wires and these one-dimensional bands of metal, thus prepared for more high temperature, are perpendicular to the atomic wires of Si.
Le métal peut être déposé par évaporation sous vide ou dans une atmosphère inerte . On peut former des zones passivées sur la surface préparée et déposer ensuite le métal sur des zones non passivées de cette surface.The metal can be deposited by evaporation under vacuum or in an inert atmosphere. Passivated zones can be formed on the prepared surface and then the metal is deposited on non-passivated zones on this surface.
Dans la présente invention, le métal peut être choisi parmi les métaux dont la bande cl est pleine, les métaux de type jellium, les métaux alcalins (en particulier le sodium et le potassium) et les métaux de transition.In the present invention, the metal can be chosen from metals whose band is full, metals of the jellium type, alkali metals (in particular sodium and potassium) and transition metals.
Au lieu d'utiliser un recuit thermique, on peut utiliser un laser pour obtenir la désorption de métal soit par interaction thermique du faisceau émis par ce laser sur la surface couverte de métal, soit par désorption du métal, induite par des transitions électroniques (DIET) .Instead of using thermal annealing, a laser can be used to obtain the desorption of metal either by thermal interaction of the beam emitted by this laser on the surface covered with metal, or by desorption of the metal, induced by electronic transitions (DIET ).
Dans le procédé objet de l'invention, la surface peut être une surface terminée C de type sp, à savoir la surface β-SiC (100) c (2x2).In the process which is the subject of the invention, the surface can be a finished surface C of sp type, namely the β-SiC (100) c (2x2) surface.
Cette surface peut comprendre des lignes atomiques de C de type sp3.This surface can include atomic lines of C of sp3 type.
On peut alors former, conformément à l'invention, des fils atomiques du métal, qui sont soit parallèles, soit perpendiculaires aux lignes atomiques de C.It is then possible, in accordance with the invention, to form atomic wires of the metal, which are either parallel or perpendicular to the atomic lines of C.
Selon un mode de réalisation particulier de l'invention, on forme un réseau de plots du métal sur la surface du substrat en matériau semiconducteur monocristallin, on transforme localement le matériau du substrat situé sous les plots et l'on élimine le réseau de plots pour obtenir ainsi un super-réseau de plots faits du matériau transformé.According to a particular embodiment of the invention, a network of metal studs is formed on the surface of the substrate in monocrystalline semiconductor material, the material of the material is locally transformed substrate located under the pads and eliminating the network of pads to obtain a super-network of pads made of the transformed material.
De préférence la transformation locale du matériau du substrat est choisie parmi une oxydation, une nitruration et une oxynitruration pour obtenir un super-réseau de plots faits de l'oxyde, du niture ou de l'oxynitrure du matériau.Preferably, the local transformation of the material of the substrate is chosen from oxidation, nitriding and oxynitriding in order to obtain a super-network of studs made of the oxide, niture or oxynitride of the material.
BRÈVE DESCRIPTION DES DESSINSBRIEF DESCRIPTION OF THE DRAWINGS
La présente invention sera mieux comprise à la lecture de la description d'exemples de réalisation donnés ci-après, à titre purement indicatif et nullement limitatif, en faisant référence aux dessins annexés, sur lesquels : la figure 1 est une vue schématique d'agrégats tridimensionnels métalliques, obtenus conformément à l'invention, la figure 2 est une vue de dessus schématique de fils atomiques métalliques, obtenus conformément à l'invention et parallèles à des lignes atomiques de Si, la figure 3 est une vue de dessus schématique de fils atomiques métalliques et de bandes unidimensionnelles métalliques, obtenus conformément à l'invention et perpendiculaires à des lignes atomiques de Si, la figure 4 est une vue de dessus schématique de tels fils atomiques et bandes unidimensionnelles, obtenus conformément à l'invention, sur des zones non passivées d'une surface de carbure de silicium,The present invention will be better understood on reading the description of embodiments given below, by way of purely indicative and in no way limiting, with reference to the appended drawings, in which: FIG. 1 is a schematic view of aggregates three-dimensional metal, obtained in accordance with the invention, FIG. 2 is a schematic top view of metallic atomic wires, obtained in accordance with the invention and parallel to atomic lines of Si, FIG. 3 is a schematic top view of wires metallic atoms and metallic one-dimensional bands, obtained in accordance with the invention and perpendicular to atomic lines of Si, FIG. 4 is a schematic top view of such atomic wires and one-dimensional bands, obtained in accordance with the invention, on non-passivated areas of a silicon carbide surface,
- la figure 5 est une vue schématique d'un réseau d'agrégats de sodium obtenus conformément à l'invention sur un substrat de SiC, la figure 6 est une vue en coupe schématique de ce substrat, portant un super-réseau de plots de silice obtenus par un procédé conforme à 1 ' invention, et - la figure 7 représente des photographies de LEED d'une surface propre β-SiC (100) 3x2 (A), de la même surface recouverte par des agrégats de Na et organisée en réseau 3x1 (B) et de la même surface recouverte • par des agrégats de Na et organisée en réseau 3x2 (C) .- Figure 5 is a schematic view of a network of sodium aggregates obtained in accordance with the invention on an SiC substrate, Figure 6 is a schematic sectional view of this substrate, carrying a super-network of studs silica obtained by a process in accordance with the invention, and - Figure 7 represents photographs of LEED of a clean surface β-SiC (100) 3x2 (A), of the same surface covered by aggregates of Na and organized in 3x1 network (B) and the same surface covered by • Na aggregates and organized into a 3x2 network (C).
EXPOSE DÉTAILLÉ DE MODES DE RÉALISATION PARTICULIERSDETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS
On donne maintenant un premier exemple du procédé objet de l'invention, permettant de fabriquer des agrégats d'argent.We now give a first example of the process which is the subject of the invention, making it possible to manufacture silver aggregates.
On commence par préparer une surface de carbure de silicium cubique, riche en silicium β-SiC(100) 3x2, c'est-à-dire une surface plane de carbure de silicium SiC en phase cubique β-SiC(100) riche en silicium et ayant la reconstruction de surface 3x2.We start by preparing a cubic silicon carbide surface, rich in silicon β-SiC (100) 3 × 2, that is to say a planar surface of silicon carbide SiC in cubic phase β-SiC (100) rich in silicon. and having 3x2 surface reconstruction.
Une telle préparation est expliquée dans divers documents mentionnés plus haut, en particulier le document [5] auquel on se reportera. Sur cette surface riche eh Si et ayant une structure 3x2 , on dépose de 1 ' argent en faible quantité par evaporation sous vide, à partir, par exemple, d'une source d'argent disposée face à la surface et chauffée par un filament de tungstène.Such preparation is explained in various documents mentioned above, in particular document [5] to which reference will be made. On this surface rich in Si and having a 3 × 2 structure, silver is deposited in small quantity by evaporation under vacuum, for example from a source of silver placed facing the surface and heated by a filament of tungsten.
En formant une image de la surface par STM ou microscopie à effet tunnel ("scanning tunneling microscopy"), on constate que l'argent ne mouille pas la surface et forme des agrégats tridimensionnels dont les tailles vont de 0,9nm à 3nm et sont donc susceptibles de constituer des plots quantiques ( "quantum dots" ) .By forming an image of the surface by STM or scanning tunneling microscopy, we see that the silver does not wet the surface and forms three-dimensional aggregates whose sizes range from 0.9nm to 3nm and are therefore likely to constitute quantum dots ("quantum dots").
Le nombre, la taille et l'espacement de ces agrégats ou îlots peuvent varier en fonction de la quantité d'argent déposé et des températures de recuit. Ce mode de croissance indique une interaction dominante entre atomes d'argent.The number, size and spacing of these aggregates or islands can vary depending on the amount of silver deposited and the annealing temperatures. This mode of growth indicates a dominant interaction between silver atoms.
La figure 1 est une vue de dessus schématique de la surface 2 sur laquelle sont formés les agrégats 4.FIG. 1 is a schematic top view of the surface 2 on which the aggregates 4 are formed.
A titre purement indicatif et nullement limitatif, le dépôt d'argent a lieu dans une enceinte où la pression est inférieure à 2xlO~8Pa et vaut par exemple 6xlO"9Pa; la distance entre la surface et la source d'argent vaut environ 15cm; le courant traversant la source d'argent pendant le dépôt vaut 4A; le temps de dépôt est compris entre 2 minutes et 8 minutes (8 minutes correspondant à environ une monocouche d'argent ) ; le dépôt a lieu en laissant l'échantillon de SiC à température ambiante .(environ 20°C) . Les recuits nécessaires sont faits à environ 500°C. En faisant varier la température de recuit, on peut jouer sur la vitesse de migration des atomes de métal (la vitesse de migration augmente avec la température) et sur la quantité de métal désorbé (qui augmente avec la température) et donc jouer sur la taille des agrégats et sur leur espacement.As a purely indicative and in no way limitative, the deposit of silver takes place in an enclosure where the pressure is less than 2 × 10 -8 Pa and is for example 6 × 10 -9 Pa; the distance between the surface and the source of silver is approximately 15cm; the current passing through the silver source during the deposit is worth 4A; the deposit time is between 2 minutes and 8 minutes (8 minutes corresponding to approximately a silver monolayer); the deposit takes place leaving the sample of SiC at room temperature (approximately 20 ° C). The necessary annealing is carried out at approximately 500 ° C. By varying the annealing temperature, we can play on the speed of migration of the metal atoms (the speed of migration increases with temperature) and on the quantity of desorbed metal (which increases with temperature) and therefore play on the size aggregates and their spacing.
Il convient de noter que l'argent s'évapore complètement grâce à un court recuit à environ 700°C, pendant quelques dizaines de secondes. On donne maintenant un deuxième exemple du procédé objet de l'invention, permettant de fabriquer des bandes unidimensionnelles d'argent ou des fils d ' argent .It should be noted that the silver evaporates completely thanks to a short annealing at around 700 ° C, for a few tens of seconds. A second example of the process which is the subject of the invention is now given, making it possible to manufacture one-dimensional strips of silver or silver threads.
On commence par préparer une surface de carbure de silicium cubique, terminée Si β-SiC(lOO) c(4x2), c'est-à-dire une surface de SiC en phase cubique β-SiC(100), cette surface étant terminée Si et reconstruite c(4x2).We start by preparing a surface of cubic silicon carbide, finished Si β-SiC (100) c (4x2), that is to say a surface of SiC in cubic phase β-SiC (100), this surface being finished If and reconstructed c (4x2).
En outre, sur cette surface reposent des lignes atomiques de silicium auto-organisées qui sont parallèles, ces lignes formant des rangées de dimères Si-Si.Furthermore, on this surface lie self-organizing atomic lines of silicon which are parallel, these lines forming rows of Si-Si dimers.
On se référera au document [5] où l'on explique comment obtenir des chaînes rectilignes de dimères Si-Si (lignes atomiques) à la surface d'un substrat monocristallin de SiC en phase cubique β-SiC(lOO) que l'on a transformé pour que sa surface soit terminée 3x2 puis que 1 ' on a convenablement recuit . Alors, par des recuits thermiques à 1100°C, on transforme cette surface de symétrie 3x2 jusqu'à ce qu'elle présente une organisation à l'échelle atomique (reconstruction) de symétrie c(4x2).We will refer to document [5] where we explain how to obtain rectilinear chains of Si-Si dimers (atomic lines) on the surface of a monocrystalline SiC substrate in cubic phase β-SiC (100) that we has transformed so that its surface is finished 3x2 then that one has suitably annealed. So, by thermal annealing at 1100 ° C, we transform this surface of symmetry 3x2 until that it presents an organization on the atomic scale (reconstruction) of symmetry c (4x2).
Sur la surface Si β-SiC(lOO) c(4x2) ainsi obtenue, on dépose de l'argent dans les mêmes conditions que dans le premier exemple.On the Si β-SiC (100) c (4x2) surface thus obtained, silver is deposited under the same conditions as in the first example.
On constate que, à là température ambiante, les atomes d'argent diffusent lentement sur la surface, le long des rangées de dimères, en donnant des fils atomiques du métal, parallèles à ces rangées. La figure 2 est une vue de dessus schématique de la surface 6 portant les rangées parallèles 8 de dimères Si-Si et les fils atomiques du métal 9, qui sont parallèles à ces rangées.We note that, at room temperature, the silver atoms diffuse slowly on the surface, along the rows of dimers, giving atomic wires of the metal, parallel to these rows. FIG. 2 is a schematic top view of the surface 6 carrying the parallel rows 8 of Si-Si dimers and the atomic wires of metal 9, which are parallel to these rows.
Quand la surface est couverte d'argent, on procède à un recuit en dessous de la température de désorption totale de l'argent (700°C) .When the surface is covered with silver, annealing is carried out below the total silver desorption temperature (700 ° C).
La couche d'argent est désorbée de façon sélective et les atomes restant sur la surface s'organisent pour faire des bandes unidimensionnelles parallèles d'argent, de taille nanometrique, ou des fils atomiques parallèles d'argent. La direction de ces fils atomiques et de ces bandes unidimensionnelles est perpendiculaire aux rangées de dimères .The silver layer is selectively desorbed and the atoms remaining on the surface organize themselves to make parallel one-dimensional bands of silver, nanometric in size, or parallel atomic wires of silver. The direction of these atomic wires and of these one-dimensional bands is perpendicular to the rows of dimers.
La figure 3 est une vue de dessus schématique de la surface 6 portant les rangées parallèles 8 de dimères Si-Si et les fils atomiques d'argent 10 ainsi que les bandes unidimensionnelles nanométriques d'argent 12.FIG. 3 is a schematic top view of the surface 6 carrying the parallel rows 8 of Si-Si dimers and the atomic silver wires 10 as well as the one-dimensional nanometric silver bands 12.
A titre purement indicatif et nullement limitatif, dans ce deuxième exemple le dépôt d'argent a lieu dans une enceinte où la pression vaut 2,lxl0"9Pa; l'argent est déposé pendant 8 minutes au moyen d'une source d'argent traversée par courant de 4A; pendant le dépôt d'argent, l'échantillon est laissé à la température ambiante; après le dépôt, le recuit de l'échantillon a lieu en faisant traverser ce dernier par un courant de 0,5A pendant 5 minutes.As a purely indicative and in no way limitative, in this second example, the deposit of silver takes place in an enclosure where the pressure is equal to 2.1 × 10 −9 Pa; the silver is deposited for 8 minutes by means of a silver source traversed by a current of 4A; during silver deposition, the sample is left at room temperature; after deposition, the annealing of the sample takes place by passing it through a current of 0.5A for 5 minutes.
En conséquence, on peut construire des fils d'argent perpendiculairement aux fils atomiques de Si (voir le document [5] ) . Ceci est extrêmement important pour construire des réseaux artificiels à l'échelle sous nano-métrique, qui peuvent être très utiles en nano- électronique .Consequently, silver wires can be constructed perpendicular to the Si atomic wires (see document [5]). This is extremely important for building artificial nanoscale networks, which can be very useful in nanoelectronics.
On peut remplacer l'argent par d'autres métaux à bande d pleine, tels que l'or ou le cuivre, ou par des métaux de type jellium, tels que l'aluminium.Silver can be replaced by other metals with a solid band, such as gold or copper, or by metals of the jellium type, such as aluminum.
On rappelle qu'un métal de type jellium est un métal dont le gaz d'électrons est sensiblement homogène et dont les charges ioniques positives sont sensiblement "étalées" ("smeared") dans la totalité du volume du métal pour donner un fond ("background") positif et uniforme.Recall that a jellium-type metal is a metal whose electron gas is substantially homogeneous and whose positive ionic charges are substantially "spread" ("smeared") throughout the volume of the metal to give a background (" background ") positive and consistent.
On peut aussi remplacer l'argent par des métaux de transition tel que Mo, , Ta, Nb, Co, Fe, Mn, Cr, Ti par exemple.Silver can also be replaced by transition metals such as Mo,, Ta, Nb, Co, Fe, Mn, Cr, Ti for example.
Avec les métaux ayant des caractéristiques magnétiques, l'invention permet de doper ou de fabriquer des nanostructures ayant, par exemple, des propriétés magnétiques intéressantes en électronique de spin. On peut aussi remplacer l'argent par d'autres métaux tels que les métaux alcalins, qui sont des catalyseurs remarquables pour les réactions de surface avec des molécules organiques ou inorganiques (voir les documents [1] et [2] ) .With metals having magnetic characteristics, the invention makes it possible to dope or to manufacture nanostructures having, for example, advantageous magnetic properties in spin electronics. Silver can also be replaced by other metals such as alkali metals, which are remarkable catalysts for surface reactions with organic or inorganic molecules (see documents [1] and [2]).
On peut donc provoquer des réactions à l'échelle atomique et . favoriser une passivation très localisée, par exemple par oxydation, nitruration ou oxynitruration, ou une fabrication de silicônes aux échelles atomiques ou moléculaires.We can therefore provoke reactions on an atomic scale and. favor a very localized passivation, for example by oxidation, nitriding or oxynitriding, or a manufacture of silicones at atomic or molecular scales.
Les métaux alcalins ont aussi la propriété remarquable d'abaisser considérablement le travail de sortie des électrons, et d'atteindre le régime d' électro-affinité négative, c'est-à-dire de constituer des émetteurs naturels d'électrons. La présente invention permet à cette émission de se faire à partir de nanostructures de métaux alcalins (Cs, Rb, K ou Na par exemple) .The alkali metals also have the remarkable property of considerably lowering the work of output of the electrons, and of reaching the regime of negative electro-affinity, that is to say of constituting natural emitters of electrons. The present invention allows this emission to be made from nanostructures of alkali metals (Cs, Rb, K or Na for example).
Au lieu d'utiliser une evaporation sous vide pour déposer le métal, on peut faire cette evaporation à plus haute pression, dans une atmosphère inerte (gaz rare, etc ) .Instead of using vacuum evaporation to deposit the metal, this evaporation can be carried out at higher pressure, in an inert atmosphere (rare gas, etc.).
En ce qui concerne le deuxième exemple, on précise que le procédé objet de l'invention permet de contrôler sélectivement la migration ou la désorption des atomes du métal (par exemple l'argent) en agissant sur la température. Une variation de cette dernière agit sur le mouvement des dimères Si-Si sur SiC ou provoque ce mouvement . Dans une variante de ce deuxième exemple, on prépare la surface de SiC cubique, terminée Si β-SiC(lOO) c(4x2) et sans les lignes atomiques de silicium, on dépose le métal et l'on fait le recuit en dessous de la température de désorption totale du métal . On obtient ainsi, comme précédemment, des fils atomiques du métal et/ou des bandes unidimensionnelles nanométriques de ce métal. Ces fils atomiques et ces bandes unidimensionnelles sont parallèles les uns aux autres et sont perpendiculaires à la direction selon laquelle on formerait les rangées parallèles de dimères Si-Si.As regards the second example, it is specified that the process which is the subject of the invention makes it possible to selectively control the migration or the desorption of the atoms of the metal (for example silver) by acting on the temperature. A variation of the latter acts on the movement of the Si-Si dimers on SiC or causes this movement. In a variant of this second example, the surface of cubic SiC is prepared, finished Si β-SiC (100) c (4x2) and without the atomic lines of silicon, the metal is deposited and annealed below the total desorption temperature of the metal. Thus, as before, atomic wires of the metal and / or nanometric one-dimensional bands of this metal are obtained. These atomic wires and these one-dimensional bands are parallel to each other and are perpendicular to the direction in which the parallel rows of Si-Si dimers would be formed.
Dans un autre exemple de 1 ' invention, on passive localement une surface préparée d'un échantillon de SiC cubique au moyen d'hydrogène .et l'on forme les fils atomiques et/ou les bandes unidimensionnelles du métal dans les zones non passivées.In another example of the invention, a prepared surface of a cubic SiC sample is locally passivated with hydrogen and the atomic wires and / or one-dimensional bands of the metal are formed in the non-passivated areas.
La figure 4 est une vue de dessus schématique de la surface 14 passivée localement et comportant ainsi des zones passivées, telle que la zone 15, et des zones non passivées 16 et 18. Les lignes atomiques parallèles de silicium, qui sont présentes dans ces zones 16 et 18, ont la référence 20. On voit aussi les fils atomiques 22 de métal et les bandes unidimensionnelles 24 de ce métal, qui sont formés dans ces zones, perpendiculairement aux lignes 20.Figure 4 is a schematic top view of the surface 14 passively passivated and thus comprising passivated zones, such as zone 15, and non-passivated zones 16 and 18. The parallel atomic lines of silicon, which are present in these zones 16 and 18, have the reference 20. We also see the atomic wires 22 of metal and the one-dimensional bands 24 of this metal, which are formed in these zones, perpendicular to the lines 20.
Pour passiver localement la surface, on recouvre les zones que l'on ne veut pas passiver d'une couche de résine photosensible ( "photoresist layer") et l'on élimine cette dernière après passivation des zones non recouvertes . Connaissant a priori la direction des rangées de dimères Si-Si, il est possible de former des zones rectangulaires non passivées dont l'un des côtés est parallèle à cette direction. Pour passiver la surface du SiC cubique en utilisant de l'hydrogène, cette surface est préparée afin de présenter, à l'échelle atomique, une organisation contrôlée de symétrie c(4x2). Cette surface est ensuite exposée à de l'hydrogène moléculaire jusqu'à saturation. Lors de l'exposition à l'hydrogène moléculaire, le SiC est maintenu à température ambiante.To locally passivate the surface, the areas that are not to be passivated are covered with a photoresist layer and the latter is eliminated after passivation of the non-covered areas. Knowing a priori the direction of the rows of Si-Si dimers, it is possible to form rectangular non-passivated zones of which one of the sides is parallel to this direction. To passivate the surface of cubic SiC using hydrogen, this surface is prepared in order to present, on an atomic scale, a controlled organization of c symmetry (4x2). This surface is then exposed to molecular hydrogen until saturation. Upon exposure to molecular hydrogen, the SiC is kept at room temperature.
A titre d'exemple, le SiC cubique est placé dans une enceinte de traitement, dans laquelle règne une pression inférieure à 5xl0"10 hPa, et chauffé par passage d'un courant électrique directement dans ce substrat de SiC. Ce dernier est chauffé pendant plusieurs heures à 650°C puis porté plusieurs fois à 1100°C pendant une minute. A l'aide d'une source de silicium chauffée à 1300°C, on dépose plusieurs monocouches de silicium sur la surface (100) du SiC cubique.By way of example, the cubic SiC is placed in a treatment enclosure, in which a pressure of less than 5 × 10 -10 hPa prevails, and heated by passing an electric current directly through this SiC substrate. The latter is heated for several hours at 650 ° C. and then brought several times to 1100 ° C. for one minute Using a source of silicon heated to 1300 ° C., several monolayers of silicon are deposited on the surface (100) of the cubic SiC.
A l'aide de recuits thermiques à 1000°C, on évapore, de façon contrôlée, une partie du silicium déposé jusqu'à ce que la surface présente une organisation à l'échelle atomique (reconstruction) de symétrie 3x2. Cette symétrie de la surface peut être contrôlée par diffraction d'électrons.Using thermal annealing at 1000 ° C., part of the deposited silicon is evaporated in a controlled manner until the surface has an organization on the atomic scale (reconstruction) of 3 × 2 symmetry. This symmetry of the surface can be controlled by electron diffraction.
Au moyen de recuits thermiques à 1100°C, on transforme la surface de symétrie 3x2 jusqu'à ce qu'elle présente une organisation à l'échelle atomique (reconstruction) de symétrie c(4x2).By means of thermal annealing at 1100 ° C, the surface of symmetry 3x2 is transformed until that it presents an organization on the atomic scale (reconstruction) of symmetry c (4x2).
On expose ensuite cette surface à l'hydrogène moléculaire ultra pur à basse pression (10"8 hPa) .This surface is then exposed to ultra pure molecular hydrogen at low pressure (10 "8 hPa).
Au cours de cette exposition, la surface est maintenue à température ambiante .During this exposure, the surface is maintained at room temperature.
La surface de SiC est exposée jusqu'à saturation (supérieure à 50L) . Cette saturation peut être contrôlée par un microscope à effet tunnel ou par une technique de photoémission de bande de valence.The SiC surface is exposed until saturation (greater than 50L). This saturation can be monitored by a tunneling microscope or by a valence band photoemission technique.
Au lieu d'utiliser une surface terminée Si, l'ensemble des procédés précédemment décrits peuvent être également mis en œuvre sur une surface terminée C de type sp, la surface β-SiC(100) c (2x2) , qui peut elle- même comprendre des lignes atomiques de C de type sp3 (voir le document [6] ) .Instead of using a finished surface Si, all of the methods described above can also be implemented on a finished surface C of sp type, the surface β-SiC (100) c (2x2), which can itself understand atomic lines of C of type sp3 (see document [6]).
On peut ainsi former, conformément à l'invention, des fils atomiques de métal, qui sont soit parallèles soit perpendiculaires aux lignes atomiques de carbone .It is thus possible, in accordance with the invention, to form atomic wires of metal, which are either parallel or perpendicular to the atomic lines of carbon.
On considère dans ce qui suit d'autres exemples de la présente invention, à savoir : - l'obtention d'agrégats de sodium sur la surface d'un substrat semiconducteur, notamment un substrat monocristallin de carbure de silicium en phase cubique, plus particulièrement, l'obtention de tels agrégats, répartis de façon ordonnée à la surface de ce substrat et formant ainsi un super-réseau (« super-lattice ») de plots de sodium, du genre de l'ensemble des agrégats de la figure 1 où la répartition des agrégats est sensiblement régulière, et l'obtention d'un super-réseau (« super- lattice ») de plots de silice sur le substratIn the following, we consider other examples of the present invention, namely: - obtaining sodium aggregates on the surface of a semiconductor substrate, in particular a monocrystalline substrate of silicon carbide in cubic phase, more particularly , obtaining such aggregates, distributed in an orderly fashion on the surface of this substrate and thus forming a superlattice (“Super-lattice”) of sodium studs, of the kind of all of the aggregates in FIG. 1 where the distribution of the aggregates is substantially regular, and obtaining a super-network (“super-lattice”) silica pads on the substrate
(rappelons que l'on a déjà, donné plus haut des exemples de l'invention, relatifs à la passivation localisée à l'aide de métaux alcalins) .(remember that examples of the invention have already been given above, relating to localized passivation using alkali metals).
On a étudié le dépôt de sodium sur le β- SiC (100) 3x2, qui est la surface riche en Si du carbure de silicium cubique. Contrairement au cas de la surface terminée Si β-SiC(100) c(4x2), sur laquelle l'adsorption de Na et d'autres métaux alcalins se fait sous la forme d'un film métallique, ayant une épaisseur approximativement égale à la taille d'un atome, l'adsorption de Na se fait ici sous la forme d'agrégats métalliques de forme sphérique, ce qui est sans précédent pour un métal alcalin sur la surface d'un semiconducteur. En effet, cela ne se produit pas sur les surfaces correspondantes de silicium ou de semiconducteurs composés III-V classiques (ne comprenant donc pas les nitrures III-V) . Cela indique que, sur cette surface riche en Si, l'interaction adsorbat-adsorbat est plus importante que l'interaction adsorbat-substrat. Ce comportement est à rapprocher du comportement de l'argent sur la même surface (voir plus haut) .We studied the sodium deposition on β-SiC (100) 3x2, which is the Si-rich surface of cubic silicon carbide. Unlike the case of the finished surface Si β-SiC (100) c (4x2), on which the adsorption of Na and other alkali metals takes place in the form of a metallic film, having a thickness approximately equal to the size of an atom, the adsorption of Na takes place here in the form of metallic aggregates of spherical shape, which is unprecedented for an alkali metal on the surface of a semiconductor. Indeed, this does not occur on the corresponding surfaces of silicon or conventional III-V compound semiconductors (therefore not comprising III-V nitrides). This indicates that, on this Si-rich surface, the adsorbate-adsorbate interaction is more important than the adsorbate-substrate interaction. This behavior should be compared to the behavior of money on the same surface (see above).
Les agrégats de Na sont identifiés grâce à un plasmon à 3,1 eV qui correspond exactement à l'énergie d'agrégats sphériques de Na. Des résultats suggèrent aussi que les agrégats de sodium sont régulièrement espacés et que leur taille tend à diminuer quand leur taux de couverture augmente . En effet, pour les dépôts les plus importants (de l'ordre de la monocouche atomique jusqu'à plusieurs monocouches - atomiques) et après des recuits progressifs jusqu'à 350°C, le diagramme de diffraction d'électrons lents devient très contrasté, montrant ainsi que les agrégats de Na sont bien organisés et régulièrement espacés sur la surface β-SiC(lOO) 3x2. On a d'ailleurs fait des clichés des agrégats de sodium sur le β-SiC(lOO) 3x2 par LEED, c'est-à-dire par diffraction d'électrons de faible énergie (« low energy électron diffraction ») . Ces clichés montrent que ces agrégats de Na sont bien ordonnés et régulièrement espacés, avec des ordres différents et donc des espacements différents en fonction du taux de couverture de la surface. On se reportera aux clichés de la figure 7.The Na aggregates are identified using a 3.1 eV plasmon which exactly corresponds to the energy of spherical Na aggregates. Results also suggest that sodium aggregates are regularly spaced and their size tends to decrease when their coverage rate increases. Indeed, for the largest deposits (of the order of the atomic monolayer up to several monolayers - atomic) and after gradual annealing up to 350 ° C, the diffraction pattern of slow electrons becomes very contrasted, thus showing that the Na aggregates are well organized and regularly spaced on the β-SiC (100) 3 × 2 surface. We also took pictures of sodium aggregates on β-SiC (100) 3x2 by LEED, that is to say by low energy electron diffraction ("low energy electron diffraction"). These pictures show that these Na aggregates are well ordered and regularly spaced, with different orders and therefore different spacings depending on the coverage rate of the surface. We will refer to the pictures in Figure 7.
On forme ainsi des plots quantiques de Na auto-organisés en jouant sur l'équilibre entre interactions adsorbat-adsorbat et adsorbat-substrat, par contrôle de la température et de la quantité de métal déposé. Ce résultat est très important et les plots obtenus diffèrent de façon très significative d'autres plots quantiques de par les propriétés intrinsèques des métaux alcalins tels que le sodium.Self-organized quantum Na dots are thus formed by varying the balance between adsorbate-adsorbate and adsorbate-substrate interactions, by controlling the temperature and the quantity of metal deposited. This result is very important and the plots obtained differ very significantly from other quantum plots by the intrinsic properties of alkali metals such as sodium.
D'une part, ces plots sont fabriqués sur la surface d'un semiconducteur, ce qui est sans précédent, et qui plus est, il s'agit d'un semiconducteur à grand gap. D'autre part, les métaux alcalins tels que le Na ont une très faible électroaffinité. Ils abaissent considérablement, de plusieurs électron- volts, le travail de sortie (« work function ») de la surface et l'on peut arriver à un régime d' electroaffinité négative (avec la surface seule ou exposée à de l'oxygène), c'est-à-dire à un émetteur naturel d'électrons, ou à un émetteur de photoélectrons quand le système est exposé à la lumière. Un phénomène comparable est utilisé pour la fabrication d'amplificateurs de lumière dans les dispositifs de vision nocturne à partir de surfaces d'arseniure de gallium recouvertes de Cs et d'oxygène.On the one hand, these pads are produced on the surface of a semiconductor, which is unprecedented, and what is more, it is a large gap semiconductor. On the other hand, alkali metals such as Na have a very low electroaffinity. They considerably lower, by several electronvolts, the work function ("work function") of the surface and one can arrive at a negative electroaffinity regime (with the surface alone or exposed to oxygen), c i.e. a natural electron emitter, or a photoelectron emitter when the system is exposed to light. A comparable phenomenon is used for the manufacture of light amplifiers in night vision devices from gallium arsenide surfaces coated with Cs and oxygen.
L'importance du résultat mentionné plus haut (obtention du réseau de plots quantiques de Na) provient du fait que l'on dispose d'un réseau de plots (agrégats) 26 de Na (voir figure 5) , de taille nanometrique ou sub-nanometrique, qui sont régulièrement répartis sur la surface d'un substrat 28 fait d'un matériau semiconducteur à grand gap et laissent entre eux la surface nue du SiC. Ces plots sont donc capables d'émettre des électrons sous l'effet d'une tension de polarisation ou sous l'influence de la lumière. Cela permet de former des matrices actives pour la fabrication d' écrans plats. Une autre caractéristique importante des métaux alcalins, en particulier le sodium, réside dans leurs propriétés exceptionnelles en tant que catalyseurs d'oxydation, de nitruration, d' oxynitruration, et de réaction avec des molécules organiques. Ces propriétés ont été mises en évidence lors de travaux sur le silicium, sur les semiconducteurs III-V, sur des métaux tels que l'aluminium et sur le SiC. On se reportera aux documents [10] à [23] , qui sont mentionnés à la fin de la présente description, et aux documents [3] et [4] qui sont mentionnés plus haut.The importance of the result mentioned above (obtaining the network of quantum plots of Na) comes from the fact that there is a network of plots (aggregates) 26 of Na (see FIG. 5), of nanometric or sub-size. nanometric, which are regularly distributed over the surface of a substrate 28 made of a large-gap semiconductor material and leave between them the bare surface of SiC. These pads are therefore capable of emitting electrons under the effect of a bias voltage or under the influence of light. This makes it possible to form active matrices for the manufacture of flat screens. Another important characteristic of alkali metals, in particular sodium, is their exceptional properties as catalysts for oxidation, nitriding, oxynitriding, and reacting with organic molecules. These properties have been demonstrated during work on silicon, on III-V semiconductors, on metals such as aluminum and on SiC. Reference will be made to documents [10] to [23], which are mentioned at the end of this description, and to documents [3] and [4] which are mentioned above.
Cela ouvre un nouveau champ d'applications, qui est très vaste et que l'on pourrait appeler « nano- lithographie » ou « nano- fabrication ». En effet, grâce à ces plots de Na, on peut, par exposition à l'oxygène (respectivement à l'azote), faire une oxydation (respectivement une nitruration) localisée de la partie du substrat 28 de SiC (voir figure 6) , qui est située en dessous de chaque agrégat de Na, puis éliminer chacun de ces agrégats 26 par désorption thermique à basse température (environ 650°C) . On obtient ainsi un super-réseau de plots 30 de Si02 (respectivement de Si3N4) à l'échelle nanometrique. De même, on peut procéder à une oxynitruration localisée de cette partie du substrat de SiC, en exposant la surface couverte d'agrégats de Na à NO ou N20 (expositions à de faibles quantités, typiquement de l'ordre de quelques langmuirs) , puis éliminer les agrégats par désorption thermique en se plaçant à la température de désorption du Na sur le substrat considéré.This opens up a new field of applications, which is very vast and which one could call "nanolithography" or "nanomaking". Indeed, thanks to these Na pads, it is possible, by exposure to oxygen (respectively to nitrogen), to make a localized oxidation (respectively a nitriding) of the part of the substrate 28 of SiC (see FIG. 6), which is located below each aggregate of Na, then eliminate each of these aggregates 26 by thermal desorption at low temperature (approximately 650 ° C.). A superlattice of pads 30 of Si0 2 (respectively of Si 3 N 4 ) is thus obtained on the nanometric scale. Likewise, one can carry out a localized oxynitriding of this part of the SiC substrate, by exposing the surface covered with aggregates of Na to NO or N 2 0 (exposures to small quantities, typically of the order of a few langmuirs) , then remove the aggregates by thermal desorption by placing it at the Na desorption temperature on the substrate considered.
De la même façon, avec des molécules organiques, par exemple des molécules de CH3C1, on peut fabriquer des plots nanométriques de silicone et, avec d'autres molécules, on peut fabriquer d'autres plots tels que des plots de polymères et des plots d'organométalliques : il suffit d'exposer la surface aux molécules pour obtenir, sous chacun des plots de sodium, les plots de silicone ou de polymères ou d'organométalliques, puis d'éliminer les plots de sodium.In the same way, with organic molecules, for example molecules of CH 3 C1, one can make nanometric studs of silicone and, with other molecules, one can make other studs such as polymer pads and organometallic pads: it suffices to expose the surface to the molecules to obtain, under each of the sodium pads, the silicone or polymer or organometallic pads, then to eliminate the pads sodium.
Les plots de polymères (respectivement d'organométalliques), dont il est question ci-dessus, peuvent aussi servir de points d'ancrage, sur la surface où ils sont formés, pour les molécules ayant permis de former ces plots.The polymer (respectively organometallic) studs, which are discussed above, can also serve as anchoring points, on the surface where they are formed, for the molecules which have made it possible to form these studs.
Enfin, on peut aussi contrôler/optimiser l'interaction Na-Na en exposant la surface pourvue des plots de Na à de faibles quantités (environ de l'ordre du langmuir) de molécules inorganiques ou organiques (par exemple l'hydrogène, l'oxygène, ou toute autre molécule ou élément connu par l'homme du métier comme étant capable d' interagir avec le Na ou les métaux alcalins) . Ceci conduira à la formation d'agrégats de Na de taille plus importante.Finally, one can also control / optimize the Na-Na interaction by exposing the surface provided with the Na pads to small quantities (approximately of the order of langmuir) of inorganic or organic molecules (for example hydrogen, oxygen, or any other molecule or element known to those skilled in the art as being capable of interacting with Na or alkali metals). This will lead to the formation of larger Na aggregates.
On explique dans ce qui suit comment obtenir les plots quantiques de sodium.We explain in the following how to obtain the sodium quantum dots.
Pour ce qui concerne la préparation d'un échantillon ayant une surface de β-SiC(100) 3x2, on se référera notamment au document [5] .With regard to the preparation of a sample having a surface of β-SiC (100) 3 × 2, reference will be made in particular to document [5].
Un échantillon ainsi préparé est alors placé dans une enceinte à vide. Dans cette dernière, on établit une pression d'environ 10"9 Pa. On dépose ensuite du sodium sur l'échantillon grâce à une source à zéolithe, du genre de celles qui sont commercialisées par la Société SAES Getters, après avoir parfaitement dégazé cette source, de façon que l'augmentation de pression dans l'enceinte pendant le dépôt ne dépasse pas 3xl0~9 Pa. On obtient ainsi des agrégats de sodium sur la surface. Le dépôt a lieu à température ambianteA sample thus prepared is then placed in a vacuum chamber. In the latter, a pressure of approximately 10 −9 Pa is established. Sodium is then deposited on the sample using a zeolite source, of the type which are sold by the SAES Getters company, after having perfectly degassed this source, so that the pressure increase in the enclosure during the deposition does not exceed 3 × 10 ~ 9 Pa. This gives sodium aggregates on the surface. The deposit takes place at room temperature
(environ 25°C) et la source de Na est placée à moins de 10 cm de l'échantillon, de préférence à une distance de 3 cm à 5 cm environ de cet échantillon, la distance optimale étant d'environ 3 cm. On procède ensuite à des recuits (à des températures de quelques centaines de degrés, par exemple 350°C, pendant une durée de quelques secondes à quelques minutes) de la surface de β-SiC(100) 3x2 recouverte des agrégats de sodium. Ces recuits permettent d'optimiser le nombre, la taille et la position de ces agrégats. Ils peuvent se faire par effet Joule, en faisant passer un courant électrique à travers l'échantillon de SiC et en contrôlant la température de ce dernier au moyen d'un pyromètre ou d'un thermocouple par exemple.(about 25 ° C) and the Na source is placed less than 10 cm from the sample, preferably at a distance of about 3 cm to 5 cm from this sample, the optimal distance being about 3 cm. Annealing is then carried out (at temperatures of a few hundred degrees, for example 350 ° C., for a period of a few seconds to a few minutes) of the surface of β-SiC (100) 3 × 2 covered with the sodium aggregates. These anneals optimize the number, size and position of these aggregates. They can be done by Joule effect, by passing an electric current through the sample of SiC and by controlling the temperature of this last using a pyrometer or a thermocouple for example.
Dans les exemples donnés ci-dessus, on a utilisé le sodium pour former les agrégats. Cependant, on pourrait remplacer le sodium par d'autres métaux alcalins, plus particulièrement le potassium, le Cs, le Rb ou des métaux alcalmo-terreux tels que Mg, Ca et Ba par exemple.In the examples given above, sodium was used to form the aggregates. However, sodium could be replaced by other alkali metals, more particularly potassium, Cs, Rb or alkaline earth metals such as Mg, Ca and Ba for example.
De plus, dans ces exemples, on a utilisé un substrat en SiC, celui-ci pouvant être, dans le cadre de la présente invention, de type cubique ou hexagonal, riche en Si et/ou en C. Cependant, on pourrait remplacer ce substrat par un substrat en diamant ou par un substrat fait d'un matériau semiconducteur covalent, par exemple le Si ou le Ge, ou par un substrat fait d'un matériau semiconducteur composé III-V (par exemple GaAs, InP, GaSb, GaP ou InAs) ou II-VI (par exemple CdTe, ZnO ou ZnTe) .In addition, in these examples, a SiC substrate was used, which may be, in the context of the present invention, of cubic or hexagonal type, rich in Si and / or C. However, this could be replaced. substrate by a diamond substrate or by a substrate made of a covalent semiconductor material, for example Si or Ge, or by a substrate made of a semiconductor material composed III-V (for example GaAs, InP, GaSb, GaP or InAs) or II-VI ( for example CdTe, ZnO or ZnTe).
En outre, la désorption thermique à basse température, dont il a été question plus haut, peut être mise en œuvre dans une gamme de températures allant de la température ambiante (environ 25°C) jusqu'à la température de désorption du métal considéré sur le substrat considéré.In addition, the low-temperature thermal desorption, which was discussed above, can be implemented in a range of temperatures from ambient temperature (about 25 ° C) to the desorption temperature of the metal considered on the substrate considered.
Les documents dont il a été question plus haut sont les suivants :The documents referred to above are as follows:
[10] Siθ2~Si interface formation by catalytic oxidation using alkali metals and removal of the catalyst[10] Siθ2 ~ Si interface formation by catalytic oxidation using alkali metals and removal of the catalyst
P. Soukiassian, T.M. Gentle, M.H. Bakshi and Z. Hurych Journal of Applied Physics 60, 4339 (1986)P. Soukiassian, T.M. Gentle, M.H. Bakshi and Z. Hurych Journal of Applied Physics 60, 4339 (1986)
[11] Exceptionally large enhancement of InP (110) oxidation rate by césium catalyst[11] Exceptionally large enhancement of InP (110) oxidation rate by cesium catalyst
P. Soukiassian, M.H. Bakshi and Z. Hurych Journal of Applied Physics 61, 2679 (1987)P. Soukiassian, M.H. Bakshi and Z. Hurych Journal of Applied Physics 61, 2679 (1987)
[12] Catalytic oxidation of semiconductors by alkali metals[12] Catalytic oxidation of semiconductors by alkali metals
P. Soukiassian, T.M. Gentle, M.H. Bakshi, A.S. Bommannavar and Z. HurychP. Soukiassian, T.M. Gentle, M.H. Bakshi, A.S. Bommannavar and Z. Hurych
Physica Scripta (Suède) , 35, 757 (1987) [13]. Electronic promoters and semiconductor oxidation: alkali metals on Si (111) 2x1 surfacePhysica Scripta (Sweden), 35, 757 (1987) [13]. Electronic promoters and semiconductor oxidation: alkali metals on Si (111) 2x1 surface
A. Franciosi, P. Soukiassian, P. Philip, S. Chang, A. Wall, A. Raisanen and N. TroullierA. Franciosi, P. Soukiassian, P. Philip, S. Chang, A. Wall, A. Raisanen and N. Troullier
Physical Review B 35, Rapid Communication, 910 (1987)Physical Review B 35, Rapid Communication, 910 (1987)
[14] Si3N4-Si interface formation by catalytic nitridation using alkali metals overlayers and removal of the catalyst: N2/Na/Si (100) 2x1[14] Si3N4-Si interface formation by catalytic nitridation using alkali metals overlayers and removal of the catalyst: N2 / Na / Si (100) 2x1
P. Soukiassian, T.M. Gentle, K.P. Schuette, M.H. Bakshi and Z . HurychP. Soukiassian, T.M. Gentle, K.P. Schuette, M.H. Bakshi and Z. Hurych
Applied Physics Letters 51, 346 (1987)Applied Physics Letters 51, 346 (1987)
[15] Electronic properties of 02 on Cs or Na overlayers adsorbed on Si (100) 2x1 from room temp rature to 650° C[15] Electronic properties of 02 on Cs or Na overlayers adsorbed on Si (100) 2x1 from room temp rature to 650 ° C
P. Soukiassian, M.H. Bakshi, Z. Hurych and T.M. GentleP. Soukiassian, M.H. Bakshi, Z. Hurych and T.M. Gentle
Physical Review B 35, Rapid Communication, 4176 (1987)Physical Review B 35, Rapid Communication, 4176 (1987)
[16] Thermal gro th of Siθ2-Si interfaces on a Si (111) 7x7 surface modified by césium[16] Thermal gro th of Siθ2-Si interfaces on a Si (111) 7x7 surface modified by cesium
H.I. Starnberg, P. Soukiassian, M. H. Bakshi and Z . HurychH.I. Starnberg, P. Soukiassian, M. H. Bakshi and Z. Hurych
Physical Review B 37, 1315 (1988) [17] Alkali métal promoted oxidation of the Si (100) 2x1 surface: coverage dependence and non- localityPhysical Review B 37, 1315 (1988) [17] Alkali metal promoted oxidation of the Si (100) 2x1 surface: coverage dependence and non locality
H.I. Starnberg, P. Soukiassian and Z. HurychH.I. Starnberg, P. Soukiassian and Z. Hurych
Physical Review B 39, 12775 (1989)Physical Review B 39, 12775 (1989)
[18] Alkali metals and semiconductor surfaces: electronic, structural and catalytic properties[18] Alkali metals and semiconductor surfaces: electronic, structural and catalytic properties
P. Soukiassian and H.I. Starnberg (Article Invité) dans Physics and Chemistry of Alkali Métal Adsorption, Elsevier Science Publishers B.V., Amsterdam, Pays Bas, Materials ScienceP. Soukiassian and H.I. Starnberg (Guest Article) in Physics and Chemistry of Alkali Métal Adsorption, Elsevier Science Publishers B.V., Amsterdam, Netherlands, Materials Science
Monographs 57, 449 (1989)Monographs 57, 449 (1989)
[19] Catalytic nitridation of a III-V semiconductor using alkali métal P. Soukiassian, T. Kendelewicz, H.I.[19] Catalytic nitridation of a III-V semiconductor using alkali metal P. Soukiassian, T. Kendelewicz, H.I.
Starnberg, M.H. Bakshi and Z. HurychStarnberg, M.H. Bakshi and Z. Hurych
Europhysics Letters 12, 87 (1990)Europhysics Letters 12, 87 (1990)
[20] Roo température nitridation of gallium arsenide using alkali métal and molecular nitrogen[20] Roo temperature nitridation of gallium arsenide using alkali metal and molecular nitrogen
P. Soukiassian, H.I. Starnberg, T. Kendelewicz and Z.D. HurychP. Soukiassian, H.I. Starnberg, T. Kendelewicz and Z.D. Hurych
Physical Review B 42, Rapid Communication 3769 (1990) [21] Rb and K promoted nitridation of cleaved GaAs and InP surfaces at room températurePhysical Review B 42, Rapid Communication 3769 (1990) [21] Rb and K promoted nitridation of cleaved GaAs and InP surfaces at room temperature
P. Soukiassian, H.I. Starnberg and T. Kendelewicz Applied Surface Science 56, 772 (1992)P. Soukiassian, H.I. Starnberg and T. Kendelewicz Applied Surface Science 56, 772 (1992)
[22] Al2θ3+x/Al interface formation by promoted oxidation using an alkali métal and removal of the catalyst Y. Huttel, E. Bourdië, P. Soukiassian, P. S.[22] Al2θ3 + x / Al interface formation by promoted oxidation using an alkali metal and removal of the catalyst Y. Huttel, E. Bourdië, P. Soukiassian, PS
Mangat and Z . HurychMangat and Z. Hurych
Applied Physics Letters 62, 2437 (1993)Applied Physics Letters 62, 2437 (1993)
[23] Direct and Rb-promoted SiOx/β-SiC (100) interface formation[23] Direct and Rb-promoted SiO x / β-SiC (100) training interface
M. Riehl-Chudoba, P. Soukiassian, C. Jaussaud and S. DupontM. Riehl-Chudoba, P. Soukiassian, C. Jaussaud and S. Dupont
Physical Review B 51, 14300 (1995) . Physical Review B 51, 14300 (1995).

Claims

REVENDICATIONS
1. Ensemble de nano-objets (4, 10, 12, 22, 24), notamment de fils atomiques, de nano-structures unidimensionnelles et de plots quantiques, cet ensemble étant caractérisé en ce que les nano-objets sont faits d'un métal et formés sur la surface (2, 6, 14) d'un substrat en un matériau semiconducteur monocristallin.1. Set of nano-objects (4, 10, 12, 22, 24), in particular of atomic wires, one-dimensional nano-structures and quantum dots, this set being characterized in that the nano-objects are made of a metal and formed on the surface (2, 6, 14) of a substrate made of a monocrystalline semiconductor material.
2. Ensemble de nano-objets selon la revendication 1, dans lequel le matériau semiconducteur monocristallin est choisi parmi le carbure de silicium monocristallin, le diamant monocristallin, les semiconducteurs covalents monocristallins et les semiconducteurs composés monocristallins.2. Set of nano-objects according to claim 1, in which the monocrystalline semiconductor material is chosen from monocrystalline silicon carbide, monocrystalline diamond, covalent monocrystalline semiconductors and monocrystalline compound semiconductors.
3. Ensemble de nano-objets selon la revendication 2, dans lequel le substrat est un substrat monocristallin de carbure de silicium en phase cubique .3. Set of nano-objects according to claim 2, wherein the substrate is a monocrystalline substrate of silicon carbide in cubic phase.
4. Ensemble de nano-objets selon la revendication 3, dans lequel la surface (2) est une surface de carbure de silicium cubique, riche en silicium β-SiC (100) 3x2.4. A set of nano-objects according to claim 3, in which the surface (2) is a surface of cubic silicon carbide, rich in β-SiC silicon (100) 3x2.
5. Ensemble de nano-objets selon l'une quelconque des revendications 1 à 4, dans lequel les nano-objets sont des agrégats tridimensionnels (4) du métal sur la surface.5. Set of nano-objects according to any one of claims 1 to 4, wherein the nano-objects are three-dimensional aggregates (4) of the metal on the surface.
6. Ensemble de nano-objets selon la revendication 5, dans lequel les agrégats sont répartis de façon ordonnée sur la surface et forment ainsi un réseau de plots du métal . 6. A set of nano-objects according to claim 5, in which the aggregates are distributed in an orderly fashion over the surface and thus form a network of metal studs.
7. Ensemble de nano-objets selon la revendication 3, dans lequel la surface (6, 14) est une surface de carbure de silicium cubique, terminée Si β- SiC(lOO) c(4x2), et les nano-objets sont des fils atomiques parallèles (10, 22) ou des bandes unidimensionnelles nanométriques parallèles (12, 24) du métal .7. A set of nano-objects according to claim 3, in which the surface (6, 14) is a cubic silicon carbide surface, finished Si β- SiC (100) c (4x2), and the nano-objects are parallel atomic wires (10, 22) or parallel nanometric one-dimensional bands (12, 24) of the metal.
8. Ensemble de nano-objets selon la revendication 7, dans lequel la surface (6, 14) comporte des fils atomiques parallèles de Si (8, 20), les fils atomiques et les bandes unidimensionnelles du métal étant perpendiculaires à ces fils atomiques de Si.8. A set of nano-objects according to claim 7, in which the surface (6, 14) comprises parallel atomic wires of Si (8, 20), the atomic wires and the one-dimensional bands of the metal being perpendicular to these atomic wires of Yes.
9. Ensemble de nano-objets selon l'une quelconque des revendications 1 à 8, dans lequel la surface comporte des zones passivées (15) et des zones non passivées (16, 18) et les nano-objets sont formés sur ces zones non passivées de la surface.9. A set of nano-objects according to any one of claims 1 to 8, in which the surface comprises passivated zones (15) and non-passivated zones (16, 18) and the nano-objects are formed on these non-zones passivates from the surface.
10. Ensemble de nano-objets selon l'une quelconque des revendications l à 9, dans lequel le métal est choisi parmi les métaux dont la bande d est pleine, les métaux de type jellium, les métaux alcalins et les métaux de transition.10. Set of nano-objects according to any one of claims 1 to 9, in which the metal is chosen from metals with a full d band, metals of the jellium type, alkali metals and transition metals.
11. Ensemble de nano-objets selon la revendication 10, dans lequel le métal est choisi parmi le sodium et le potassium. 11. Set of nano-objects according to claim 10, in which the metal is chosen from sodium and potassium.
12. Procédé de fabrication d'un ensemble de nano-objets, dans lequel on prépare une surface (2, 6, 14) d'un substrat en un matériau semiconducteur monocristallin et l'on dépose un métal sur la surface ainsi préparée. 12. A method of manufacturing a set of nano-objects, in which a surface (2, 6, 14) of a substrate made of a monocrystalline semiconductor material is prepared and a metal is deposited on the surface thus prepared.
13. Procédé selon la revendication 12, dans lequel le matériau semiconducteur monocristallin est choisi parmi le carbure de silicium monocristallin, le diamant monocristallin, les semiconducteurs covalents monocristallins et les semiconducteurs composés monocristallins . 13. The method of claim 12, wherein the monocrystalline semiconductor material is chosen from monocrystalline silicon carbide, monocrystalline diamond, monocrystalline covalent semiconductors and monocrystalline compound semiconductors.
14. Procédé selon la revendication 13, dans lequel le substrat est un substrat monocristallin de carbure de silicium en phase cubique.14. The method of claim 13, wherein the substrate is a monocrystalline substrate of silicon carbide in cubic phase.
15. Procédé selon l'une quelconque des revendication 12 à 14, dans lequel le dépôt du métal est réalisé à une température supérieure ou égale à la température ambiante.15. Method according to any one of claims 12 to 14, wherein the deposition of the metal is carried out at a temperature greater than or equal to ambient temperature.
16. Procédé selon la revendication 14, dans lequel on prépare une surface (2) de carbure de silicium cubique, riche en silicium β-SiC(100) 3x2 et l'on dépose le métal sur la surface ainsi préparée.16. The method of claim 14, wherein a surface (2) of cubic silicon carbide, rich in silicon β-SiC (100) 3x2, is prepared and the metal is deposited on the surface thus prepared.
17. Procédé selon la revendication 14, dans lequel on prépare une surface (6, 14) de carbure de silicium terminée Si β-SiC(100) c(4x2), on dépose à température ambiante le métal sur la surface ainsi préparée et l'on obtient, par migration de surface des atomes de métal le long de rangées de dimères Si-Si de la surface c(4x2), des fils atomiques du métal, qui sont parallèles aux rangées de dimères Si-Si.17. The process as claimed in claim 14, in which a surface (6, 14) of finished silicon carbide Si β-SiC (100) c (4x2) is prepared, the metal is deposited at ambient temperature on the surface thus prepared and l 'We obtain, by surface migration of the metal atoms along rows of Si-Si dimers of the surface c (4x2), atomic wires of the metal, which are parallel to the rows of Si-Si dimers.
18. Procédé selon la revendication 17, dans lequel on effectue un recuit thermique du substrat à une température inférieure à la température de désorption totale du métal.18. The method of claim 17, wherein a thermal annealing of the substrate is carried out at a temperature below the total desorption temperature of the metal.
19. Procédé selon l'une quelconque des revendications 12 à 18, dans lequel le métal est déposé par evaporation sous vide. 19. Method according to any one of claims 12 to 18, in which the metal is deposited by vacuum evaporation.
20. Procédé selon l'une quelconque des revendications 12 à 18, dans lequel le métal est déposé dans une atmosphère inerte .20. Method according to any one of claims 12 to 18, in which the metal is deposited in an inert atmosphere.
21. Procédé selon l'une quelconque des revendications 12 à 20, dans lequel on forme des zones passivées (15) sur la surface ainsi préparée et l'on dépose ensuite le métal sur des zones non passivées (16, 18) de cette surface.21. Method according to any one of claims 12 to 20, in which passivated zones (15) are formed on the surface thus prepared and the metal is then deposited on non-passivated zones (16, 18) of this surface. .
22. Procédé selon l'une quelconque des revendications 12 à 21, dans lequel le métal est choisi parmi les métaux dont la bande d est pleine, les métaux de type jellium, les métaux alcalins et les métaux de transition.22. Method according to any one of claims 12 to 21, in which the metal is chosen from metals with a full d band, metals of the jellium type, alkali metals and transition metals.
23. Procédé selon la revendication 22, dans lequel le métal est choisi parmi le sodium et le potassium.23. The method of claim 22, wherein the metal is selected from sodium and potassium.
24. Procédé selon la revendication 17, dans lequel on utilise un laser pour obtenir la désorption du métal soit par interaction thermique du faisceau émis par ce laser sur la surface couverte de métal, soit par désorption du métal, induite par des transitions électroniques.24. The method of claim 17, wherein a laser is used to obtain the desorption of the metal either by thermal interaction of the beam emitted by this laser on the surface covered with metal, or by desorption of the metal, induced by electronic transitions.
25. Procédé selon la revendication 14, dans lequel la surface est une surface terminée C de type sp, à savoir la surface β-SiC (100) c (2x2) .25. The method of claim 14, wherein the surface is a finished surface C of sp type, namely the surface β-SiC (100) c (2x2).
26. Procédé selon la revendication 25, dans lequel cette surface comprend des lignes atomiques de C de type sp3 et l'on forme des fils atomiques de métal qui sont soit parallèles, soit perpendiculaires aux lignes atomiques de C. 26. The method of claim 25, wherein this surface comprises atomic lines of C of type sp3 and atomic metal wires are formed which are either parallel or perpendicular to the atomic lines of C.
27. Procédé selon la revendication 12, dans lequel on forme un réseau de plots du métal sur la surface du substrat en matériau semiconducteur monocristallin, on transforme localement le matériau du substrat situé sous les plots et l'on élimine le réseau de plots pour obtenir ainsi un super-réseau de plots faits du matériau transformé.27. The method of claim 12, in which a network of metal studs is formed on the surface of the substrate in monocrystalline semiconductor material, the substrate material located under the studs is locally transformed and the network of studs is eliminated to obtain thus a super-network of studs made of the transformed material.
28. Procédé selon la revendication 27, dans lequel la transformation locale du matériau du substrat est choisie parmi une oxydation, une nitruration et une oxynitruration pour obtenir un super-réseau de plots faits de l'oxyde, du niture ou de l'oxynitrure du matériau.28. The method of claim 27, wherein the local transformation of the substrate material is chosen from oxidation, nitriding and oxynitriding to obtain a super-network of studs made of the oxide, niture or oxynitride of material.
29. Super-réseau de plots, obtenu par le procédé selon la revendication 28, ces plots étant faits de l'oxyde, du nitrure ou de l'oxynitrure d'un matériau semiconducteur monocristallin et formés à la surface d'un substrat de ce matériau. 29. Superlattice of studs, obtained by the method according to claim 28, these studs being made of the oxide, nitride or oxynitride of a monocrystalline semiconductor material and formed on the surface of a substrate of this material.
EP03762740A 2002-07-05 2003-07-04 Metal nano-objects, formed on semiconductor surfaces, and methods for making said nano-objects Withdrawn EP1656473A2 (en)

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Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3998662A (en) * 1975-12-31 1976-12-21 General Electric Company Migration of fine lines for bodies of semiconductor materials having a (100) planar orientation of a major surface
US4735921A (en) 1987-05-29 1988-04-05 Patrick Soukiassian Nitridation of silicon and other semiconductors using alkali metal catalysts
US4900710A (en) * 1988-11-03 1990-02-13 E. I. Dupont De Nemours And Company Process of depositing an alkali metal layer onto the surface of an oxide superconductor
US5352330A (en) * 1992-09-30 1994-10-04 Texas Instruments Incorporated Process for producing nanometer-size structures on surfaces using electron beam induced chemistry through electron stimulated desorption
FR2757183B1 (en) 1996-12-16 1999-02-05 Commissariat Energie Atomique LONG LENGTH AND LONG STABILITY ATOMIC WIRES, PROCESS FOR PRODUCING THESE WIRES, APPLICATION IN NANO-ELECTRONICS
FR2786794B1 (en) * 1998-12-02 2001-03-02 Commissariat Energie Atomique LARGE SIZE MONOATOMIC AND MONOCRYSTALLINE LAYER, OF DIAMOND-TYPE CARBON, AND METHOD FOR MANUFACTURING THE SAME
FR2801723B1 (en) * 1999-11-25 2003-09-05 Commissariat Energie Atomique HIGHLY OXYGEN-SENSITIVE SILICON LAYER AND METHOD FOR OBTAINING THE LAYER
US6913713B2 (en) * 2002-01-25 2005-07-05 Konarka Technologies, Inc. Photovoltaic fibers
TW504864B (en) * 2000-09-19 2002-10-01 Nanopierce Technologies Inc Method for assembling components and antennae in radio frequency identification devices
FR2823739B1 (en) * 2001-04-19 2003-05-16 Commissariat Energie Atomique PROCESS FOR MANUFACTURING UNIDIMENSIONAL NANOSTRUCTURES AND NANOSTRUCTURES OBTAINED THEREBY
US6978070B1 (en) * 2001-08-14 2005-12-20 The Programmable Matter Corporation Fiber incorporating quantum dots as programmable dopants
JP2003178419A (en) * 2001-12-12 2003-06-27 Fuji Photo Film Co Ltd Recording medium
KR100491051B1 (en) * 2002-08-31 2005-05-24 한국전자통신연구원 Optoelectronic device using dual structure nano dots and method for manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2004005593A2 *

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