EP1501119A4 - METHOD FOR MANUFACTURING SEMICONDUCTOR WAFERS AND PLATEBOARD - Google Patents

METHOD FOR MANUFACTURING SEMICONDUCTOR WAFERS AND PLATEBOARD

Info

Publication number
EP1501119A4
EP1501119A4 EP03719197A EP03719197A EP1501119A4 EP 1501119 A4 EP1501119 A4 EP 1501119A4 EP 03719197 A EP03719197 A EP 03719197A EP 03719197 A EP03719197 A EP 03719197A EP 1501119 A4 EP1501119 A4 EP 1501119A4
Authority
EP
European Patent Office
Prior art keywords
plateboard
semiconductor wafers
manufacturing semiconductor
manufacturing
wafers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP03719197A
Other languages
German (de)
French (fr)
Other versions
EP1501119A1 (en
EP1501119B1 (en
Inventor
Takahiro Kida
Seiichi Miyazaki
Kazuhiko Nishimura
Nobuyuki Hayashi
Katsunori Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Publication of EP1501119A1 publication Critical patent/EP1501119A1/en
Publication of EP1501119A4 publication Critical patent/EP1501119A4/en
Application granted granted Critical
Publication of EP1501119B1 publication Critical patent/EP1501119B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12—Preparing bulk and homogeneous wafers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/15—Cleaning before device manufacture, i.e. Begin-Of-Line process by wet cleaning only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
EP03719197A 2002-04-30 2003-04-24 Semiconductor wafer manufacturing method and wafer Expired - Lifetime EP1501119B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002128550A JP4093793B2 (en) 2002-04-30 2002-04-30 Semiconductor wafer manufacturing method and wafer
JP2002128550 2002-04-30
PCT/JP2003/005259 WO2003094215A1 (en) 2002-04-30 2003-04-24 Semiconductor wafer manufacturing method and wafer

Publications (3)

Publication Number Publication Date
EP1501119A1 EP1501119A1 (en) 2005-01-26
EP1501119A4 true EP1501119A4 (en) 2007-01-17
EP1501119B1 EP1501119B1 (en) 2008-12-03

Family

ID=29397270

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03719197A Expired - Lifetime EP1501119B1 (en) 2002-04-30 2003-04-24 Semiconductor wafer manufacturing method and wafer

Country Status (8)

Country Link
US (1) US7250368B2 (en)
EP (1) EP1501119B1 (en)
JP (1) JP4093793B2 (en)
KR (1) KR100909140B1 (en)
CN (1) CN100365774C (en)
DE (1) DE60325039D1 (en)
TW (1) TWI264772B (en)
WO (1) WO2003094215A1 (en)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4273943B2 (en) * 2003-12-01 2009-06-03 株式会社Ｓｕｍｃｏ Silicon wafer manufacturing method
JP4856861B2 (en) * 2004-07-20 2012-01-18 シャープ株式会社 Manufacturing method of semiconductor device
DE102006020823B4 (en) * 2006-05-04 2008-04-03 Siltronic Ag Process for producing a polished semiconductor wafer
US20080206992A1 (en) * 2006-12-29 2008-08-28 Siltron Inc. Method for manufacturing high flatness silicon wafer
US8454852B2 (en) * 2007-01-31 2013-06-04 Shin-Etsu Handotai Co., Ltd. Chamfering apparatus for silicon wafer, method for producing silicon wafer, and etched silicon wafer
JP5093858B2 (en) * 2007-04-27 2012-12-12 芝浦メカトロニクス株式会社 Semiconductor wafer processing apparatus and reference angular position detection method
JP2009302338A (en) * 2008-06-13 2009-12-24 Sumco Corp Wafer polishing method and wafer manufactured by the same
JP2009302410A (en) * 2008-06-16 2009-12-24 Sumco Corp Method of manufacturing semiconductor wafer
JP5600867B2 (en) * 2008-06-16 2014-10-08 株式会社Ｓｕｍｃｏ Manufacturing method of semiconductor wafer
JP2009302409A (en) * 2008-06-16 2009-12-24 Sumco Corp Method of manufacturing semiconductor wafer
JP2009302478A (en) * 2008-06-17 2009-12-24 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 Method of manufacturing semiconductor wafer
FR2935536B1 (en) * 2008-09-02 2010-09-24 Soitec Silicon On Insulator PROGRESSIVE DETOURING METHOD
EP2200077B1 (en) * 2008-12-22 2012-12-05 Soitec Method for bonding two substrates
DE102009030295B4 (en) * 2009-06-24 2014-05-08 Siltronic Ag Method for producing a semiconductor wafer
US8952496B2 (en) * 2009-12-24 2015-02-10 Sumco Corporation Semiconductor wafer and method of producing same
JP5423384B2 (en) * 2009-12-24 2014-02-19 株式会社Ｓｕｍｃｏ Semiconductor wafer and manufacturing method thereof
WO2011083667A1 (en) * 2010-01-05 2011-07-14 住友電気工業株式会社 Method and apparatus for processing compound semiconductor wafer
DE102010005904B4 (en) * 2010-01-27 2012-11-22 Siltronic Ag Method for producing a semiconductor wafer
US8696405B2 (en) 2010-03-12 2014-04-15 Wayne O. Duescher Pivot-balanced floating platen lapping machine
US8500515B2 (en) * 2010-03-12 2013-08-06 Wayne O. Duescher Fixed-spindle and floating-platen abrasive system using spherical mounts
US8647170B2 (en) 2011-10-06 2014-02-11 Wayne O. Duescher Laser alignment apparatus for rotary spindles
US8647172B2 (en) 2010-03-12 2014-02-11 Wayne O. Duescher Wafer pads for fixed-spindle floating-platen lapping
US8647171B2 (en) * 2010-03-12 2014-02-11 Wayne O. Duescher Fixed-spindle floating-platen workpiece loader apparatus
US8602842B2 (en) * 2010-03-12 2013-12-10 Wayne O. Duescher Three-point fixed-spindle floating-platen abrasive system
US8740668B2 (en) * 2010-03-12 2014-06-03 Wayne O. Duescher Three-point spindle-supported floating abrasive platen
US8641476B2 (en) 2011-10-06 2014-02-04 Wayne O. Duescher Coplanar alignment apparatus for rotary spindles
US8758088B2 (en) 2011-10-06 2014-06-24 Wayne O. Duescher Floating abrading platen configuration
FR2961630B1 (en) 2010-06-22 2013-03-29 Soitec Silicon On Insulator Technologies APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICES
US8338266B2 (en) 2010-08-11 2012-12-25 Soitec Method for molecular adhesion bonding at low pressure
FR2964193A1 (en) 2010-08-24 2012-03-02 Soitec Silicon On Insulator METHOD FOR MEASURING ADHESION ENERGY, AND ASSOCIATED SUBSTRATES
US8337280B2 (en) 2010-09-14 2012-12-25 Duescher Wayne O High speed platen abrading wire-driven rotary workholder
US8430717B2 (en) 2010-10-12 2013-04-30 Wayne O. Duescher Dynamic action abrasive lapping workholder
JP2012178458A (en) 2011-02-25 2012-09-13 Fujitsu Ltd Method of manufacturing semiconductor device and method of cleaning semiconductor substrate
JP6027346B2 (en) * 2012-06-12 2016-11-16 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 Manufacturing method of semiconductor wafer
US9233452B2 (en) 2012-10-29 2016-01-12 Wayne O. Duescher Vacuum-grooved membrane abrasive polishing wafer workholder
US9604339B2 (en) 2012-10-29 2017-03-28 Wayne O. Duescher Vacuum-grooved membrane wafer polishing workholder
US9011207B2 (en) 2012-10-29 2015-04-21 Wayne O. Duescher Flexible diaphragm combination floating and rigid abrading workholder
US9199354B2 (en) 2012-10-29 2015-12-01 Wayne O. Duescher Flexible diaphragm post-type floating and rigid abrading workholder
US9039488B2 (en) 2012-10-29 2015-05-26 Wayne O. Duescher Pin driven flexible chamber abrading workholder
US8998678B2 (en) 2012-10-29 2015-04-07 Wayne O. Duescher Spider arm driven flexible chamber abrading workholder
US8845394B2 (en) 2012-10-29 2014-09-30 Wayne O. Duescher Bellows driven air floatation abrading workholder
US8998677B2 (en) 2012-10-29 2015-04-07 Wayne O. Duescher Bellows driven floatation-type abrading workholder
TWI599446B (en) * 2013-03-25 2017-09-21 Sapphire polishing pad dresser production methods
CN104142259A (en) * 2013-05-10 2014-11-12 河南协鑫光伏科技有限公司 Making method of solar monocrystalline silicon test wafer
JP2015038919A (en) * 2013-08-19 2015-02-26 株式会社ディスコ Wafer manufacturing method
JP6244962B2 (en) * 2014-02-17 2017-12-13 株式会社Sumco Manufacturing method of semiconductor wafer
JP6040947B2 (en) * 2014-02-20 2016-12-07 信越半導体株式会社 Double-head grinding method for workpieces
CN103847032B (en) * 2014-03-20 2016-01-06 德清晶辉光电科技有限公司 The production technology of the ultra-thin quartz wafer of a kind of major diameter
CN103921205B (en) * 2014-04-04 2016-08-24 德清晶辉光电科技有限公司 A kind of 6 inches of lithium niobate crystal chips or the production technology of lithium tantalate wafer
JP6045542B2 (en) * 2014-09-11 2016-12-14 信越半導体株式会社 Semiconductor wafer processing method, bonded wafer manufacturing method, and epitaxial wafer manufacturing method
DE102015220924B4 (en) * 2015-10-27 2018-09-27 Siltronic Ag Susceptor for holding a semiconductor wafer with orientation notch, method for depositing a layer on a semiconductor wafer and semiconductor wafer
US10926378B2 (en) 2017-07-08 2021-02-23 Wayne O. Duescher Abrasive coated disk islands using magnetic font sheet
EP3567139B1 (en) 2018-05-11 2021-04-07 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
EP3567138B1 (en) * 2018-05-11 2020-03-25 SiCrystal GmbH Chamfered silicon carbide substrate and method of chamfering
US11691241B1 (en) * 2019-08-05 2023-07-04 Keltech Engineering, Inc. Abrasive lapping head with floating and rigid workpiece carrier
JP7562994B2 (en) * 2020-06-08 2024-10-08 株式会社Sumco Wafer outer circumference polishing device
TWI802406B (en) * 2021-07-29 2023-05-11 環球晶圓股份有限公司 METHOD OF SiC WAFER PROCESSING
CN115091638A (en) * 2022-06-30 2022-09-23 广东先导微电子科技有限公司 Method for processing cadmium zinc telluride wafer
CN115781459B (en) * 2022-12-16 2025-07-15 万华化学集团电子材料有限公司 Crystal rod rounding and grooving method and crystal rod rounding and grooving device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002001616A1 (en) * 2000-06-29 2002-01-03 Shin-Etsu Handotai Co., Ltd. Method for processing semiconductor wafer and semiconductor wafer
EP1189266A1 (en) * 2000-03-29 2002-03-20 Shin-Etsu Handotai Co., Ltd Production method for silicon wafer and soi wafer, and soi wafer

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3430499B2 (en) * 1996-08-09 2003-07-28 三菱住友シリコン株式会社 Semiconductor wafer and method of manufacturing the same
US5821166A (en) * 1996-12-12 1998-10-13 Komatsu Electronic Metals Co., Ltd. Method of manufacturing semiconductor wafers
JPH11188590A (en) * 1997-12-22 1999-07-13 Speedfam Co Ltd Edge polishing device
JP3964029B2 (en) * 1998-01-20 2007-08-22 沖電気工業株式会社 Manufacturing method of semiconductor substrate
JP3664593B2 (en) * 1998-11-06 2005-06-29 信越半導体株式会社 Semiconductor wafer and manufacturing method thereof
JP3329288B2 (en) * 1998-11-26 2002-09-30 信越半導体株式会社 Semiconductor wafer and method of manufacturing the same
JP3551300B2 (en) * 1999-02-18 2004-08-04 三菱住友シリコン株式会社 Manufacturing method of high flatness wafer
JP4154683B2 (en) * 1999-09-30 2008-09-24 株式会社Ｓｕｍｃｏ Manufacturing method of high flatness back surface satin wafer and surface grinding back surface lapping apparatus used in the manufacturing method
US6376378B1 (en) * 1999-10-08 2002-04-23 Chartered Semiconductor Manufacturing, Ltd. Polishing apparatus and method for forming an integrated circuit
DE19956250C1 (en) * 1999-11-23 2001-05-17 Wacker Siltronic Halbleitermat Production of a number of semiconductor wafers comprise simultaneously polishing a front side and a rear side of each wafer and evaluating each wafer for further processing according to quality criteria
DE10004578C1 (en) * 2000-02-03 2001-07-26 Wacker Siltronic Halbleitermat Production of a semiconductor wafer comprises polishing the edges of the wafer with a cloth with the continuous introduction of an alkaline polishing agent using polishing plates, wetting with a film and cleaning and drying
JP3846706B2 (en) * 2000-02-23 2006-11-15 信越半導体株式会社 Polishing method and polishing apparatus for wafer outer peripheral chamfer
JP4846915B2 (en) * 2000-03-29 2011-12-28 信越半導体株式会社 Manufacturing method of bonded wafer
DE10058305A1 (en) * 2000-11-24 2002-06-06 Wacker Siltronic Halbleitermat Process for the surface polishing of silicon wafers
DE10142400B4 (en) * 2001-08-30 2009-09-03 Siltronic Ag Improved local flatness semiconductor wafer and method of making the same
KR100420205B1 (en) * 2001-09-10 2004-03-04 주식회사 하이닉스반도체 Method of manufacturing a wafer
DE10159833C1 (en) * 2001-12-06 2003-06-18 Wacker Siltronic Halbleitermat Process for the production of a large number of semiconductor wafers
JP2004022677A (en) * 2002-06-13 2004-01-22 Shin Etsu Handotai Co Ltd Semiconductor wafer
JP4464033B2 (en) * 2002-06-13 2010-05-19 信越半導体株式会社 Semiconductor wafer shape evaluation method and shape evaluation apparatus
US7416962B2 (en) * 2002-08-30 2008-08-26 Siltronic Corporation Method for processing a semiconductor wafer including back side grinding
US20040108297A1 (en) * 2002-09-18 2004-06-10 Memc Electronic Materials, Inc. Process for etching silicon wafers

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1189266A1 (en) * 2000-03-29 2002-03-20 Shin-Etsu Handotai Co., Ltd Production method for silicon wafer and soi wafer, and soi wafer
WO2002001616A1 (en) * 2000-06-29 2002-01-03 Shin-Etsu Handotai Co., Ltd. Method for processing semiconductor wafer and semiconductor wafer
EP1313135A1 (en) * 2000-06-29 2003-05-21 Shin-Etsu Handotai Co., Ltd Method for processing semiconductor wafer and semiconductor wafer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO03094215A1 *

Also Published As

Publication number Publication date
CN1650404A (en) 2005-08-03
JP4093793B2 (en) 2008-06-04
TW200403738A (en) 2004-03-01
EP1501119A1 (en) 2005-01-26
WO2003094215A1 (en) 2003-11-13
EP1501119B1 (en) 2008-12-03
JP2003324081A (en) 2003-11-14
US20050142882A1 (en) 2005-06-30
KR100909140B1 (en) 2009-07-23
KR20040111463A (en) 2004-12-31
CN100365774C (en) 2008-01-30
DE60325039D1 (en) 2009-01-15
TWI264772B (en) 2006-10-21
US7250368B2 (en) 2007-07-31

Similar Documents

Publication Publication Date Title
EP1501119A4 (en) METHOD FOR MANUFACTURING SEMICONDUCTOR WAFERS AND PLATEBOARD
EP1513195A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1686629A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1612861A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1488920A4 (en) PLACOPLATTER AND METHOD FOR MANUFACTURING THE SAME
TWI348218B (en) Semiconductor chip and method for manufacturing the same
AU2003236002A8 (en) Method for manufacturing semiconductor chip
FR2841631B1 (en) PIPE CONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
EP1554757A4 (en) SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
FR2831713B1 (en) SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING
EP1551058A4 (en) RECEIVED WAFER AND METHOD FOR MANUFACTURING RECESSED WAFER
EP1658625A4 (en) SUPERCONDUCTING FILM AND METHOD FOR MANUFACTURING THE SAME
EP1540720A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
DE50308874D1 (en) Method for producing a semiconductor wafer
AU2003256825A1 (en) Method and apparatus for manufacturing net shape semiconductor wafers
EP1498955A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
FR2841381B1 (en) INTEGRATED SEMICONDUCTOR CIRCUIT AND CIRCUIT MANUFACTURING METHOD
EP1385213A4 (en) SEMICONDUCTOR MEMORY AND METHOD FOR MANUFACTURING THE SAME
EP1536484A4 (en) ORGANIC SEMICONDUCTOR AND METHOD FOR MANUFACTURING THE SAME
EP1589585A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1817796A4 (en) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1465242A4 (en) SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING THE SAME
EP1681727A4 (en) LUMINESCENT SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
SG112046A1 (en) Method of manufacturing semiconductor wafer
DE60238952D1 (en) A semiconductor device manufacturing method

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20041027

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR

A4 Supplementary search report drawn up and despatched

Effective date: 20061214

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 21/304 20060101AFI20031119BHEP

Ipc: B24B 37/04 20060101ALI20061208BHEP

17Q First examination report despatched

Effective date: 20070807

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR IT NL

REF Corresponds to:

Ref document number: 60325039

Country of ref document: DE

Date of ref document: 20090115

Kind code of ref document: P

RAP2 Party data changed (patent owner data changed or rights of a patent transferred)

Owner name: SHIN-ETSU HANDOTAI CO., LTD.

NLT2 Nl: modifications (of names), taken from the european patent patent bulletin

Owner name: SHIN-ETSU HANDOTAI CO., LTD.

Effective date: 20090422

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20090904

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20100521

Year of fee payment: 8

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20100422

Year of fee payment: 8

Ref country code: NL

Payment date: 20100416

Year of fee payment: 8

REG Reference to a national code

Ref country code: NL

Ref legal event code: V1

Effective date: 20111101

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20111230

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20111101

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20110502

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20110424

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20220302

Year of fee payment: 20

REG Reference to a national code

Ref country code: DE

Ref legal event code: R071

Ref document number: 60325039

Country of ref document: DE